Solution‐Processed Submicron‐Channel Organic Ferroelectric Memristors with a Low Operation Voltage of 1 V

ABSTRACT

In contrast to traditional von Neumann electronic systems, which suffer from inherent data transmission and energy efficiency bottlenecks, memristors have been proposed to meet the demand of fast‐growing neuromorphic computing for low‐power, high‐integration, scalable devices. Great progress has been achieved in inorganic memristors and their chips. On the contrary, organic memristors, featuring flexibility, biocompatibility, and facile fabrication, still face bottlenecks in miniaturization and arrayed fabrication due to lithography incompatibility. Herein, we report a submicron‐channel organic memristor with a heterojunction of molecular ferroelectric diisopropylammonium bromide (DIPAB) and semiconductor copper(II) phthalocyanine (CuPc), fabricated by combining all‐solution functional layer processing with nanoimprint lithography (NIL). The conductivity and photoresponsivity of the lateral interface of the heterojunction can be modulated by the in‐plane ferroelectric polarization of DIPAB. By optimizing CuPc annealing in the NIL‐patterned submicron channel, low‐voltage operation of ≤1 V was achieved, with electrical/optoelectronic bimodal synaptic characteristics including discrete quasi‐linear multi‐level conductance modulation and self‐driven photoresponsivity tuning. Based on their physical properties, high accuracy of image recognition simulations was then achieved with simple network architectures. This may provide a feasible low‐cost route for large‐scale fabrication of miniaturized organic memristors with lateral conduction channels for low‐power neuromorphic computing applications.

Nanoimprint lithography enables a solution‐processed DIPAB/CuPc organic ferroelectric memristor with a submicron lateral channel. Ferroelectric polarization modulates interfacial conduction and self‐driven photoresponse, producing ≤1 V electrical/optoelectronic synaptic modulation and high‐accuracy image‐recognition simulation with simple networks. This strategy provides a practical route for miniaturized, scalable organic memristors toward low‐power neuromorphic computing.

1. Introduction

The rapid development of the Internet of Things (IoT), artificial intelligence (AI), and edge computing has driven urgent demand for high‐integration, low‐power next‐generation computing units [1], while the traditional memory‐computing separated von Neumann architecture suffers from inherent latency, energy efficiency, and scaling bottlenecks that make it unsuitable for these emerging scenarios [2, 3]. Memristors enable in‐situ in‐memory computing (IMC) integration [4] via intrinsic non‐volatile tunable resistive switching [5, 6], emulating synaptic plasticity, and establishing themselves as core candidates for brain‐inspired computing and high‐density memory arrays [7, 8, 9]. Memristors are mainly divided into resistive random‐access memory (RRAM) [10], phase‐change memory (PCRAM) [11], and ferroelectric memristors (FeRAM/FeMEM) [12, 13]. Among these, ferroelectric memristors tune resistance via fast spontaneous ferroelectric polarization switching, making them leading candidates for high‐performance neuromorphic devices [14, 15]. To realize this application potential in high‐density neuromorphic systems, device miniaturization and low‐power operation are the fundamental prerequisites for large‐scale integration, multifunctional adaptation, and industrial translation [16].

Significant progress has been made in inorganic memristors, with material systems and functional integration continuously expanded [17, 18, 19], and dimensional scaling and performance optimization of nanoscale devices and high‐density crossbar arrays iteratively advanced [20, 21, 22, 23, 24]. These developments have delivered reliable compatibility with standard CMOS processes and practical deployment in IMC chips [25]. Compared with inorganic counterparts, organic materials offer abundant functional groups and versatile synthetic routes for customizable device design [26], along with low‐cost, high‐throughput solution processability that avoids complex high‐vacuum fabrication, as well as inherent excellent flexibility and biocompatibility [27]. These intrinsic properties make organic memristors highly promising for flexible and bio‐integrated smart electronics [28, 29]. Recently, we proposed a promising architecture for high‐performance organic memristors, in the form of two‐terminal devices based on the organic molecular ferroelectric DIPAB with inherent in‐plane polarization [30, 31], which exhibits excellent solution processability and good environmental stability. However, both lateral channel scaling and large‐scale array fabrication are severely limited by the inherent incompatibility between organic functional materials and conventional photolithography [32, 33]. For this reason, further in‐depth studies are still required to verify the application potential of this DIPAB‐based device in lateral channel miniaturization and full‐solution semiconductor processing.

In this work, we demonstrate a submicron‐channel organic in‐plane polarization ferroelectric memristor with a solution‐processed heterojunction of DIPAB and semiconductor CuPc. The submicron channel electrodes of this device are precisely defined by NIL, which delivers electron‐beam lithography (EBL)‐equivalent patterning precision while enabling high throughput, low cost, and excellent large‐area compatibility [34, 35, 36, 37]. It is notable that our device exhibits low‐voltage operation with a writing voltage ≤1 V, and shows excellent synaptic characteristics at low voltage with dual‐mode multi‐level weight modulation (i.e., voltage writing‐voltage reading, and voltage writing‐optical reading). Image recognition simulations based on the device's physical properties and neural network algorithms achieve high accuracy with a simple network and few training epochs, validating its brain‐inspired chip functionality. This work may lay a foundation for scalable fabrication of low‐power high‐density organic ferroelectric memristors, and their applications in neuromorphic computing and wearable smart chips.

2. Results and Discussion

2.1. Morphology Characterization of Submicron Electrodes Fabricated via Nanoimprint Lithography

To fabricate submicron electrode channels, NIL was employed, as shown in Figure S1. Figure 1a–c shows the scanning electron microscopy (SEM) images of the silicon hard mold, the imprinted resist pattern, and the final metal electrodes, respectively. The designed interdigital electrode structures are clearly defined in all three images, with no visible defects or pattern distortion, indicating high‐fidelity pattern transfer throughout the process. High‐magnification SEM images (Figure 1d–f) reveal the critical dimensions of the patterns: the linewidths are 803 nm (hard mold), 802 nm (imprinted resist), and 798 nm (final electrodes), with a dimensional deviation of less than 1%, demonstrating high dimensional controllability and precision.

FIGURE 1.

Characterization of electrode pattern fabrication via optimized NIL. (a) SEM image of the silicon hard mold (scale bar: 10 µm). (b) SEM image of the imprinted resist pattern on the substrate. (c) SEM image of the final metal electrodes after lift‐off. (d) High‐magnification SEM image of the silicon hard mold. (e) High‐magnification SEM image of the imprinted resist pattern. (f) High‐magnification SEM image of the final metal electrodes. (g) AFM topography image of the final metal electrodes. (h) Cross‐sectional height profile extracted from the AFM image.

The atomic force microscopy (AFM) topography of the final electrodes (Figure 1g) shows a smooth surface, and the clear color contrast allows easy distinction between the electrodes and the underlying substrate. The corresponding cross‐sectional height profile (Figure 1h) confirms that the height difference between the substrate and the top surface of the electrodes is approximately 80 nm, which is consistent with the designed fabrication process. Electrodes with diverse channel lengths have also been fabricated via this NIL process, as presented in Figure S2. Hence, our optimized NIL process enables perfect, damage‐free pattern transfer from the hard mold to the final electrodes pre‐fabricated on the substrate, which facilitates device miniaturization and large‐scale array fabrication for our lateral organic interfaces.

2.2. 1 V Low‐Voltage Operation of the Fabricated Device

Figure 2a illustrates the basic architecture of our fabricated device. CuPc was dissolved in trifluoroacetic acid (TFA) to form a saturated solution, and then deposited via drop‐casting onto a substrate with pre‐patterned interdigital electrodes to serve as the semiconductor layer. The thickness of this CuPc layer was approximately 40 nm, with detailed characterization provided in Figure S3. A DIPAB thin film, acting as the top ferroelectric modulation layer, was prepared via blade‐coating, and its optical micrograph is presented in Figure S4. The blade‐coating direction was controlled to be perpendicular to the interdigital electrode channels, and thus yielded a highly crystalline, well‐oriented DIPAB ferroelectric layer with in‐plane polarization aligned along the blade‐coating direction [38]. The crystallinity, orientation, and ferroelectric properties of this DIPAB layer have been fully characterized in our previous works [30, 31]. Figure 2b shows the cross‐sectional schematic of the device, where the semiconductor layer isolates the ferroelectric layer from the bottom electrodes, with the ferroelectric polarization direction parallel to the device channel. Polarization charges modulate the energy band of the semiconductor layer, and in turn regulate the current flow through the device. The working mechanism is attributed to the field amplification effect of the ferroelectric layer, which modulates charge injection into the semiconductor layer and enables stable switching of ferroelectric polarization. To clarify this polarization‐dependent interfacial modulation, the energy band diagrams of the DIPAB/CuPc heterojunction under forward and reverse polarization conditions are provided in Figure S5. The screening charges injected from the electrodes also contribute to the conductivity of the horizontal interface [30].

FIGURE 2.

Device structure and performance characterization. (a) Schematic illustration of the fabricated DIPAB/CuPc device. (b) Cross‐sectional schematic of the device, with the ferroelectric polarization direction undergoing in‐plane switching. (c) Current–voltage (I–V) curve of the standalone DIPAB capacitor with the same device structure, measured by the double‐wave method at 298 K with a scan rate of ∼4 V s⁻¹. (d) Polarization hysteresis loop extracted from the measurement in (c) by integrating the current signal and normalizing it by the effective contact area of 8.4 µm². (e) I–V curves of standalone evaporated and solution‐processed CuPc films with the same structure, measured within the sweep range of ±1 V. (f) X‐ray diffraction (XRD) characterization results of evaporated and solution‐processed CuPc films. (g) I–V curves of the optimized device under different voltage sweep ranges. (h) I–V curves of the device under consecutive positive bias sweeps, (i) I–V curves of the device under consecutive negative bias sweeps.

Figure 2c displays the displacement current peaks of the lateral Au/DIPAB/Au capacitor measured via the double‐wave method, and directly reflects the reversal of ferroelectric polarization. The corresponding polarization hysteresis loop extracted from these measurements is shown in Figure 2d. The coercive electric field is approximately 10 kV/cm, consistent with previously reported results, and thus corresponds to a coercive voltage of ∼0.8 V in our device structure. It should be noted that a ferroelectric coercive voltage below 1 V alone is not sufficient to achieve ≤1 V modulation of the full device. As shown in Figure S6a, devices based on evaporated CuPc cannot achieve 1 V operation due to inadequate carrier transport. Therefore, in this work, we used a well‐established TFA‐based solution method to prepare CuPc films. This approach features a simple process and low cost, and more importantly, it yields films with significantly higher conductivity than evaporated CuPc films of the same thickness. As shown in Figure 2e, the current of unannealed solution‐processed CuPc at 1 V is approximately one order of magnitude higher than that of evaporated CuPc. X‐ray diffraction (XRD) measurements were performed on both evaporated and solution‐processed CuPc films, with the results shown in Figure 2f. The two samples exhibit nearly identical peak positions, both corresponding to α‐phase CuPc [39]. Compared with the high orientation of evaporated CuPc, solution‐processed CuPc shows relatively poor crystallinity, as caused by the volatilization of the TFA solvent during film formation. The enhanced conductivity could be ascribed to TFA as a strong protic solvent: it protonates CuPc to improve its solubility, while residual protons after solvent volatilization undergo charge transfer with CuPc molecules to form radical cations and increase carrier concentration [40, 41].

Despite the improved conductivity, the unannealed solution‐processed CuPc still cannot enable effective ≤1 V ferroelectric modulation, as is the case for the low‐conductivity evaporated CuPc film. The ferroelectric modulation characteristics of devices based on evaporated CuPc (Device i) and unannealed solution‐processed CuPc (Device ii) were compared, with the results presented in Figure S6b,c. Device ii showed better conductivity than Device i, but still requires 2 V to achieve effective ferroelectric modulation, while Device i cannot achieve effective modulation even at 2 V. This is because low‐conductivity semiconductors have fewer free carriers and more difficult tunneling, which slows and hinders the compensation of polarization charges by carriers and forms a large depolarization field. The intrinsic ferroelectric polarization is insufficient and unstable at 1 V, so an applied voltage of 2–3 V or higher is required to achieve sufficient ferroelectric polarization for effective modulation [42, 43]. When we attempted to improve the conductivity of the solution‐processed CuPc layer by increasing its thickness, the ferroelectric modulation capability disappeared despite the greatly improved conductivity, as shown in Figure S6d. This can be attributed to the reduced effective polarization area of the ferroelectric layer, decreased screening efficiency of the semiconductor, and an excessively high proportion of bulk current [44, 45]. We therefore optimized the conductivity of the thin solution‐processed CuPc films, and compared the I–V curves of solution‐processed CuPc treated under different annealing temperatures and durations, with the results shown in Figure S7. Finally, we fabricated the optimized DIPAB/CuPc device using 40 nm‐thick solution‐processed CuPc annealed at 150°C for 60 min, with its I–V characteristics shown in Figure 2g. When the applied bias voltage exceeded 1 V, the device exhibited clear I–V hysteresis in both positive and negative sweep measurements, and the hysteresis window widened with increasing voltage sweep range to show more pronounced resistive memory behavior. As shown in Figure 2h, the device current increased gradually in the positive voltage range under consecutive sweeps, and the device resistance modulated by previous voltage sweeps can be memorized and further reduced. This tunable multi‐level conductance originates from the stepwise ferroelectric polarization, driven by the gradual transition of the ferroelectric layer from multi‐domain to single‐domain states [46]. The same phenomenon was observed in the negative voltage range shown in Figure 2i. These characteristics align with the core property of memristors, in which the conductance largely depends on the history of charge flux through the device. Figure 2h,i confirms stable device operation within a 1 V voltage window, and clear hysteretic switching can also be obtained at operation voltages below 1 V, as shown in Figure S8. Lower operating voltages can be expected since further shortening the lateral channel would allow the required switching field to be reached at a lower external voltage.

2.3. Bimodal Synaptic Characteristics of the Ferroelectric Memristor

We characterized the synaptic performance of the fabricated DIPAB/CuPc ferroelectric memristor and investigated and discussed the underlying mechanism of its bimodal synaptic bionic behavior. The multi‐level conductance of semiconductors, regulated by the multi‐stage polarization of ferroelectric materials, serves as the fundamental basis for synaptic emulation. Benefiting from the excellent optoelectronic response of the introduced CuPc, our device responds to both electrical stimuli and optical stimuli at specific wavelengths. This enables bimodal synaptic characteristics, namely electrical writing‐electrical reading and electrical writing‐optical reading modes [30]. Figure 3a presents a schematic diagram of this bimodal synapse that responds to the two types of stimuli. For a biological synapse, a weak membrane potential stimulus only opens a small fraction of calcium ion channels. This limited ion influx triggers neurotransmitter release from the presynaptic membrane; the released neurotransmitters bind to receptors on the postsynaptic membrane and induce a short‐term potential change. In contrast, a strong membrane potential stimulus not only promotes massive calcium ion influx to enhance neurotransmitter release but, more importantly, upregulates the number of receptors on the postsynaptic membrane. This receptor upregulation leads to a long‐term and stable increase in synaptic weight. Such mechanisms are widely found in visual and nociceptive neurons [47], and our device can highly match and emulate the complete plasticity and signal transmission process of the above biological synapses. Specifically, we regulate the ferroelectric polarization state by applying pulse voltages exceeding the ferroelectric coercive voltage, which emulates the long‐term stable changes in synaptic weight (long‐term potentiation/long‐term depression, LTP/LTD) triggered by strong stimuli in biological synapses. We then collect the device conductance by applying a small read voltage below the ferroelectric coercive voltage. This process perfectly corresponds to the signal transmission of weak subthreshold stimuli in biological synapses: the presynaptic membrane releases neurotransmitters, which bind to postsynaptic receptors and induce a postsynaptic potential change. Notably, the measured conductance value (corresponding to the amplitude of the postsynaptic potential change) is completely determined by the current ferroelectric polarization state of the device (corresponding to the receptor concentration on the postsynaptic membrane, i.e., the synaptic weight). Optical signals generate photocurrent through a pathway distinct from electrical signals, enabling non‐destructive readout of the device conductance. This also corresponds to a second calcium ion influx pathway in biological synapses, which is independent of the electrical signal pathway. It is worth noting that optical signals cannot alter the synaptic weight, as only the CuPc semiconductor layer responds to optical stimulation.

FIGURE 3.

Electrical synaptic performance of the fabricated DIPAB/CuPc ferroelectric memristor. (a) Schematic of a synapse responsive to two types of stimuli; in the actual device, the corresponding stimuli are electrical and optical signals. (b) Device current response to 300 ms‐wide 1 V voltage pulses. (c) Current response under consecutive voltage pulses with varying widths. (d) Current evolution under alternating 40 positive/negative 1 V pulses (100 ms width). (e) ON/OFF‐state current variation across 2500 switching cycles.

The synaptic characteristics of the fabricated DIPAB/CuPc device were systematically characterized. Figure 3b shows the current response of the device to consecutive 1 V voltage pulses. The current response of the device increased gradually with the number of pulses, exhibiting a clear memory behavior. Figure 3c presents the current response of the device under voltage pulses with different widths. Notably, the tunable conductance range of the device expanded with increasing pulse width. Meanwhile, the ratio of current change after each applied pulse also increased, meaning that wider pulse widths enable the modulation of larger synaptic weight changes. Figure S9 shows the change in the current response of the device under electrical pulse signals with different amplitudes. The current response remained almost unchanged at a pulse amplitude of 0.5 V. Figure 3d shows the nearly linear and discretely tunable current response of the device under voltage pulse stimulation. The current increased under positive pulses and decreased under negative pulses, a behavior that is critical for neuromorphic computing. The current was recorded with a 0.3 V read voltage between consecutive 1 V voltage stimuli (100 ms pulse width). This read voltage does not disturb the polarization state, while ensuring that the measured conductance interval is not too small to lose application value. Under the present read‐voltage condition, the applied bias and the polarization‐induced stray field jointly determine the polarity and magnitude of the electrical response. Based on this operating condition, the minimum energy consumption for a single write operation event is estimated to be 23.31 pJ. Figure 3e demonstrates the cycling endurance of our device. The device was switched between the ON and OFF states by applying wide positive/negative pulses, and it maintained excellent stability after more than 2000 switching cycles. A slight decrease in the ON‐state current is observed during cycling, which may be associated with bias‐stress‐induced hole trapping in CuPc and slight redistribution of interfacial compensation charges during repeated operation. The retention behavior of the polarization‐programmed conductance state was further examined at a read voltage of 0.3 V. As shown in Figure S10, the programmed current remains relatively stable over the measured period, indicating good retention of the electrical state after ferroelectric polarization.

We further investigated the optoelectronic synaptic response of the device. The self‐driven photoresponse mechanism originates from the incomplete polarization screening induced by the semiconductor layer, which forms a net depolarization field inside the semiconductor [30]. Under light stimulation, this internal electric field promotes the separation of photogenerated excitons in the semiconductor. The separated carriers are then transported to the two electrodes, respectively, generating a self‐driven photocurrent, as shown in Figure S11. The direction of the photocurrent is opposite to the polarization direction, as the orientation of the depolarization field is always opposite to that of the ferroelectric polarization. Figure 4a compares the I–V curves of the DIPAB/CuPc memristor in the dark and under illumination at two polarization states, denoted as ‘S+’ and ‘S−’. It can be seen that the current under illumination is closely related to the ferroelectric polarization, and the self‐driven photocurrent at 0 V is opposite to the polarization direction.

FIGURE 4.

Optoelectronic synaptic characteristics of the fabricated DIPAB/CuPc ferroelectric memristor. (a) I–V characteristics of the device in forward/reverse polarization states under dark and illumination. (b) Photoresponse of the device after 1 V polarization, inset showing response time <10 ms. (c) Photocurrent response under different light intensities after polarization with varying durations (100% intensity = 25.7 mW/cm²). (d) Self‐driven photocurrent evolution under alternating 50 positive/negative 1 V pulses (100 ms width). (e) Self‐driven photocurrent evolution under 30 positive/negative 1 V pulses (300 ms width) from the initial state. (f) Self‐driven photocurrent variation over 3000 switching cycles in positive/negative polarization states.

Figure 4b depicts the photoresponse characteristics of the device after polarization. Both the rise and fall times of the photocurrent during detection were below 10 ms. We programmed the device to different polarization states by applying 1 V voltage pulses with different widths, and measured the change in self‐driven photocurrent under different light stimulus intensities. As shown in Figure 4c, the photoresponse under different states showed distinguishable and nearly linear feedback to light intensity, which meets the requirements of in‐sensor computing‐in‐memory devices. In Figure 4d, the self‐driven photocurrent of the device exhibited quasi‐linearity, discreteness, and tunability under 1 V electrical pulse stimulation with a 100 ms pulse width, while maintaining stability over multiple cycles. As shown in Figure 4e, we also successfully configured larger positive and negative self‐driven photocurrents from the initial state by increasing the pulse width, demonstrating the flexibility of photoresponse modulation. In Figure 4f, we investigated the cycling endurance of the device after repeated photoconductance switching by continuous application of positive and negative pulses. The device maintained a stable response after 3000 cycles. The stability of the polarization‐dependent self‐driven photoresponse was also evaluated over time. As shown in Figure S12, the device exhibits relatively stable self‐driven photocurrent responses in both positively and negatively poled states, indicating that the polarization‐modulated photoelectric function is maintained over the tested period.

To evaluate process repeatability, ten parallel DIPAB/CuPc devices fabricated in the same batch were measured. As shown in Figure S13, all devices exhibit clear memristive hysteresis within a 1 V operation window during repeated I–V scans. Their electric response at 0.3 V and self‐driven photocurrent responses after positive and negative poling are summarized in Figure S14. Despite certain device‐to‐device variations, the overall switching characteristics and polarization‐dependent photoresponses remain comparable, suggesting reasonable batch‐level repeatability and potential scalability of this organic ferroelectric memristor architecture.

2.4. Image Recognition Simulation Based on Synaptic Characteristics

Based on the electrical and optoelectronic synaptic characteristics of the device, simulations of image recognition tasks based on artificial neural networks were carried out. Figure 5a presents the convolutional neural network (CNN) architecture for 28 × 28 handwritten digit image recognition based on the electrical synaptic characteristics. It has a simple structure including a 28 × 28 input layer, a 5 × 5 convolutional layer, a 2 × 2 pooling layer, a flatten layer, a fully connected layer, and an output layer. Figure 5b shows the artificial neural network (ANN) model for 32 × 32 speed limit sign image classification based on the optoelectronic synaptic characteristics. Its structure is also very simple, including only an input layer, a hidden layer, and an output layer. Figure 5c presents the n × n crossbar array structure used to perform multiply‐accumulate (MAC) operations for neural network computing. The value of n was set to 5 and 32 according to the requirements of the two applications, respectively. The actual physical characteristics of the device were considered during neural network training. The discrete weight values used in both algorithms were experimentally measured from the memristor, extracted from Figures 3d and 4e, respectively. Non‐ideal effects such as noise current and leakage current were also introduced into the simulation. Figure 5d,e shows the variation curves of accuracy and loss with training epochs for the two algorithms during training. The final training accuracy reached 95.2% and 96.3%, respectively. Figure S15 presents the confusion matrices of the two trained neural networks for image recognition, demonstrating a high level of image recognition and classification performance. A comparison between this work and recently reported organic memristor‐related devices is further summarized in Table S1.

FIGURE 5.

Simulation of image recognition tasks. (a) CNN architecture for handwritten digit classification. (b) ANN architecture for speed limit sign classification. (c) Schematic of the memristor crossbar array. (d) Accuracy and loss curves for handwritten digit classification during training. (e) Accuracy and loss curves for speed limit sign classification during training.

3. Conclusion

In summary, we successfully fabricated a two‐terminal organic ferroelectric memristor with a submicron channel and lateral in‐plane polarization, which achieves an operating voltage of ≤1 V. We prepared submicron to nanoscale electrodes via nanoimprint lithography. This process features simple operation, high stability, and compatibility with high‐throughput device fabrication. On this basis, we constructed the heterojunction functional layer composed of organic molecular ferroelectric DIPAB and organic semiconductor CuPc. Both functional materials were fabricated through solution processes. By optimizing the process parameters of solution‐processed CuPc films, we realized precise tuning of the film conductivity, and further clarified that a well‐defined conductivity window of the semiconductor layer is required to achieve ≤1 V low‐voltage operation of the device. Electrical and optoelectronic characterization results show that the device exhibits excellent bimodal synaptic characteristics at 1 V operating voltage, enabling image recognition applications based on artificial synaptic properties. This work offers reliable experimental evidence and a feasible technical path for feature size scaling and large‐scale array integration of organic ferroelectric memristors with lateral conduction channels.

4. Experimental Methods

4.1. Electrode Fabrication

SiO₂/Si substrates were sequentially ultrasonicated in acetone, isopropanol, and deionized water for 30 min and dried using a high‐purity nitrogen gun. After cleaning, the substrates were spin‐coated with a bilayer resist consisting of TU7 and LOR5B. Si hard master molds with predefined patterns were fabricated through EBL and etching processes, and the patterns on the hard master were then transferred to the IPS soft mold by thermal nanoimprint lithography. Afterwards, ultraviolet nanoimprint lithography (UV‐NIL) was performed with the IPS soft mold to transfer patterns onto the resist layer on the substrate. After imprinting, residual resist was etched away by O₂‐based RIE, followed by sacrificial layer removal through a standard development process. Next, Cr (10 nm)/Au (70 nm) electrode stacks were deposited via physical vapor deposition (PVD). Finally, target electrode channels on the substrate were obtained through a lift‐off process.

4.2. Device Fabrication

Except for DIPAB, which was synthesized following the method reported in the literature [48], all other materials and reagents used in this work were commercially available. CuPc was dissolved in trifluoroacetic acid, and a clear saturated solution was obtained after filtration. The CuPc thin film was deposited onto the pre‐fabricated electrode‐patterned SiO₂/Si substrates by drop‐casting at 45°C, followed by annealing at 150°C for 60 min in a nitrogen atmosphere. Finally, the ferroelectric DIPAB thin film was fabricated onto the CuPc layer via blade‐coating, and annealed at 80°C for 60 min in air.

4.3. Characterizations

Morphologies of the fabricated electrodes were characterized by SEM and AFM. The thickness of the solution‐processed CuPc layer was measured by AFM. XRD patterns of CuPc were recorded at room temperature using an X‐ray diffractometer.

4.4. Electrical Measurements

The device samples were mounted on a probe station, and their electrodes were connected to a source meter (Agilent B1500A) for electrical characterization. For optoelectronic response‐related characterization, a 633 nm laser was used as the light source.

4.5. Image Recognition Simulation

The MNIST handwritten digit recognition task utilized the public MNIST handwritten digit dataset, which consists of 60 000 training samples and 10 000 test samples of 28 × 28 pixel grayscale images. During the training phase, data augmentation was performed on the images via random translation (±3%) and random rotation (±3%). The 28 × 28 grayscale images were normalized to the range of 0–1 and then fed into the CNN. Weights of each network layer were normalized, linearly mapped, and further quantized into discrete memristor conductance values. The network was trained using the AdamW optimizer combined with a cosine annealing learning rate scheduler, and the optimal model was saved via an early stopping mechanism. The output layer of the network was configured with the same number of neurons as the target classification categories, and the probability distribution of each image category was output via the softmax activation function. The neuron index corresponding to the maximum probability value was extracted using the argmax function, which was taken as the final classification result.

For the speed limit sign classification task, the training dataset was automatically generated via a Python algorithm, comprising 8 categories of 32 × 32 pixel black‐and‐white binary speed limit sign images with 1000 samples generated per category. During the generation process, random rotation (±15°), Gaussian noise (σ = 0.02), and random pixel loss (probability of 1%) were added to simulate real‐world shooting scenarios. The dataset was randomly split into training, validation, and test sets at a ratio of 8:1:1. The 32 × 32 grayscale images were flattened into 1 × 1024 one‐dimensional vectors, standardized, and then input into the network. Weights of the input layer were normalized, linearly mapped, and discretely quantized to convert into photoresponsivity values of a 32 × 32 memristor array. The network was trained using the Adam optimizer and a cosine annealing learning rate scheduler; the result of the output layer was processed to extract the neuron index corresponding to the maximum value via the argmax function, and this index was matched with a label encoder to obtain the final classification result.

Funding

This work was supported by the National Key Research and Development Program of China for International Cooperation under Grant 2023YFE0117100, and the National Natural Science Foundation of China (Nos. 62074040 and 62074045).

Conflicts of Interest

The authors declare no conflict of interest.

Supporting information

Supporting File: smtd70740‐sup‐0001‐SuppMat.docx.

Data Availability Statement

The data that support the findings of this study are available from the corresponding author upon reasonable request.