A Synergistic Process Optimization and Data‐Driven Modeling Strategy for Unraveling and Enhancing the Low‐Light Response in Back‐Contact Solar Cells

ABSTRACT

The interdigitated back contact (IBC) structure offers high efficiency potential for crystalline silicon solar cells, yet its low‐light performance (LLP) faces ongoing debates. This study systematically investigates LLP mechanisms in back contact (BC) cells via process optimization, simulation, and machine learning (ML). We identify leakage paths caused by residual “cap‐shaped” borosilicate glass in rear p‐type poly‐Si regions as a critical bottleneck. By optimizing laser grooving through gap adjustments and additive engineering, the LLP of tunnel oxide passivated contact (TBC) cells is elevated to match that of TOPCon cells, reducing power loss to below 5%. Using SunSolve and Quokka3 simulations, we analyze module‐level double‐diode parameters and device‐to‐module losses. ML‐driven data mining reveals an inherent trade‐off between LLP and power conversion efficiency (PCE). To resolve this, we develop a multi‐head neural network integrated with an evolutionary algorithm for co‐optimization. This yields a candidate parameter set that effectively balances PCE and LLP across both TOPCon and TBC solar cells. Our work clarifies the microscopic origins of LLP limitations and provides a practical framework for designing high‐efficiency BC cells with superior low‐light response, accelerating industrial application.

This study investigates the mechanisms limiting back‐contact solar cells' low‐light performance (LLP) and proposes an optimization strategy. Laser grooving eliminates leakage paths, reducing LLP power loss to <5%. Simulations and machine learning reveal a fundamental trade‐off between LLP and efficiency. A multi‐head neural network combined with an evolutionary algorithm is developed to co‐optimize both for high‐performance cell design.

1. Introduction

Due to their excellent contact and passivation properties, tunnel oxide passivating contact (TOPCon) solar cells (SCs) have become the dominant technology in commercial crystalline silicon (c‐Si) photovoltaics (PVs). Through continuous process and structural optimization, the efficiency of industrialized TOPCon SCs has reached 27.02% (as shown in Figure 1A) [1], approaching its auger limit of 29.4% [2]. However, further efficiency improvements face challenges. Currently, the interdigitated back contact structure, especially the TOPCon‐based back contact (TBC) structure, is regarded as a promising future direction for c‐Si SCs. In this structure, front grid lines are moved to the back side, with alternating n‐type and ptype doping of the back electrodes, thereby eliminating front grid shading while retaining the advantages of back‐side passivation. To date, the efficiency of mass‐produced silicon heterojunction‐based back contact (HBC) cells has reached 27.81% [3]. In addition, global PV shipments reached 502 GW in 2024 and are projected to increase to 566–650 GW in 2025–2026 [4]. As shown in Figure 1B, the market share of IBC‐type modules is increasing annually, particularly in the high‐end market.

FIGURE 1.

(A) Historical progression of PCE for TOPCon and TBC SCs. (B) Market share of various PV module technologies from 2021 to 2028 [4], where years suffixed with “F” indicate forecasts based on historical data. (C) Field‐measured energy yield gain of BC and TOPCon modules from LONGi, Jinko, and Trina. The y‐axis represents the energy gain, and the x‐axis denotes time in 1‐h intervals throughout the day. (D) Schematic of the TBC cell, where the red dashed lines indicate possible leakage channels. (E) Top‐view illustration of back‐contact electrodes in a BC cell. (F) Schematic of the TOPCon cell, where the red dashed lines indicate possible leakage channels.

Currently, the efficiency or power of SCs is usually measured under Standard Test Conditions (STC) (25°C, 1000 W/m² irradiance). However, in real‐world operation, irradiance often falls below 1000 W/m² due to factors such as diurnal variations, cloud scattering, and dust shading, resulting in low‐light power generation conditions [5, 6]. Low‐light performance (LLP) significantly influences the actual energy yield of SCs, yet the LLP characteristics of BC cells remain a subject of ongoing debate. On one hand, existing test reports present conflicting conclusions. For example, Figure 1C compares the power generation of BC and TOPCon modules as reported by Longi, Jinko, and Trina Solar. Data from these manufacturers lead to sharply contrasting results. In 2024, Longi's HBC modules generated 2.95% more power than TOPCon modules at a Qinghai power station [7], and 6.67% more at a Yunnan power station in 2025 [8]. In the same year, however, TÜV Nord reported that Jinko’ s TOPCon modules achieved 10.79% higher power generation under low‐light conditions than BC modules at a demonstration plant in Kagoshima, Japan [9], while CPVT verified in Yinchuan, Ningxia, that Jinko's TOPCon produced 3.89% more energy on cloudy days [10].

On the other hand, existing research findings are also inconsistent. In IBC cells, back electrodes are isolated by insulation regions, though in some TBC layouts, interdigitated electrodes may be in direct contact (Figure 1D) [11, 12], resulting in more leakage channels (as shown in Figure 1E) and thus degraded LLP [13]. By contrast, as shown in Figure 1F, in TOPCon cells, the front and back electrodes are located on both sides of the substrate, with similar leakage channels likely occurring only at the edges due to laser cutting‐induced passivation issues [14, 15], leading to higher shunt resistance and better LLP performance. Currently, numerous process improvements are being explored for BC cells. For instance, Tong et al. [16]. significantly reduced leakage losses by optimizing gap width, optical structure, and metallization; Wu et al. [17]. used fine laser processes to reduce the n/p boundary recombination (J ₀₂) to 0.6 nA/cm². While these and other representative LONGi BC studies [3, 16, 18] have focused on maximizing STC efficiency without evaluating low‐light performance (Table S1), they collectively demonstrate that leakage issues in BC cells can be mitigated—though their low‐light performance still requires further exploration.

Regarding mechanistic studies, current research has been restricted to LLP as a sole metric and predominantly rely on traditional macroscopic equivalent diode models. Firoz et al. [19]. systematically studied the evolution of the single‐diode silicon solar cell parameters [series resistance (R _s), shunt resistance (R _sh), ideality factor (n), and reverse saturation current (I ₀)] with illumination intensity, revealing distinct trends and validating the model's predictive accuracy. Reich et al. [20]. conducted a fundamental analysis of the relationships between the four double‐diode equivalent model parameters [R _s, R _sh, the first diode dark saturation current density (J ₀₁) associated with recombination in the space‐charge region J ₀₂], low light, and the four I–V parameters, using the diode equivalent model and measured data. Mavromatakis et al. [6] analyzed the low‐light power loss mechanisms of various PV technologies (including crystalline silicon, CdTe, and CIGS), attributing them to parasitic resistance phenomena, where R _sh decreases as irradiance decreases, and shunt current increases, leading to nonlinear changes in low‐light power losses. Zhu et al. [21]. studied the power output of perovskite SCs under indoor low‐light conditions, and also examined the relationship between R _sh, low light, and fill factor (FF), finding that modules with low R _sh experience a sharp drop in FF under low light, which they attributed to larger leakage currents and space charge limited current (SCLC) effects. These investigations highlight the significant impact of leakage current (low R _sh) on LLP. However, studies relying on macroscopic simulation models, such as single‐diode or double‐diode equivalent circuits, fail to capture physical information at the microscopic charge carrier level. Moreover, a systematic co‐optimization of both LLP and PCE metrics is still lacking.

To address these issues, this study focuses on TBC SCs as a representative IBC technology and comprehensively investigates their LLP and influencing factors through a combined approach of process optimization, experimental validation, and simulation analysis. First, from a process improvement perspective, we analyze the cause of leakage in the back interdigitated electrodes of TBC cells, attributing it to the “cap‐shaped” morphology of boron silicate glass (BSG) that forms leakage paths. By optimizing the gap width and implementing additive engineering, we significantly mitigate leakage in the gap region of TBC cells, achieving LLP comparable to TOPCon with a low power loss (below 5%). Second, using SunSolve and Quokka3 simulation tools, we calculate in detail the series and shunt resistance for commercial high‐power TOPCon and TBC modules and examine the factors affecting LLP. The results show that optical design differences are negligible, with the main influences arising from electrical characteristics; among the electrical parameters, R _s and J ₀₂ are the primary factors affecting LLP, whereas the conventionally emphasized R _sh has a relatively minor impact. Furthermore, we employ machine learning (ML) tools to establish relationships between device‐level electrical parameters, module‐level parameters, I–V characteristics, and LLP. Using a two‐tier ML model, we assess the impact of device‐level parameters on output performance, identify the gap width (GW, W _gap) as a critical factor for TBC cells, and reveal a trade‐off between LLP and power conversion efficiency (PCE). Finally, we design a multi‐head neural network (MNN) to predict LLP, PCE, and loss values, and apply a differential evolution algorithm (DEA) to optimize the parameter set that balances LLP and PCE. We also analyze the loss components in HJT and HBC cells during the optimization process, providing strategic insights for designing solar cells that balance LLP and efficiency.

2. Result and Discussion

2.1. Fabrication Process Optimization for BC SCs

We first analyze the measured data of commercial TBC and conventional TOPCon half‐cut small cells, and the results confirm that leakage issues in the TBC cells represent a key factor contributing to their LLP performance. As shown in the box plot in Figure 2A, the measured results (Initial TBC) exhibit a lower average R _s of 0.2 Ω cm² and a lower average R _sh of 136.7 kΩ cm², compared to TOPCon cells, which have an average R _s of 0.3 Ω cm² and an R _sh of 259.8 kΩ cm². In addition, the TBC cells exhibit higher recombination currents, with J ₀₁ of 16.4 fA/cm² and J ₀₂ of 3.6 nA/cm², compared with TOPCon (J ₀₁ = 12.0 fA/cm² and J ₀₂ = 0.2 nA/cm²). Moreover, the scatter plot distributions in Figure 2B reveal that the overall LLP of initial TBC is lower than that of TOPCon SCs. The “Optimized TBC” group in Figure 2A,B contains two sequentially improved batches: the light‐blue points (with gap width adjustment only) show substantially improved R _s, J ₀₁, J ₀₂, and LLP despite persistently low R _sh, whereas the dark‐blue points (with further addition of SDBS) exhibit a marked R _sh increase with no significant additional LLP gain, suggesting that R _sh may not be the dominant factor governing LLP. To investigate the root cause of the inferior LLP in TBC SCs, we conducted a detailed analysis and identified that the issue originates from leakage pathways along the sidewalls of the p‐poly regions. The overall standard TBC process flow chart is shown in Figure S1A, where complexity primarily stems from the back electrode design, which requires multiple etching and laser grooving steps. Cross‐sectional scanning electron microscopy (SEM) images of the initial and optimized TBC SCs, shown in Figure 2C, reveal that at the edge of the gap region between the interdigitated back contacts, the borosilicate glass (BSG) layer covering the p‐poly region extends outward, forming a “cap‐shaped” residual structure. The BSG+p‐poly+SiO_x film stack is at most 240–250 nm in total thickness, yet the structure measures approximately 5 µm in lateral extent and reaches roughly 0.7 µm at its thickest point. These dimensions indicate that the cap‐shaped residue is a wedge incorporating the BSG+p‐poly+SiOx stack together with a portion of the underlying c‐Si substrate. During the subsequent laser grooving step, this overhanging structure partially shields the underlying region, preventing complete removal of the n ⁺ poly material. Consequently, n ⁺ poly leakage channels remain along the sidewalls of the p‐poly electrodes. We attribute the formation of these leakage pathways primarily to aggressive parameter settings in the original process flow. As illustrated in Figure S1B, boron diffusion produces a BSG layer with a high boron concentration profile on the silicon surface. During the subsequent alkaline etching step, the etching rate of heavily boron‐doped BSG is substantially lower than that of the underlying silicon, at typical alkaline etching temperatures (∼65–75°C), silicon is etched approximately 500–2500 times faster than BSG [22, 23]. The c‐Si beneath the BSG is therefore preferentially etched from the sidewalls at a faster rate, leaving the BSG overhanging as a “cap‐shaped” residue within the same etching duration [24]. Moreover, as shown in Figure S2A, the preset laser grooving width of 50 ± 20 µm proved insufficient. This resulted in the formation of leakage holes​ directly connecting the n‐poly and p‐poly regions, thereby creating substantial risks of electrical short‐circuiting in light of the actual alignment accuracy of the laser equipment.

FIGURE 2.

(A) Boxplots of the measured dual‐diode four‐parameters for TOPCon, initial TBC, and optimized TBC SCs. (B) Scatter plots of dual‐diode four‐parameter and LLP distributions for the three relevant devices. In both panels, within the “Optimized TBC” group, light‐blue data points correspond to cells with only gap width adjustment, while dark‐blue data points correspond to cells further incorporating SDBS as an additive. (C) Cross‐sectional SEM images of rear p‐poly region for the initial and optimized TBCs, along with the corresponding schematic diagrams.

To address these two issues, we perform additive engineering and process parameter optimization. In the optimized process flow, sodium dodecyl benzene sulfonate (SDBS) was introduced during the third‐step alkaline wet etching shown in Figure S1. As the Molecular structures shown in Figure S3A, SDBS is a benzene‐ring‐containing anionic surfactant with a substantially lower critical micelle concentration than its nonaromatic analogue SDS (∼1.2 mM vs. ∼8.0 mM) [25], endowing it with superior interfacial stability. SDBS eliminates the cap‐shaped BSG residues through four synergistic mechanisms: (i) SDBS molecules adsorb at the solid–liquid interface, forming a dense adsorbed layer that moderates the etching rate of the underlying c‐Si by retarding OH⁻ diffusion toward the silicon surface (Figure S3B) [26]; (ii) SDBS adsorption reduces the contact angle at the solid–liquid interface, improving etchant wettability and enabling uniform penetration into the narrow gap beneath the BSG overhang (Figure S3C) [27] (iii) simultaneously, SDBS lowers the gas–liquid interfacial tension, breaking large H₂ bubbles generated during the etching reaction into smaller ones and accelerating their detachment from the surface, thereby eliminating the bubble‐induced pseudo‐mask effect that would otherwise cause nonuniform etching (Figure S3D) [28]; and (iv) the sulfonate groups (─SO₃ ⁻) of SDBS coordinate with unsaturated dangling bonds on the c‐Si surface, providing surface passivation analogous to that of perfluorosulfonic acid polymers (Figure S3E) [15]. These four mechanisms act synergistically—(i) and (iv) moderate the c‐Si etch rate at the chemical level, while (ii) and (iii) ensure etching uniformity at the physical level—bringing the etching rates of BSG and the underlying c‐Si toward parity, thereby suppressing cap‐shaped residue formation.

Furthermore, during the subsequent laser grooving, the gap region width was increased from the aggressive 50 ± 20 µm to 80 ± 20 µm. As a result, the electrical performance of the optimized TBC (Figure 2A) shows a marked reduction in J ₀₁ and J ₀₂ (averaging 12.6 fA/cm² and 0.4 nA/cm², respectively), while R _sh and R _s values increase, with a mean value R _s 0.5 Ω cm² and a mean R _sh 322.0 kΩ cm². These parameters are comparable to those of TOPCon SCs. In the LLP scatter plots, optimized TBC and TOPCon also demonstrate similar performance levels. The LLP scatter plots (Figure 2B) further demonstrate that the optimized TBC cells achieve a performance level similar to that of TOPCon. As shown in the schematic and cross‐sectional SEM image in Figure 2C, the cap‐shaped BSG residual layer has been eliminated. Figure S2B shows that the edge of the p‐poly region is clearly defined, and the increased gap width ensures that no direct n‐poly‐to‐p‐poly leakage paths are present in the microscope image.

2.2. Dominant Factors of Low‐Light Performance

According to the single‐diode equivalent model, the low‐light performance φ _0.2 of cell modules can be calculated using the following equation, with the derivation process shown in Note S1. Where R _CH denotes the characteristic resistance, defined as $R_{CH}=\frac{V_{oc}}{I_{sc}}$. From Equation (1), it is evident that when V _oc and I _sc are fixed, an increase in R _s and R _sh leads to an increase in φ _0.2, which aligns with our experimental results. However, the specific effects of R _s and R _sh on low‐light performance, as well as the role of dark current components in the more realistic double‐diode model, still require further investigation.

$${\phi }_{0.2}\approx \left(1-\frac{0.042V}{V_{oc}}\right)\left(1+\frac{0.8}{\frac{R_{CH}}{R_s}-1}\right)\left(1-\frac{4}{\frac{R_{sh}}{R_{CH}}-1}\right)$$ (1)

To further explore the influence of the double‐diode model parameters on LLP, we conduct simulations using SunSolve, with the actual measured parameter values from commercial high‐efficiency TOPCon and TBC modules for the simulations. The simulation results show that differences in external quantum efficiency (EQE) and photogenerated current, such as anti‐reflection coatings, encapsulation materials, have a limited impact on LLP. In contrast, electrical characteristics, particularly R _s and J ₀₂, are the dominant factors. Specifically, a lower R _s reduces series resistance power loss, and a lower J ₀₂ mitigates recombination losses under low irradiance, both contributing to improved LLP. In contrast, the effect of R _sh, while notable in certain previous studies, was less pronounced in our simulations, likely due to the optimized passivation in the tested modules.

We select two commercially available TOPCon and TBC modules for simulation using SunSolve software to analyze the relationship between the four equivalent model parameters (R _s, R _sh, J ₀₁, and J ₀₂) and LLP. The layer configurations used in the simulation and their corresponding experimentally measured I‐V characteristics are shown in Figure S4 and Table S2, respectively. The TBC and TOPCon modules share identical layer settings, differing only in electrode layout. We first calculate and compare the LLP of both modules. As illustrated in Figure 3A, the red and blue curves represent the LLP profiles of the initial TBC and TOPCon modules under their original simulation parameters, respectively. Across all irradiance levels, TBC modules exhibit lower LLP values than TOPCon modules under low‐light conditions. Based on the analytical approach derived from Equation (1), we attribute this LLP difference to the less favorable electrical parameters of TBC modules compared to TOPCon modules. Therefore, we adjusted the R _s value of the initial TBC modules from 0.38 Ω·cm² to 0.99 Ω·cm² to match that of TOPCon modules. The resulting LLP curve of R _s‐modified TBC, shown as the green line in Figure 3A, indicates that the LLP of TBC modules becomes nearly comparable to that of TOPCon modules after this adjustment.

FIGURE 3.

(A) Simulated LLP as a function of incident irradiance of TBC and TOPCon modules using SunSolve simulation, where the initial and R _s modified TBC indicates cases before and after series resistance modification. (B) Simulated EQE and transmittance curves of TBC and TOPCon modules. (C) P‐V curves of TOPCon, initial, and R _s modified TBC modules at 200 and 1000 W/m² irradiance. (D) Contributions of various parts to the R _s of the two types of modules. (E) Contribution ratio of various components to the difference in LLP between TOPCon and TBC at 200 W/m² irradiance. (F) Heatmap of R _s, R _sh, and simulated LLP, where the color intensity corresponds to the LLP values. Relationship between (G) R _s, (H) R _sh, and (I) J ₀₂ and simulated LLP.

As shown in Figure 3B, the TBC module exhibits a higher photogenerated current (40.72 mA/cm² vs. 39.83 mA/cm² for the TOPCon module) and greater external quantum efficiency (EQE) in the short‐wavelength region. The corresponding P‐V curves in Figure 3C indicate that the initial TBC modules achieve higher power output, along with higher I _sc and V _oc. For the initial TBC modules under these optical conditions, the LLP is lower than that of the TOPCon modules. However, when R _s is modified, as in the R _s‐modified TBC module, the maximum power point (MPP) under 1000 W/m² irradiance slightly decreases, whereas the power output at 200 W/m² remains nearly unchanged. As a result, the LLP of the R _s modified TBC module improves and approaches that of TOPCon modules, as shown in Figure 3A. These results indicate that the LLP is primarily influenced by the electrical parameters of the module rather than its optical performance. Moreover, the increase in LLP observed with higher R _s is achieved at the expense of reduced power output under standard 1000 W/m² conditions.

As discussed in Section 2.1, the initially low LLP in TBC modules was attributed to leakage pathways caused by process‐related issues. The optimized process, as confirmed by experimental results, effectively improves the R _s and R _sh of TBC SCs. In a complete module, however, R _s is not determined solely by the internal resistance at the solar cell level but is also affected by external circuit components such as the grid, ribbon, and tabbing. To better understand the R _s distribution, we conducted a detailed calculation of the total series resistance and its contributions for both TOPCon and initial TBC modules. As shown in the bar chart in Figure 3D, the total R _s of the TOPCon modules is higher than that of the TBC module. This difference mainly arises from lower values of inner resistance, contact resistance, and doping resistance in the TBC module, which can be attributed to its better passivation quality, resulting in reduced internal resistances. The lower ribbon resistance in TBC is due to the use of 0.6 × 0.4 mm rectangle ribbons, which have a larger cross‐sectional area and hence lower R _s compared to the 0.22‐ or 0.24 mm diameter round ribbons typically used in TOPCon modules. On the other hand, the denser back‐side grid lines in TBC lead to a higher grid resistance compared to TOPCon. At 200 W/m² irradiance, the LLP difference between the TOPCon and initial TBC modules is 3.07% (Figure 3A). To understand the origin of this difference, we evaluated the contribution of individual parameters, namely R _s, R _sh, J ₀₁, and J ₀₂, through a controlled variable analysis. In this method, all parameters were kept constant except one, which was set to its actual measured value in the module, and the resulting impact on LLP gap values was assessed. The results, shown in the pie chart of Figure 3E, reveal that while the TOPCon module exhibits higher R _s, R _sh, J ₀₁, and J ₀₂ compared to TBC, the dominant contributors to the LLP difference are R _s and J ₀₂; R _sh accounts for only 3.47% of the LLP gap value. Furthermore, the majority of the R _s related difference stems from diffusion resistance and ribbon resistance. The lower diffusion resistance in TBC is consistent with its better emitter passivation quality, while the 19.38% contribution from ribbon resistance highlights the significant role of external circuit design in determining the LLP performance of photovoltaic modules.

The aforementioned analysis revealed the influence of J ₀₂ and R _s on LLP. We next investigated the combined relationships among the four double‐diode model parameters and their individual impacts on LLP. Using the existing simulation model, we performed parameter scans for R _sh, R _s, J ₀₁, and J ₀₂ across the ranges specified in Table S3, including both random combination sampling and single‐parameter scanning. Specifically, we scanned two parameter pairs: R _sh together with R _s, and J ₀₁ together with J ₀₂. The correlation between each parameter pair and LLP was visualized using heatmaps. Figure 3F presents a heatmap based on random parameter combinations, illustrating the relationship between R _s–R _sh and LLP, with color intensity representing the magnitude of LLP. From this heatmap, it is evident that LLP is strongly constrained by R _sh. A pronounced nonlinear relationship exists between R _sh and LLP, characterized by a distinct threshold in the range of approximately 0.1–1 kΩ cm². When R _sh exceeds this threshold (∼1 kΩ cm²), its influence on LLP becomes weak and can be considered negligible; in this regime, LLP is predominantly governed by R _s along the horizontal axis, with LLP increasing as R _s increases. However, once R _sh falls below the threshold, LLP drops sharply with decreasing R _sh, and the effect of R _s is completely overwhelmed by the strong influence of R _sh. Similarly, heatmaps for J ₀₁ and J ₀₂ in relation to LLP are provided in Figure S5. These exhibit a trend parallel with that in Figure 3F, showing a strong negative correlation between LLP and J ₀₂, whereas J ₀₁ only weakly influences the contour boundaries of the J ₀₂–LLP relationship. These results confirm that LLP is primarily governed by R _s and J ₀₂, which is consistent with the analysis results presented in Figure 3E.

To further quantify these relationships, we conducted single‐parameter scan analyses. The results (Figure 3G–I) corroborate the Figure 3F heatmap findings. Notably, even the minimum R _sh value measured for TBC before process optimization (26.0 kΩ cm²) lies well above the ∼1 kΩ cm² threshold, explaining why R _sh variations exert negligible influence on LLP under typical manufacturing conditions. For J ₀₂, a quantitative estimate from the single‐parameter scan indicates that an increase from 0.1 to 2 nA/cm² reduces LLP by 1.94% for TOPCon and 1.86% for TBC. In contrast, J ₀₁ exhibits no significant correlation with LLP (Figure S6). Collectively, these single‐parameter results reinforce the conclusion that R _s and J ₀₂ are the dominant factors governing LLP. It is important to note that the detrimental effect of “leakage channels” observed in TBC cells does not primarily arise from a reduction in R _sh—since even the pre‐optimization R _sh (26.0 kΩ cm²) already lies far above the ∼1 kΩ cm² threshold where R _sh becomes critical. Rather, the leakage pathways degrade LLP by introducing additional recombination centers that elevate J ₀₂ and by altering the effective series resistance, both of which are the true dominant parameters identified by our simulation and experimental analyses.

2.3. Machine Learning‐Driven Performance Optimization

In Section 2.2, we conducted an in‐depth analysis of the influence of four module‐level double‐diode equivalent circuit parameters, specifically R _s, R _sh, J ₀₁, and J ₀₂, on LLP, with a particular focus on the distinct contributions of different R _s components and R _sh. However, a key contradiction emerges from the analysis in Section 2.2: conventional cell‐level performance optimization techniques, such as interface passivation and improved silicon wafer quality, are primarily aimed at reducing R _s to enhance cell efficiency, while the findings in Section 2.2 demonstrate that LLP improvement is achieved by increasing R _s (thereby sacrificing efficiency). This apparent contradiction can be understood from the definition of LLP (Equation S1 in Note S1): a larger R _s suppresses the STC power in the denominator more strongly than the low‐irradiance power in the numerator, thereby inflating the LLP ratio. This explains the observed positive R _s–LLP correlation, but also reveals that simply increasing R _s is a definitional artifact rather than a physically meaningful improvement strategy—an elevated R _s could reflect either genuine insulation enhancement (reduced leakage) or degraded contact quality, which are indistinguishable at the module level. Resolving this ambiguity, therefore, requires decomposing R _s into its device‐level origins and optimizing LLP and PCE simultaneously. Furthermore, the relationship between these device‐level internal parameters, the resulting I‐V characteristics, and LLP remains unclear. To address this knowledge gap, we employed Quokka3 to simulate both TBC and TOPCon SCs, targeting a PCE of approximately 24% for both cell types.

To uncover the associations among device‐level parameters, module‐level parameters, and I‐V characteristics, and to identify the candidate optimal combination of TBC design parameters that balance LLP and PCE performance, we integrated machine learning (ML) techniques. Detailed simulation parameters are listed in Table S4. Using a Python interface with Quokka3, we generated 5000 datasets for both cell types (TBC and TOPCon). Each dataset includes performance data at two irradiance levels: 200 W/m² and 1000 W/m², yielding a total of 20000 data points. ML was then applied to investigate the interrelationships among these parameters, following the training workflow described in Note S2. For the ML analysis, we selected 23 device‐level parameters for TBC and 16 for TOPCon SCs. Random value ranges were defined for each parameter (see Tables S5 and S6). A two‐stage ML model was trained on the generated dataset: The first stage predicts the four equivalent circuit model parameters (R _s, R _sh, J ₀₁, and J ₀₁) from the device‐level parameters; The second stage predicts the resulting I‐V characteristics and LLP based on those four model parameters. This two‐stage approach establishes the relationships among device‐level parameters, I–V characteristics, and LLP, enabling the identification of candidate optimal TBC design parameters that achieve a balanced trade‐off between low‐light performance and power conversion efficiency. As illustrated in Figure S7, the two‐stage model demonstrates robust predictive performance, achieving a mean R ² exceeding 0.9. With the exception of a modest relative deviation (approximately 1.85%) observed for TOPCon R _sh, the average residuals for all other metrics approximate zero. Furthermore, the residual values are evenly distributed around the zero baseline, indicating no significant systematic bias.

After training the two‐stage ML model, we extract the feature importance results. These results for the two types of cells are normalized and visualized in a Sankey diagram, as shown in Figure 4A. For the TBC (left side), the Sankey diagram confirms that LLP is primarily influenced by R _s, R _sh, and J ₀₂. Notably, R _s and R _sh are strongly linked not only to external circuit resistances (TBC R _s‐E, TBC R _sh‐E) but also to the gap width (W _gap). A larger W _gap provides a wider insulating region between the n‐poly and p‐poly electrode areas, reducing leakage risk and increasing R _sh [29]. However, at a fixed cell pitch, widening W _gap correspondingly narrows the n‐poly and p‐poly regions, which not only lengthens the lateral transport path of carriers [30] but also reduces the effective metal–semiconductor contact area, thereby increasing the contact resistance contribution to the total R _s [17]. Conversely, a smaller GW shortens the carrier transport distance, thereby reducing R _s, but simultaneously increases leakage risk and current, resulting in lower R _sh [31]. Furthermore, Cao et al. [32]. highlighted that an optimal W _gap value must be balanced with the fill ratios (ff _p) of the p‐poly region, rather than being simply minimized or maximized, underscoring the critical role of back‐electrode design in determining TBC cell performance. Other recombination‐related J ₀ parameters of the TBC are mainly influenced by J ₀₁ and J ₀₂, which subsequently affect V _oc and J _sc. In contrast, for the TOPCon parameters (right side), LLP is also strongly correlated with R _s and J ₀₂. However, due to TOPCon's inherently higher shunt resistance, R _sh shows a weaker correlation with LLP compared to TBC. In TOPCon, R _s is mainly influenced by the tunnel contact resistance (ρ _{c SiOx}) of the ultra‐thin SiO_x layer and the external series resistance (R _s‐E). The ρ _{c SiOx} is a direct measure of the tunneling probability through the SiO_x layer, hence its dominant influence on R _s. Conversely, the J ₀₂, which chiefly reflects recombination losses within the junction regions, is strongly influenced by the sheet resistance of the front and rear surface fields (FSF, RSF) and related saturation current densities, such as FSF sheet resistance (R _{sq FSF}), FSF non‐contact J ₀ (J _{0 FSF‐NC}), RSF noncontact J ₀ (J _{0 RSF‐NC}). Specifically, the sheet resistance of the FSF/RSF affects the lateral carrier collection efficiency, thereby influencing recombination, while parameters such as the non‐contact saturation current densities of the FSF and RSF directly quantify the recombination rate in these critical areas [33, 34]. The specific contributions and proportions of each device‐level parameter to the four equivalent parameters for TBC and TOPCon are detailed in Figure 4B and Figure S8, respectively. Only the major contributing parameters are shown; minor contributors are summed up and grouped under the “other” category. Figure 4B illustrates the impact of device‐level parameters on TBC solar cells. When external resistances (R _{s E}, R _{sh E}) are excluded, the W _gap parameter shows a significant influence on all four equivalent parameters, highlighting its crucial role in determining the electrical performance of TBC devices. For TOPCon (Figure S8), the most influential parameters are the front surface field sheet resistance (R _{sq FSF}), front surface field non‐contact J ₀ (J _{0 FSF‐NC}), and rear surface noncontact J ₀ (J _{0 RSF‐NC}), which directly relate to passivation and interface recombination in the FSF and RSF region, representing a key focus in current TOPCon optimization research (e.g., laser enhanced contact optimization (LECO) [35, 36], laser selective emitter (SE) [37]). Additionally, R _s is primarily affected by the tunnel contact resistance (ρ _{c SiOx}) of the thin SiO_x layer. R _sh is mainly governed by R _{sq FSF}, bulk resistance (ρ _b), and the J ₀ of the FSF and RSF. Moreover, J ₀₁ and J ₀₂ of TOPCon SCs are similarly influenced, reflecting their dependence on overall recombination and interface quality. To avoid potential misinterpretation arising from examining feature importance with respect to a single equivalent parameter, we further provide the normalized average feature importance of each device‐level parameter across the four targets (R _s, R _sh, J ₀₁, J ₀₂), as shown in Figure S9. In TBC, the top‐ranked parameters are W _gap, R _s‐E, J _{0 p+‐NC}, and R _sh‐E; in TOPCon, R _{sq FSF}, R _sh‐E, ρ _{c SiOx}, and J _{0 RSF‐NC} rank the highest. These aggregated rankings are fully consistent with the mechanistic discussions presented above, and they reinforce the dominant roles of the parameters identified in the Sankey diagram and the individual parameter‐to‐equivalent‐parameter mappings.

FIGURE 4.

(A) Sankey diagram illustrating feature importance across device‐level, module‐level, I–V output and LLP parameters for TBC and TOPCon, where the width of connecting lines corresponds to the distribution values between two parameters. Common parameters to both SCs are additionally labeled with the cell type for distinction. (B) Contribution ratios of various components to the I–V performance gain of TBC over TOPCon at 200 W/m² irradiance. (C) Pearson correlation plots between device‐level parameters and I–V output characteristics for TBC and TOPCon SCs. “*” indicates significance levels (“*”: p ≤ 0.05, “**”​​: p ≤ 0.01, “***”: p ≤ 0.001). (D) Heatmaps of the relationship between PCE and LLP for TOPCon and TBC datasets.

While Figure 4A,B identify which variables correlate with LLP and I–V performance, the direction of these correlations (positive or negative) remains unclear. As displayed in Figure 4C, we calculate Pearson correlation coefficients from the raw dataset and visualized them in a correlation chart. At the device level, the parameters for both cell types show no significant correlation with each other, confirming their independence. For TBC, the parameters most correlated with I–V performance or LLP are the front surface and p‐type noncontact region J ₀ (J _{0 FSF}, J _{0 p+‐NC}), R _{s E}, W _gap, and bulk thickness (t _bulk). Increased J _{0 FSF} and J _{0 p+‐NC} lead to higher interface and SRH recombination, negatively impacting I–V performance but showing no significant correlation with LLP. WT is positively correlated with current parameters (J _sc, J _mp) but negatively correlates with V _oc. Thicker wafers enhance light absorption, increasing J _sc and J _mp, but also increase the carrier transport length, leading to higher recombination and thus lower V _oc. LLP correlates primarily with R _s‐E and W _gap, following a consistent trend: both show a strong negative correlation with I‐V performance parameters but a strong positive correlation with LLP. For TOPCon, a greater number of device‐level parameters correlate with I–V performance and LLP. Apart from WT's positive correlation with current and BR's negative correlation with LLP, the overall pattern is similar: increased parameter values are negatively correlated with I–V performance but positively with LLP. This occurs because increased recombination elevates both J ₀₁ and J ₀₂, while higher sheet resistance increases R _s, all of which concurrently degrade I–V performance. Our analysis reveals the key trade‐off: strategies to improve LLP often involve increasing recombination or resistance, which inevitably compromises I–V performance. This trade‐off is clearly illustrated in the PCE vs. LLP dataset heatmap (Figure 4D), which reveals a distinct negative linear correlation for both types of SCs. Since both high PCE and high LLP are desirable, this inherent conflict poses a critical design challenge that must be balanced.

To address this challenge, we developed a Multi‐head Neural Network (MNN) using the device‐level parameters as direct input. This forward prediction network simultaneously outputs predictions for LLP, PCE, and various loss components. We then integrated a Differential Evolution Algorithm (DEA) with the ML model for inverse design, identifying the parameter combination that optimizes the balance between LLP and PCE. During optimization, the loss values from the MNN's prediction heads were recorded, allowing us to track the evolution of each loss component as the genetic algorithm converged toward improved solutions. The overall network architecture is shown in Figure S10, with detailed training methodology provided in Note S3. After multiple training rounds, the model achieved high regression accuracy. Scatter plots comparing predicted vs. true values for LLP and PCE are shown in Figure 5A,B, respectively. The MNN demonstrates excellent predictive performance, with R ² = 0.993 for LLP and R ² = 0.934 for PCE, thereby ensuring the reliability of the subsequent inverse optimization.

FIGURE 5.

Scatter plots illustrating the regression accuracy comparison of (A) LLP and (B) PCE for the TOPCon and TBC SCs. (C) Trace plots of the genetic algorithm optimization process for (C) TOPCon and (D) TBC SCs, with the x‐axis plotted on a logarithmic scale. Stacked bar charts of loss items output by the MNN model during the reverse optimization process for (E) TOPCon, (F) TBC, (G) HBC, and (H) HJT SCs, where the y‐axis represents the LLP value, and the x‐axis corresponds to the power value of the loss items.

We then employed the Differential Evolution Algorithm to optimize the forward MNN. The objective function was defined as a weighted average of the model‐predicted PCE and LLP, with a higher weighting coefficient assigned to PCE to prioritize conversion efficiency. As shown in Figure S10, we investigated the influence of varying objective function weight ratios on the resulting candidate optimal PCE and LLP values. As detailed in Note S3, to obtain parameter combinations yielding higher PCE, the weight configuration of α/β = 0.8/1.2 was adopted. After 1000 generations of iterative training, the trace plots of the process are shown in Figure 5C,D. The PCE trace shows convergence toward higher values, whereas the LLP trace exhibits the opposite trend. The candidate parameter set from optimization is identified at the point where the scalar fitness function (α·LLP + β·PCE)/2 stabilizes, as described in Note S3, signaling convergence of the multi‐objective optimization. It should be noted that because PCE (∼25%) and LLP (∼100%) operate on different numerical scales, the visual crossing of the two traces in Figure 5C,D carries no physical significance; the relevant criterion is convergence of the underlying scalar objective. The possible optimal parameter combinations obtained under different weight ratios in Figure S11 consistently follow the inverse relationship between LLP and PCE, corroborating that the convergence point corresponds to a physically meaningful trade‐off on the Pareto front. The optimized parameter combination yields an LLP of 98.41% and a PCE of 24.94% for TOPCon, and an LLP of 98.03% and a PCE of 25.8% for TBC. These results represent a substantial improvement in PCE with only a slight reduction in LLP compared to baseline models. The candidate parameter set from optimization for TBC and TOPCon are listed in Tables S7 and S8, respectively. Validation was performed by inputting the optimized parameters into the simulation model. The mean absolute errors (MAE) between simulated results and model predictions are 1.285 for LLP and 0.465 for PCE, indicating high predictive accuracy. Detailed validation results are provided in Table S9.

During iterative optimization, the outputs of the MNN's loss prediction heads are also recorded. As LLP decreases and PCE increases during convergence, the loss values are compiled into stacked bar charts, as shown in Figure 5E–H. Only major loss components are shown; minor components are grouped under “other”. To examine whether the LLP‐PCE trade‐off identified for TBC and TOPCon is specific to these two cell types or represents a more general behavior, we extended the simulation framework to include heterojunction technology in both its double‐sided (HJT) and back contact (HBC) forms. HJT and HBC represent the other two mainstream high‐efficiency cell routes in current industrial production. Comparing four distinct architectures enables us to identify which LLP characteristics are inherent to the back‐contact design and which depend on the specific passivation scheme, while also providing a practical LLP benchmark across technology routes. Then we additionally developed commercial‐level HJT and HBC SCs with Quokka3, based on parameters and performance data from Cao et al. [32]. (detailed data can be found in Tables S10 and S11). The analysis reveals that for TOPCon, the reduction in LLP is primarily due to decreased losses from the sheet resistance of FSF region, the vertical resistance of RSF region (resistance between bulk and rear electrode), and non‐contact recombination, which are associated with R _{sq FSF} and J _{0 FSF‐NC}. For TBC, the reduction stems from lower non‐contact recombination at both FSF and RSF surfaces, related to W _gap optimization, narrowing the gap region to reduce recombination, thereby increasing R _s and lowering J ₀₂. For HBC, key loss reductions come from bulk Auger recombination, contact resistance in the n‐type region, and non‐contact recombination in the RSF. For HJT, dominant loss components include contact recombination at the FSF and non‐contact recombination at the RSF surface, highlighting the critical role of contact passivation. This underscores the importance of high‐purity silicon substrates and optimized electrode contact design. Analyzing the loss components across these four cell technologies, non‐contact recombination emerges as a universally dominant factor. Additionally, the reduction in bulk Auger recombination in HBC further emphasizes the importance of high‐purity crystalline silicon substrates. These findings collectively indicate that passivation quality is the primary limiting factor in the LLP‐PCE trade‐off. Therefore, cell design must strike a balance between reducing recombination losses (which improves R _s and thus LLP) and minimizing the associated decline in PCE, ultimately seeking a relatively optimal compromise between LLP and PCE. The optimized parameter sets represent directional guidance for process development. Because the parameters operate at the device level and are not independently tunable in fabrication, the specific numerical values should not be taken as experimentally validated targets. Rather, the framework identifies which physical mechanisms to prioritize and in which direction to drive them—information that can inform subsequent experimental campaigns.

3. Conclusions

This study presents a comprehensive investigation into the LLP of TBC SCs, integrating process optimization, electrical simulation, and machine learning to address performance limitations and inconsistencies in existing literature. We identified current leakage, caused by suboptimal gap design and residual BSG formation between interdigitated electrodes, as the primary cause of poor LLP in conventional TBC SCs. By optimizing the gap width and incorporating SDBS during wet etching, we significantly suppressed leakage currents, enabling TBC SCs to achieve LLP performance comparable to TOPCon SCs, with power losses below 5%. Through systematic simulation and parameter analysis, we demonstrated that LLP is predominantly governed by electrical characteristics rather than optical properties, with R _s and J ₀₂ emerging as the most critical factors. In contrast, R _sh exhibited a negligible impact under typical manufacturing conditions because of its nonlinear response to LLP. Furthermore, by employing ML, we established interpretable relationships between device‐level parameters and module‐level performance, highlighting the importance of gap width in TBC and front emitter design in TOPCon. This analysis also revealed a fundamental trade‐off between LLP and PCE. To address this tradeoff, we developed a multi‐head neural network combined with a differential evolution algorithm for co‐optimization of LLP and PCE. The optimized device configurations achieved a balanced performance, with TBC reaching 25.89% PCE and 98.03% LLP, and TOPCon attaining 24.94% PCE and 98.41% LLP. A detailed loss analysis underscored that non‐contact recombination and bulk Auger recombination represent major limiting factors, emphasizing the need for high‐quality passivation and material design. Overall, this work provides valuable insights and a practical framework for designing high‐efficiency back‐contact solar cells with enhanced low‐light performance, highlighting the importance of multi‐scale optimization in advancing photovoltaic performance under real‐world operating conditions.

Funding

National Key Research and Development Program of China (2022YFB4200904), National Natural Science Foundation of China (62175174), Natural Science Foundation of Jiangsu Province (BK20221357), and Priority Academic Program Development (PAPD) of Jiangsu Higher Education Institutions.

Conflicts of Interest

The authors declare no conflicts of interest

Supporting information

Supporting File: smll74382‐sup‐0001‐SuppMat.docx.

Data Availability Statement

The data that support the findings of this study are available from the corresponding author upon reasonable request.