Reconfigurable Physical Unclonable Function‐Based Cryptographic Scheme Based on Memory‐Enabled GFET Modulators

ABSTRACT

Modern society, increasingly connected by the Internet of Things (IoT), is generating and exchanging data at an unprecedented pace, including sensitive and classified information that is vulnerable to cyberattacks. To address this challenge, we propose a new hardware security primitive, the strong radio‐frequency (RF) physically unclonable function (PUF), which leverages a graphene field‐effect transistor (GFET)‐based harmonic transponder. Thanks to graphene's exceptional electrical and mechanical properties, this PUF exhibits excellent randomness, uniqueness, and reliability for encryption applications. Additionally, the remarkable reconfigurability has been demonstrated by tuning the gate voltage, operating frequency, and different memory effect doping states, thereby strengthening reliability and robustness against various environmental factors. We further employ an artificial intelligence (AI)‐assisted classification framework for device authentication from measured PUF responses, where a one‐dimensional convolutional neural network (1D‐CNN) encoder learns device‐specific embeddings via contrastive (metric) learning with waveform augmentation, and query responses are identified using cosine‐similarity nearest‐neighbor matching, enabling robust recognition across multiple operating conditions. This proposed GFET PUF represents a new direction for hardware security and analog PUFs, with potential implications for various cryptographic and encryption applications in the era of IoT.

Wireless challenge waveforms probe graphene field‐effect transistor (GFET) devices, producing device‐unique analog responses that are digitized into cryptographic bit strings and bitmap keys. The scheme transforms intrinsic GFET variability into unclonable, contactless hardware security, enabling compact physical unclonable functions for encrypted identification and authentication.

1. Introduction

The advancement of 5G and beyond technologies has given a rebirth to the internet‐of‐things (IoTs), leading to a massive interaction of classified data and privacy among numerous sensors, mobile devices, and edge terminals [1, 2]. This has made protecting these devices and the information they hold a top priority, as cyberattacks have become more frequent and sophisticated in modern society. One of the traditional methods of protecting these devices is using key‐and‐lock systems, which have been around for thousands of years, with one ancient legacy discovered in the ruins of Nineveh [3, 4]. The rapid development of science and technology, particularly in computer science, has led to the essential evolution of key‐and‐lock systems from mechanical to electronic and digital. Notably, in software‐based encryption systems, “keys” are formed by specific digital passwords stored in memory, and “locks” determine user access [5, 6]. This class of encryption systems, however, has been proven to be vulnerable against artificial intelligence‐related machine/deep learning algorithms [7, 8].

To tackle this issue, tremendous research effort has been devoted to hardware‐enabled cryptographic solutions over the past decades. One of the most popular hardware‐based security solutions to emerge in recent years is the physically unclonable function (PUF) [9, 10]. PUFs are hardware instances that unpredictably map input challenges (e.g., optical, electrical, thermal, and mechanical signals) to unique output responses based on device‐specific characteristics. These challenge‐response pairs (CRPs), therefore, serve as the “keys” to this hardware security primitive that are unclonable and unpredictable [11, 12, 13]. An excellent PUF is desired to feature high randomness, uniqueness, and reliability, the three primary metrics of a PUF, to ensure high‐level encryption quality. The randomness of PUF primarily manifests in the entropy of CRPs, and uniqueness is evaluated by the large differences between two CRPs generated by distinct PUF instances, reflecting unclonability and unpredictability [10, 11, 14]. Additionally, CRPs generated by a single PUF instance under different operating conditions (e.g., temperature, humidity) should be consistent to ensure the desired reliability [15, 16, 17]. PUFs can also be categorized as weak and strong, depending on their ability to generate CRPs. Weak PUFs that can generate only a limited number of CRPs are often used for key generation and exchange. On the contrary, strong PUFs having a large number of CRPs are suitable for secure communication and authentication applications [11]. In particular, the era of IoT has raised many scenarios of wireless secure identification and authentication [18]. Nonetheless, most state‐of‐the‐art PUFs are based on digital integrated circuits (ICs), which are not inherently suitable for wireless applications. Examples include static random‐access memory (SRAM) PUFs [19, 20], arbiter PUFs [21, 22], and memristor PUFs [23, 24]. Additionally, whereas silicon‐based PUFs benefit greatly from the reliability of mature complementary metal‐oxide‐semiconductor (CMOS) fabrication foundries, which provide precisely controlled fabrication processes, they simultaneously suffer from low device‐to‐device variance, resulting in low randomness and uniqueness [11, 25]. To make matters worse, recent work has shown that conventional silicon‐based PUFs may still be susceptible to machine‐learning‐assisted cyberattacks due to their poor performance, rendering this hardware cryptographic alternative less secure than expected [26, 27, 28].

Graphene has attracted immersive research efforts in the past decades for its extraordinary electrical and mechanical properties. The two‐dimensional and exotic monatomic structure and the low density of states make graphene highly sensitive to external charged particles and to chemical or electrical gating effects [29, 30, 31]. Therefore, in industry, precisely controlling GFET performance in mass production remains a longstanding challenge, as unavoidable fabrication flaws can introduce significant device‐to‐device fluctuations. While such variation may be regarded as a problem for sensing applications, on the flip side, it can indeed be utilized in PUF applications, since drastic device‐to‐device variations may endow the PUF with high unpredictability and unclonability, and thus a high level of encryption [16, 32, 33]. Some previous research has shown that graphene and other two‐dimensional material‐based PUF security schemes feature excellent performance in terms of uniqueness, randomness, and stability, as exemplified by GFET‐enabled electronic PUFs (including memristive/random access memory (RRAM) PUFs) [31, 34] and straintronic PUFs [35]. To this end, we present herein a robust radio‐frequency (RF) PUF system based on a back‐gated graphene field‐effect transistor (GFET) that can wirelessly communicate between “keys” and “locks,” as diagrammed in Figure 1a. The proposed GFET PUF system can be integrated into a compact tag of similar size to a credit card, consisting of a GFET‐enabled harmonic transponder as the PUF core, a power management unit, and transmitting (T _x) and receiving (R _x) antennas. Under specific excitations (input challenges), this fully integrated, compact ID tag may backscatter unique output responses as radio signals. Once the reader recognizes the backscattered signals, the wireless secure identification process will be completed. Additionally, we demonstrate the robustness of the proposed GFET PUF by applying embedding‐based artificial intelligence (AI) classification with cosine nearest neighbor (Cosine‐NN) matching to its measured signals, enabling reliable device‐to‐device recognition and supporting practical hardware security and wireless secure communication systems. We envision that our work may open a new direction for investigating RF PUFs and true random number generators (TRNGs), which may benefit a variety of IoT applications, such as anti‐counterfeiting of food and drugs, device authentication, and the encryption of sensitive information and privacy.

FIGURE 1.

Diagram of the GFET PUF system, statistical characteristics of GFETs, and formation of CRPs. (a) Schematic of the near‐field secure communication/identification system embedded with the proposed GFET PUF. (b) Photograph of a fabricated monolayer GFET obtained from an optical microscope. (c) Measured original I−V characteristics of 20 fabricated GFETs. (d) Formation of challenge‐response pairs (CRPs) by our proposed GFET PUF. Here, the radio signals with different DC offsets, amplitudes, and frequencies serve as the challenges, and the modulated signals function as the responses. After proper discretization and digitization, the temporal responses will be converted to binary CRP maps.

2. Results

2.1. Electrical Characteristics and Memory Effect of the GFET Modulator

Figure 1b shows the image of the employed GFET, of which the monolayer graphene is grown by chemical vapor deposition (CVD) (see Methods for details). The GFET used in this work adopts a back‐gated configuration, in which the degenerately doped Si substrate serves as the global gate electrode, and the thermally grown SiO₂ is contacted by metal source/drain electrodes. We measured their transfer characteristics to study the intrinsic device‐to‐device variations among different GFETs induced during the fabrication process. The results of the original transfer characteristics of 20 GFETs are plotted in Figure 1c, where the I−V curves of the GFETs have a distinct “V‐shape” feature, and the voltage leading to the minimum of drain‐to‐source current corresponds to the Dirac point or charge neutrality point (V _cnp) of the GFET [36]. Unlike a traditional metal‐oxide‐semiconductor field effect transistor (MOSFET), such a “V‐shape” transfer characteristic may bring the device unique frequency responses, which will be explicitly discussed later in this section. From Figure 1c, the average value of V _cnp points is 30.3 V with a standard deviation of 4.21 V following a Gaussian distribution displayed in Section 1 of Supporting Information, despite all 20 devices being fabricated following the same process, proving the intrinsic device‐to‐device fluctuations existing in the transfer characteristics of GFET devices due to the fabrication flaws. Such deviations may be attributed to structural defects, non‐uniform strain, randomly distributed poly (methyl methacrylate) (PMMA) residues, or copper etchant residues on the graphene surface during fabrication. Therefore, the comprehensive product of intrinsic device‐to‐device variations on both V _cnp points and carrier mobilities may serve as the ideal physical entropy source for the GFET PUF, providing the desired randomness and uniqueness.

To directly examine the material origin of this device‐to‐device variation, we performed Kelvin probe force microscopy (KPFM; Park Systems XE‐70) on the CVD‐grown graphene channels (Figure 2). KPFM probes the local contact potential difference (CPD), which is closely related to the work‐function difference between the graphene surface and the conductive AFM tip. Therefore, spatial and device‐to‐device CPD variations provide a direct indication of local work‐function and electrostatic‐potential variations in the graphene channel. A representative channel with uniform thickness and no visible residue shows a relatively uniform CPD distribution within the scanned region (Figure 2a–c), suggesting that the local potential landscape can be reasonably homogeneous within an individual clean channel. Across 20 nominally identical GFET channels, however, the mean CPD values vary from approximately −105 to 186 mV, which is illustrated in Figure 2d. This indicates appreciable channel‐to‐channel work‐function dispersion. The CPD dispersion is consistent with the fact that the charge‐neutrality point of graphene is highly sensitive to local electrostatic doping, charge traps in the SiO₂ substrate, adsorbates, fabrication residues, and graphene thickness or surface‐potential nonuniformity [37, 38, 39, 40]. As the graphene work function and CPD are linked to the local charge‐neutrality condition, the measured CPD variation provides material‐level evidence that nominally identical GFETs can exhibit distinct V _CNP values and nonlinear transfer characteristics. These differences are not merely parasitic device variations; in the proposed GFET PUF, they act as intrinsic physical entropy sources that modulate the RF response and contribute to the observed randomness, uniqueness, and device‐specific fingerprints. Additional KPFM measurements, including device‐array statistics and representative CPD variations associated with graphene thickness nonuniformity, exposed SiO₂ regions, and surface residues, are summarized in Section 1 of the Supporting Information.

FIGURE 2.

KPFM characterization of CVD‐grown graphene channels. (a) Topography and (b) KPFM CPD images of a representative graphene channel with a relatively uniform surface. (c) CPD histogram over the scanned area for the representative channel. (d) Distribution of the mean CPD values measured from 20 GFET channels.

In addition to the special “V‐shape” feature, the proposed back‐gated GFETs are also well known for the memory effect, demonstrating the reconfigurability of V _cnp points, which can further enhance the non‐reproducibility and stability of the proposed back‐gated GFET‐based PUF architecture. To clarify, consider a GFET whose initial Dirac point is located at V _cnp = V ₁. After the graphene channel is exposed to air for a period of time, adsorbed ambient molecules introduce p‐type doping, shifting the Dirac point to V _cnp = V ₂, where V ₂ > V ₁ [41, 42, 43]. Then, when we chemically or electrically remove such adsorbed air molecules, the Dirac point will be reconfigured back to V _cnp = V ₁, complying with the memory effect. To conduct a thorough investigation, we have employed various methods to introduce n‐type doping into the GFETs we fabricated, shifting the points toward 0 and investigating their memory effect under air exposure. Figure 3a–c display the schematics of the back‐gated GFET structures and their surface‐adsorption‐induced doping mechanisms under the acetone, water adsorption, and air exposure, respectively. When the GFETs are treated with acetone for 40 min of chemical gating, a significant n‐type shift of V _cnp points is observed. Further, the GFETs will possess more randomized transfer characteristics after chemical gating treatment, which can be obtained from Figure S5 in the Supporting Information. After the treatment by acetone, the mean of V _cnp points of 20 GFET instances will downshift to 6.3 V with a standard deviation of 2.41 V. Besides the acetone treatment, we also employed water and acetone‐water treatments to investigate the GFET memory effect (see Section 1 of the Supporting Information for details of the GFET memory effect under different treatments). Figure 3e,f report the shift in V _cnp points on time dependency when the GFETs are treated by the other two methods; here, for all the memory effect studies, the GFETs are biased at V _DS = 0.5 V. Concluding from Figure 3e,f, all three treatment methods will result in a similar strong n‐type shift of V _cnp point within a short period, and then the air exposure will lead to a slow p‐type shift which takes a long time for the device to get its V _cnp point back to original. This type of temporal shift can be attributed to the adsorption of H₂O and O₂ molecules as hole donors on the graphene surface. The chemical treatment methods for removing adsorbed molecules, leading to a strong n‐type shift of the V _cnp point may involve the desorption of H₂O and O₂ molecules due to high temperatures, and the attraction between H₂O molecules and deionized water drops via hydrogen bonding. This observation has shown that one can chemically tune the position of the point of a certain GFET at will, thereby altering its frequency response and, consequently, creating more CRPs to make it a stronger PUF without increasing device size.

FIGURE 3.

Memory effect of GFET and its AC characteristics. (a−c) Schematic illustrations of the GFET under different doping conditions (acetone (a), water (b), and air exposure (c)) induced by surface treatments. (d−f) Memory effect of Dirac point (V _cnp) of GFETs. GFET is firstly treated by (d) acetone, (e) water, and (f) acetone and water to introduce an n‐type shift. Then, the GFET is air‐exposed for p‐type shift until its V _cnp gets back to ∼30 V. Three representative operating states are defined from the Vcnp evolution: state 1 (V _cnp ≈ 7 V), state 2 (V _cnp ≈ 15 V), and state 3 (V _cnp ≈ 30 V). (g) Representative transfer characteristic (IDS−VGS) and the corresponding gate‐bias points used for the three states. (h–j) Time‐domain output responses measured at the three states when the GFET is driven by a sinusoidal gate excitation (fin = 10 kHz, DC offset is 19 V, amplitude is 5 V). The AC responses exhibit predominantly amplitude modulation when VGS < Vcnp, combined frequency/amplitude/phase modulation VGS = Vcnp, and simultaneous phase and amplitude modulation when VGS > Vcnp.

We next analyze the AC characteristics of GFETs. Since the I−V characteristic of GFETs presents a “V‐shape” feature, a second harmonic will always be generated once an AC input signal oscillates around the V _cnp point. To make a concise demonstration of the AC characteristics of GFET regarding the memory effect, we define 3 operating states of GFETs by 3 approximate values of V _cnp points where state 1 for V _cnp ≈ 6 V, state 2 for V _cnp ≈ 15 V, and state 3 for V _cnp ≈ 30 V, as marked out in Figure 3d. We depict in Figure 3h–j that the GFET may exhibit entirely different frequency responses when operating in states under various input signal conditions. We firstly apply f _in = 10kHz, and gate voltage V _GS1 = 12 V < V _cnp to a GFET operating at the state where V _cnp ≈ 19 V, (the blue line in Figure 3g). The corresponding frequency response is plotted in Figure 3h, where the output response is in phase with the input signal and only amplitude modulation is observed. Next, when V _GS2 ≈ V _cnp = 19 V (the pink line in Figure 3g) it presents not only the amplitude modulation but also acts as frequency and phase modulator, and the frequency of the output signal is twice that of the input signal, functioning as a harmonic transponder (or frequency doubler), as can be seen in Figure 3i. Finally, the phase and amplitude modulations can be obtained as shown in Figure 3j when V _GS3 = 23 V > V _cnp (the purple line in Figure 3g). Such unique AC characteristics can make GFET‐based harmonic transponders free of unnecessary RF components compared with traditional ones, resulting in a more compact, lightweight system with lower fabrication cost. Since the Dirac point of a GFET is tailorable, as we discussed previously, its AC characteristics can also be readily altered to have amplitude, phase, and frequency modulations. By exploiting the electrical characteristics of GFETs, we can construct a wireless RF PUF with an ideal randomness source, yielding outstanding PUF metrics. It should be noted that the present GFET PUF operates as a low‐frequency nonlinear modulation and authentication platform. The experimentally demonstrated challenge frequencies are 10, 30, and 60 kHz, well below the regime where cutoff‐frequency‐limited RF gain would dominate the response. In this work, the doping/treatment‐dependent memory states are used to create reconfigurable PUF states. Their V _cnp shifts reposition the GFET along its nonlinear transfer characteristic, thereby modifying the AC/time‐domain waveform used for PUF key generation.

Experimental validations of GFET‐based PUF. The proposed back‐gated GFET PUF architecture is based on integrating GFET with other RF components to construct a GFET‐based harmonic modulator system serving as an identifier (ID) tag. The detailed schematic of the GFET‐based RF modulator can be found in Section 2 of the Supporting Information. Therefore, the challenges and responses are wirelessly communicated between the reader and the ID tag. First, the GFET PUF system receives input challenges via its receiving coil antenna, which are then amplified and fed into the PUF core. Next, the GFET PUF core converts these input challenges into unique output responses, as depicted in Figure 1d, generating modulated responses. Finally, the converted output responses will be transmitted by the transmitting coil antenna to an external reader used for access control or authentication. The reader will then discretize and digitize the analog responses in the time domain to binary bitstrings, creating binary PUF keys, and compare them with the authorized keys stored in local memories or the cloud (details of the formation of CRPs can be found in Section 3 of Supporting Information). As a reconfigurable PUF, our proposed PUF system can produce different output responses to the same input challenge across different states, thereby significantly enhancing the encryption quality it provides. We can also tune the frequency, phase, and amplitude of the input RF signals to address different challenges in our PUF, generate more CRPs to strengthen it, and increase its difficulty to decrypt. An order‐of‐magnitude estimation of the wireless RF power required to drive the GFET tag is provided in Section 10 of the Supporting Information, showing that the intrinsic GFET gate‐drive power is at the microwatt level, while the total reader‐launched power depends on the near‐field coupling efficiency and the power‐supply configuration.

Different types of challenges with various V _GSs, frequencies, and states exploited are applied to the PUF system to evaluate our PUF performance. Here, the amplitude of challenge signals is fixed at 5 V, and all GFETs are biased under 0.5 V. It is worth noting that to precisely investigate the PUF performance of the GFETs themselves, the challenges and responses are directly applied to and measured from the GFETs by a probe station. By applying all nine challenges to 20 GFET PUF instances operating in three states, we obtained 540 output responses in the time domain (all responses can be found in Section 4 of the Supporting Information), which we used for the PUF performance evaluations. Our evaluations include randomness, uniqueness, reliability, and embedded AI classification using cosine‐NN matching of the PUF signal. Figure 4a–c present the complete generated binary bitmaps of the proposed back‐gated GFET PUF when the GFET operates at state 1, 2 and 3, respectively. It can be observed that the “0” and “1”s are highly randomly distributed, and the randomness of a PUF can be manifested from the entropy of bitmaps of CRPs, which calculates the distributions of “0” s and “1” s of the bitmap and takes the form of [44−46]:

$$E_{x,y}=-[p_{x,y}{\log }_2{p}_{x,y}+(1-p_{x,y}){\log }_2(1-p_{x,y})]$$ (1)

where the uniformity p_x (p_y ) is defined as the distribution of “0” s and “1” s for the bit‐strings (key‐strings), as can be seen in the inset of Figure 1d. Ideally, the number of “0” s and “1” s of the bit map should occur with equal probability, leading to p _x,y = 0.5 and E _x,y = 1. Figure 5 reports the results of reconfigurable entropy evaluations of the proposed GFET PUF under variant V _GSs (V _GS = 4, 5, 6 V), frequencies (f = 10, 30, 60 kHz), and states (state 1, 2, and 3). In Figure 5a–c, E _x remains consistently high while the applied configuration parameters change including V _GS = 4, 5, 6 V (Figure 5a), f = 10, 30, 60 kHz (Figure 5b), and three different operating states (state 1−3). Figure 5d–f are similar to Figure 5a–c, which illustrate the evaluated near‐unity distribution of E _ys. These results demonstrate the excellent randomness and reconfigurability of the proposed GFET PUF system. To further demonstrate the randomness of a PUF system, the National Institute of Standards and Technology (NIST) randomness test suite will be utilized, which more rigorously determines whether a binary sequence (e.g., binary PUF keys) is truly random or pseudo‐random. We have implemented all PUF keys generated by 20 PUF instances in the NIST test suite, and the detailed results are shown in Section 5 of the Supporting Information. All PUF keys generated by our GFET PUF successfully pass the tests with desired scores, indicating that our practically realized PUF system might be truly random, such as a true random number generator.

FIGURE 4.

Reconfigurable bitmap of PUF response under three operation states. (a–c) Bitmaps of the extracted binary responses for 180 GFET PUF instances under (a) state 1, (b) state 2, and (c) state 3. In each bitmap, rows correspond to devices (Device 1–180), and columns correspond to bit indices (Bit 1–256). Black and white pixels denote logic ‘1’ and ‘0’, respectively. The absence of obvious spatial patterns across rows and columns indicates a near‐random distribution of bits for all three states, supporting high‐quality response randomness and device‐to‐device variability.

FIGURE 5.

Reconfigurable entropy evaluation of GFET PUF responses. (a–c) Bit‐level Shannon entropy E _x evaluated across the generated 256‐bit responses as a function of (a) gate bias amplitude (V _GS), (b) frequency, and (c) various operation states (State 1–3). (d–f) Device‐level entropy E _y computed for individual devices under the same sets of conditions: (d) V _GS, (e) frequency, and (f) state. In each 3D plot, the entropy values remain close to the ideal value of 1, indicating excellent entropy and robust randomness across bits and devices over varying excitation and doping states.

Furthermore, uniqueness is widely utilized as another critical parameter in assessing the quality of PUFs. Generally, the uniqueness of PUFs can be studied via inter‐device Hamming Distances (inter‐HDs), which count the number of different bits between two binary sequences. Ideally, two bitstrings of PUF keys unique to each other should have their normalized inter‐HD be 0.5, implying that half of their bitstrings are identical. The mean inter‐HD can be expressed as [11]:

$$\overline{\mathrm{H}{\mathrm{D}}_{\mathrm{inter}}}=\frac{2}{N_{\mathrm{puf}}(N_{\mathrm{puf}}-1)}\sum _{i=1}^{N_{\mathrm{puf}}-1}\sum _{j=i+1}^{N_{\mathrm{puf}}}\frac{\mathrm{HD}(\mathrm{Ke}{\mathrm{y}}_i,\mathrm{Ke}{\mathrm{y}}_j)}{L}$$ (2)

where N _puf represents the number of PUF keys, L refers to the bitstring length, and Key _i (Key _j ) is the i ^th(j ^th) PUF key in the cryptographic map, which is generated from the i ^th(j ^th) PUF instance for the same challenge. In Figures 6a–c, the PUF uniqueness utilizing inter‐HDs under three different reconfiguration states (V _GS, excitation frequency, and discrete operating states) is evaluated. Starting with V _GS in Figure 6a, the inter‐HD histograms for V _GS = 4, 5, and 6 V are all centered close to the ideal value of 0.5, with µ around 0.49−0.5. This indicates that responses from two different devices differ in roughly half of the bits, which is the expected behavior of strong uniqueness. Building on this result, Figure 6b shows that the same property is preserved when the excitation frequency varies. For f = 10, 30, and 60 kHz, the inter‐HD distributions remain near 0.5 and keep a similarly narrow spread, indicating the device‐to‐device separability will not be weakened by tuning the frequency. Figure 6c reports the inter‐HD distributions when V _GS = V _cnp under States 1−3. The histograms of the inter‐HD are distributed around 0.5, confirming that switching the operating state also maintains near‐ideal uniqueness while generating a new response condition. Figure 6d–f provide a complementary view through pairwise inter‐HD maps, where each pixel represents the Hamming distance between a pair of keys. Consistent with the histogram results for inter‐HD, Figure 6d shows that across different V _GSs, the diagonal remains low (self‐comparison) while the off‐diagonal entries are largely around the mid‐range, reflecting strong separation among different devices. In the same way, Figure 6e demonstrates similar off‐diagonal behavior across the three frequencies (f ₁, f ₂, f ₃), indicating that each frequency setting forms a stable key space with robust inter‐device differences. Similarly, Figure 6f shows distinct regions corresponding to States 1–3, implying that each state defines its own response ensemble while still keeping the pairwise distances close to the desired level. We observe that reconfiguration enables the PUF to operate under different settings and produce distinct response sets, while the inter‐device Hamming distance remains close to the ideal value of 0.5, confirming robust uniqueness across configurations. On the other hand, we assess the encoding capacity as a measure of the PUF's encryption capability, defined as the number of unique encryption codes the PUF can produce. In addition, we investigate the evolution of key size and encoding capacity as the sampling rate varies. For a binary coding system, the encoding capacity can be expressed as cⁿ , where c = 2_, and n = μ(1 − μ)/σ². Here n represents the key size, μ and σ signify the mean and standard deviation of the distribution of inter‐HDs, respectively. For the verification, we calculate the key sizes and the encoding capacities when the proposed GFET PUF operates at States 1−3. The results for key sizes are n ≈ 64, 60, and 67 for states 1, 2, and 3, respectively. And the corresponding encoding capacities are 2⁶⁴,2⁶⁰,2⁶⁷, which are sufficiently large for most secure applications, showing the excellent encryption capabilities that our GFET PUF provides, and the detailed results for the evolution of key size and the encoding capacity as a function of sampling rate are plotted in Section 6 of the Supporting Information.

FIGURE 6.

Uniqueness evaluation of GFET PUF responses under different operating conditions. (a–c) PMFs of the inter‐HD for the proposed PUF measured under varying (a) VGS, (b) frequency, and (c) different states. The extracted mean and standard deviation are close to the ideal value of 0.5 and 0, respectively, indicating strong uniqueness across devices. (d–f) Pairwise HD maps of the generatesd keys under the same sets of conditions: (d) VGS, (e) frequency, and (f) states. The predominantly uniform off‐diagonal distributions further confirm consistent device‐to‐device separability and robustness of uniqueness against excitation and state variations.

To make a PUF system feasible for realistic implementations, high reliability in consistent, repeatable measurements is also highly demanded. Reliability can be quantified by intra‐HD, which are similar to inter‐HDs but calculate the bit differences between two bitstrings generated by the same PUF instance operating in different conditions. The mean intra‐HDs can be written as [18]:

$$\overline{\mathrm{H}{\mathrm{D}}_{\mathrm{intra}}}=\frac{1}{N_{\mathrm{con}}}\sum _{m=1}^{N_{\mathrm{con}}}\frac{\mathrm{HD}(\mathrm{Ke}{\mathrm{y}}_i,\mathrm{Ke}{\mathrm{y}}_{i,m})}{l}$$ (3)

where N _con signifies the total number of measurements under different conditions, Key _i is the PUF key taken as a reference, Key _i,m is the m _th measured PUF key at another operating condition, and l is the length of the PUF keys. A PUF with perfect reliability should have its intra‐HD close to zero, as observed in Equation (3), implying that the device can operate stably under varied conditions. In our experiments, one measurement is chosen as the reference trace, and each of the nine additional repeated measurements obtained under the same applied challenge is compared against it to generate one intra‐HD value per repetition. The corresponding stacked transient responses for state 1 at 30 and 60 kHz are provided in Section 7 of the Supporting Information, together with the intra‐HD distributions. As shown by the intra‐HD statistics (µ = 0.135, σ = 0.052 at 30 kHz and µ = 0.071, σ = 0.039 at 60 kHz) in Figure S13, the PUF responses exhibit strong repeatability, with the intra‐HD mean and spread approaching the ideal value of zero, particularly at higher excitation frequency. Moreover, the stability criterion for the proposed memory‐enabled and reconfigurable GFET PUF is state‐wise repeatability rather than absolute retention of a fixed V _cnp. As discussed above, the temporal evolution of V _cnp under chemical treatment and air exposure is used to assess different operating states instead of being treated solely as a device‐failure mechanism. Therefore, once an operating state is enrolled, stable operation is evaluated by whether the transient response can be reproducibly extracted and authenticated within that state. The low intra‐HD values under repeated reads support such state‐wise repeatability.

2.2. Embedding Learning and Cosine Similarity for PUF Authentication

To enable practical GFET PUF authentication, it is not sufficient to demonstrate only uniqueness or reliability metrics; the system must also provide a scalable decision rule that reliably maps an incoming, noisy time‐domain waveform to the correct enrolled key [12, 47]. In our measurements, GFET PUF responses can exhibit state‐dependent waveform transformations (e.g., bias/frequency settings) as well as unavoidable run‐to‐run perturbations introduced by the measurement chain, including timing jitter, amplitude drift, and background noise [48, 49]. Here, we incorporate a deep metric‐ and embedding‐based classification framework to identify and authenticate measured GFET PUF signals (Figure 7a). In this method, we employ a one‐dimensional convolutional neural network (1D CNN) encoder f(·) to map each time‐domain waveform into a compact embedding space, where responses from the same device cluster are close while different devices are separated. To improve robustness against measurement noise and small waveform distortions, we apply data augmentation to generate multiple views of each signal during representation learning. After pretraining, the encoder weights θ are fixed; during inference, a query waveform is converted into a query embedding and matched to the enrolled references using a Cosine‐NN rule to output the predicted key ID [50, 51]. For the evaluation, each operating state is treated as an independent authentication setting, and we enroll 100 keys per state for classification and matching. The detailed workflow of the presented deep metric learning‐based AI‐classification method is depicted in Figure S14 in Section 8 of the Supporting Information. The resulting probability maps for States 1–3 are shown in Figure 7c–e. In all three states, the probability mass is strongly concentrated along the main diagonal, indicating high confidence in correctly matching with limited off‐diagonal leakage. Importantly, this diagonal dominance is maintained across the different states, suggesting that the learned embeddings remain robust to state‐induced response variations while preserving the separability required for reliable authentication. We also evaluate robustness in terms of classification accuracy (ACC) against temporal misalignment by introducing a controlled sample shift to the query waveform (Figure 7b). The proposed state‐wise classification maintains consistently high accuracy across the tested shifts, whereas the direct Cosine‐NN baseline degrades rapidly as shifts increase. This contrast highlights that the learned embedding captures more shift‐tolerant, global features of the GFET PUF response, improving practical usability when small timing offsets are unavoidable during repeated measurements. We additionally performed a post‐measurement additive‐noise stress test using the CNN‐assisted authentication pipeline (Figure 7f) to further assess robustness against measurement noise. The 1D CNN encoder was retrained with SNR‐aware contrastive augmentation using noisy positive views with SNR randomly sampled from 20–40 dB. During the evaluation, Gaussian noise was injected only into the query waveforms from 0 to 30 dB, while clean enrolled references were matched to the noisy query embeddings using the same Cosine‐NN rule. As shown in Figure 7f, the mean ACC remains 98.2% at 10 dB and exceeds 99% from 15–30 dB across the three states, confirming robust authentication under substantial additive noise. The reduced ACC at 0–5 dB marks the practical low‐SNR operating boundary of the compact embedding‐based pipeline. Together with the temporal‐shift results, this analysis shows that the learned representation improves tolerance to both timing misalignment and additive noise. Beyond timing‐shift and additive‐noise robustness, the framework also benefits from the challenge‐dependent nature of the GFET RF PUF response. As the authenticated signal is generated by the physical device under a specific memory/doping state, gate bias, excitation frequency, and nonlinear RF transduction condition, simple replay or spoofing attempts would need to reproduce the correct analog waveform for the requested challenge in the learned embedding space. This challenge‐dependent response provides a practical anti‐replay basis for the proposed framework and motivates comparison with broader hardware‐security and IoT‐authentication approaches.

FIGURE 7.

AI‐assisted authentication of GFET PUF signals using a pretrained encoder and cosine‐NN matching. (a) Overview of the proposed identification pipeline. Here, raw PUF time‐domain signals are augmented to form multiple views for self‐supervised pretraining of a 1D CNN encoder f(·) with a projection head. After pretraining, the encoder weights (θ) are fixed and used to extract embeddings from query waveforms, which are then classified by Cosine‐NN matching to return the matched device ID. (b) ACC versus temporal shift applied to the query waveform. The encoder‐based embeddings maintain high ACC across all three states, while direct Cosine‐NN matching on non‐embedded signals degrades rapidly with increasing shift, highlighting the improved shift‐robustness enabled by the learned representation. (c–e) Pairwise similarity (probability) maps of the generated keys/embeddings for state 1–3, where a strong diagonal indicates correct one‐to‐one matching between enrolled references and query samples. (f) Additive‐noise robustness of the CNN‐assisted authentication scheme after SNR‐aware contrastive training. Gaussian noise was injected into query waveforms from 0 to 30 dB, while clean enrolled templates were used for Cosine‐NN matching in the learned embedding space. The mean ACC remains 98.2% at 10 dB and exceeds 99% from 15–30 dB.

To place the proposed memory‐enabled GFET RF PUF in the broader landscape of hardware security and IoT authentication, we provide two complementary comparisons in Section 9 of Supporting Information. First, Table SIII compares the proposed device with some representative state‐of‐the‐art PUF systems. Recent GFET memory [16], ferroelectric field‐effect transistor (FeFET) [52], spectral optical [53], vertical NAND (V‐NAND) [17], and carbon nanotube (CNT) PUFs [54] can individually provide memory‐state reconfigurability, large response spaces, NIST‐passed randomness, or learning‐assisted verification. However, these capabilities are typically realized through electrical memory states, charge trapping, flash program/erase operation, or optical spectral fingerprints. In contrast, the proposed GFET RF PUF directly couples the GFET memory/doping state to nonlinear RF harmonic transduction, so that memory state, gate bias, and excitation frequency jointly reconfigure the measured RF waveform for AI‐assisted authentication. Second, to address IoT application scenarios, Table SIV compares the proposed RF PUF with representative conventional cryptographic and emerging low‐power hardware approaches, including Advanced Encryption Standard (AES)/ChaCha20‐based encryption, NIST lightweight cryptography, ECC‐based authentication, and recent 2D neuromorphic devices [55, 56, 57, 58, 59]. Conventional cryptographic schemes are mature for data encryption and mutual authentication, but they typically rely on stored or shared digital secrets and protocol‐level key management. By contrast, the GFET RF PUF serves as a complementary hardware root of trust, directly transducing intrinsic GFET variations into reconfigurable RF waveform fingerprints that enable wireless authentication and PUF‐derived key generation before standard cryptographic algorithms are used for protected data transmission.

3. Conclusion

In summary, we have proposed a strong RF PUF enabled by a GFET‐based harmonic transponder. Leveraging the exceptional electrical and mechanical properties of GFETs, the proposed PUF exhibits outstanding randomness, uniqueness, and reliability. In addition, the GFET memory enables high reconfigurability, further enhancing the PUF's strength by enabling flexible key updates and an expanded challenge–response space. Since both the challenges and responses are radio‐frequency signals, the proposed PUF is naturally compatible with IoT scenarios and can be readily integrated into wireless authentication systems. To support practical identification and authentication, we incorporate an AI‐assisted signal classification pipeline that learns device‐specific embeddings from measured waveforms and enables robust key matching across different operating states. Overall, this work opens a new direction for investigating analog PUFs in a fully wireless manner, with potential impact on RFID platforms, secure near‐field communications, and IoT authentication.

4. Methods

4.1. Fabrication of GFETs

The graphene layer is grown initially on copper foil by chemical vapor deposition. First, a layer of poly (methyl methacrylate) (PMMA) is coated on graphene/Cu foil and then baked on a hot plate for 10 mins at 60°C. This PMMA layer works as a support layer, preventing graphene from curling up and breaking up during Cu etching. FeCl₃ is used as an etchant to etch Cu foil underneath graphene. After the Cu foil is completely etched, the PMMA/graphene film is rinsed in deionized water to remove the residue of FeCl₃. The PMMA/graphene film is then scooped up by our target substrates and baked on a hot plate for 30 mins at 50°C. Lastly, to remove PMMA, the graphene/substrate is soaked in MICROPOSIT Remover 1165 for over 6 h, and the graphene transfer is completed. The p‐doped Si substrates have a 90‐nm thermal oxide layer as the dielectric between doped Si and graphene. Maskless photolithography is conducted by the MLA150 Maskless Aligner to pattern graphene and electrodes. First, a layer of resist S1813 is coated on a graphene/Si substrate. After the exposure of the designed pattern and development of resist, an unwanted area of graphene is exposed to the environment and is later etched by oxygen plasma. By soaking the graphene/Si substrates in MICROPOSIT Remover 1165, the resist is removed, and only patterned graphene remains on the Si substrate. Both source and drain electrodes are made of Ti/Au (5/50 nm). Maskless photolithography is implemented to define the shape of electrodes. After the exposure of the designed pattern and development of resist, the designated electrode area is exposed to the environment. Therefore, the metal film can be selectively deposited at the defined electrode area. The metal film deposited not in the electrode area is removed along with the resist during the lift‐off process. Both Ti and Au film are deposited by e‐beam evaporation at 1A/s deposition rate.

Author Contributions

Yichong Ren and Minye Yang designed the circuit structure. Yichong Ren, Minye Yang, Mohan De Silva, C. Suzanne Miller, Ralu Divan, and Chia‐Heng Sun performed the experiments. Yichong Ren, Zong‐Ru Lee, Mohan De Silva, and Saad Alshahrani drafted the manuscript. Yichong Ren and Zong‐Ru Lee performed the AI‐classification experiments. Pai‐Yen Chen conceived the idea. Jimmy Ching‐Ming Chen, Mark Ming‐Cheng Cheng, Zhixian Zhou, and Pai‐Yen Chen supervised the experiments and revised the manuscript.

Conflicts of Interest

The authors declare no competing interests.

Supporting Information Statement

The online version containing supporting information is available.

Supporting information

Supporting File: smtd70889‐sup‐0001‐SuppMat.docx.

Data Availability Statement

The data that support the findings of this study are available from the corresponding author upon reasonable request.