ABSTRACT
Ion‐gated transistors inherently exhibit time‐dependent behavior governed by ionic motion associated with electric double‐layer formation; however, their practical implementation has been limited by insufficient control over ionic dynamics and poor compatibility with scalable thin‐film integration. Here, we present carbon nanotube (CNT) solid‐ion‐gated transistors (sIGTs) that allow the wide‐range engineering of ionic dynamics while remaining fully compatible with wafer‐scale thin‐film processing. Tunable ionic conductance is achieved by ionic content engineering in the film and thickness scaling into the sub‐micron regime, enabling ionic time constants from microseconds to milliseconds. CNT sIGTs demonstrate robust DC operation at low ionic content with an optimized polymer matrix and wafer‐scale fabrication on flexible substrates. Frequency‐dependent gate modulation governed by ionic conductance is systematically investigated through electrical impedance spectroscopy and small‐signal analysis, including a comparison of the −3 dB cutoff frequency and the transit frequency. This analysis provides direct insight into the relationship between ionic conductance and frequency‐dependent device response, exhibiting consistent trends across both two‐terminal and three‐terminal device configurations. Monolithic three‐dimensional integration of two‐tier CNT sIGTs with engineered dynamic responses is demonstrated as a compact dual‐timescale physical reservoir for neuromorphic computing that enables classification of time‐varying inputs using a single readout layer.
Keywords: carbon nanotubes, ion‐gated‐transistors, monolithic 3D integration, reservoir computing
A dual‐timescale reservoir based on monolithically 3D (M3D)‐integrated CNT solid ion‐gated transistors is demonstrated. Tunable ionic dynamics and pulse‐engineered operation enable linear and symmetric synaptic updates. The M3D‐integrated array achieves robust temporal encoding and accurate classification of moving MNIST sequences, highlighting its potential as a scalable hardware platform for time‐series processing.

1. Introduction
Ion‐gated transistors (IGTs) have emerged as a promising thin‐film device platform for logical switching [1, 2, 3] analog signal processing [4, 5], neuromorphic computing [6, 7], and bio‐signal interfacing [8, 9, 10]. Unlike conventional thin‐film transistors, in which channel modulation is governed by field effects, IGT operation involves ionic motion within the gate electrolyte, resulting in intrinsically slower dynamics. This ion‐gating mechanism enables low‐voltage operation and efficient channel modulation by leveraging the strong electrostatic coupling arising from the electrical double layer (EDL) formed at the semiconductor interface. IGTs have predominantly relied on liquid electrolyte platforms, which readily support ion migration in response to an applied electric field, including aqueous salt solutions [2, 11], ionic liquids [12], polymer electrolytes [13, 14], and ionogels [15, 16, 17, 18].
The temporal channel modulation in IGTs provides a unique opportunity to exploit ionic dynamics as a computational resource, particularly for neuromorphic systems that process event‐driven spiking inputs. In such systems, the intrinsic ionic time constants can serve as physical kernels for encoding temporal information. This behavior is particularly well suited for reservoir computing, a class of neuromorphic computing that leverages the intrinsic dynamics and memory of physical systems for temporal information processing, without requiring explicit temporal unfolding or complex training of internal states [19, 20, 21]. Field‐responsive ionic accumulation and relaxation provide short‐term plasticity in IGTs and enable linear and symmetric synaptic weight updates. These three‐terminal neuromorphic devices decouple ionic transport (write path) from electronic conduction (read path), enabling non‐destructive readout, reduced read–write interference, and independent control of programming and sensing operations, which are difficult to achieve in two‐terminal memristive synapses [22, 23, 24]. The strong electrostatic coupling enabled by ion gating supports low‐voltage operation, satisfying key requirements for application in artificial synapse arrays [25].
Despite these advantages, the practical realization of IGT‐based neuromorphic systems remains limited by fundamental challenges in controlling ionic dynamics and achieving scalable integration. First, precise control of ionic time constants within a device is difficult, although it is critical for neuromorphic systems where device responses must match the desired weight updates during training [26, 27, 28]. Moreover, the inherently high ionic conductivity of typical electrolytes makes it challenging to access slower dynamical regimes required for multi‐timescale operation. Second, most IGT demonstrations rely on mechanically soft liquid or gel‐like electrolytes, which limit compatibility with thin‐film processing and thereby restricting fine patterning, encapsulation, and vertical stacking of functional layers [27, 28, 29, 30, 31, 32].
In this study, we demonstrate solid ion‐gated transistors (sIGTs) with semiconducting carbon nanotube (CNT) channels to address both ion control and integration challenges. The percolated CNT network provides directly accessible semiconductor–electrolyte interfaces while suppressing spatial ionic distribution within the channel, thereby confining ion motion near the interface and enabling spatially confined device responses. The solid ionogel can be formed as a thin film and scaled to sub‐micrometer thickness, thereby mitigating the impact of reduced ionic conductivity associated with its low ionic content. The ionic content can be systematically engineered to tune device operation over timescales ranging from microseconds to milliseconds within an identical device geometry.
The dynamic behavior is investigated using electrical impedance spectroscopy (EIS) and small‐signal analysis, revealing the relationship between ionic transport properties and frequency‐dependent device responses. Full compatibility with thin‐film processes enables scalable integration up to 4‐inch wafer scale and onto flexible substrates, maintaining uniform electrical characteristics and reliable operation under mechanical deformation. Leveraging tunable ionic time constants and enhanced processability, monolithic 3D (M3D) integration of CNT sIGTs with distinct dynamic responses is demonstrated. By tailoring pulse inputs to the ionic migration properties, linear and symmetric synaptic weight updates are achieved. Two vertically stacked tiers with an order‐of‐magnitude difference in response time exhibit distinguishable multi‐level output distributions up to 4‐bit resolution at each timestep, highlighting their capability for robust temporal encoding in a dual‐timescale reservoir. This architecture establishes a scalable hardware platform for multi‐timescale signal processing based on the potential of sIGTs in emerging computing paradigms.
2. Results and Discussion
2.1. Thin‐Film Ionogel‐Based CNT sIGT Platform
Figure 1a illustrates the concept of ionic content engineering in all‐solid CNT sIGTs. Ionic species are incorporated into a solid polymer matrix to form a solid ionogel, enabling a top‐gate thin‐film transistor configuration. The complete solidification of the ionogel enables true thin‐film formation, making the device structure compatible with conventional thin‐film fabrication processes. This process compatibility is particularly important because it allows the incorporation of interlayer dielectrics, which are difficult to implement in conventional ionogel‐gated devices containing liquid or semi‐solid electrolytes. As a result, the proposed architecture provides a key enabler for realizing the multi‐timescale reservoir computing framework proposed in this work. As detailed in Figure S1, individual CNT sIGTs are fabricated through a sequence of standard thin‐film processes. Following the fabrication of each device layer, a CVD‐grown interlayer dielectric is deposited, and the fabrication process is subsequently repeated to achieve monolithic vertical integration. Furthermore, despite repeated photolithography steps involving organic solvents such as acetone, the solid ionogel exhibits excellent encapsulation stability, allowing the realization of densely integrated stacked arrays without degradation of device integrity.
FIGURE 1.

(a) 3D illustration of CNT sIGTs with engineered ionic content, enabling tunable ion dynamics. Ionogels with high ion concentrations exhibit low R ion and fast G ch modulation, whereas ionogels with low ion concentrations exhibit high R ion and slow G ch modulation. Device fabrication flow and stacked layer information. (b) OM image monolithically 3D integrated CNT sIGT 5 × 5 arrays. (c) Conceptual illustration of temporal matching between t p and τ. Depending on the relationship between t p and τ, incomplete, partial, and complete EDL formation produce distinct conductance‐modulation behaviors, governing reservoir‐state evolution and temporal encoding capability. Representative 4‐bit pulse sequences are shown to illustrate distinguishable and indistinguishable reservoir states under different temporal matching conditions. (d) Experimental reservoir states corresponding to the 4‐bit pulse sequences shown in Figure 6d. Reservoir states were sampled after the final pulse of each sequence.
The optical microscopy image in Figure 1b shows a fabricated dual‐timescale reservoir cell consisting of vertically integrated CNT sIGTs with different ionic contents. By engineering the ionic content of the solid ionogel, the ion resistance R ion, ion transport dynamics, and ionic time constant τ can be systematically controlled, providing physically distinct reservoirs operating on different temporal scales within a unified hardware platform. Ion‐rich devices exhibit lower R ion and faster charging‐discharging dynamics, resulting in rapid channel conductance G ch modulation and shorter τ. Such fast modulation originates from efficient ion transport within the ionogel and can be maintained even at relatively low ionic contents (<5 vol.%) through the selection of ionic species and polymer matrices that facilitate ion hopping, enabling kilohertz‐level operation (Note S1 and Figure S2). In contrast, ion‐poor devices exhibit higher R ion and slower charging‐discharging dynamics, resulting in longer τ and enhanced retention arising from slow ionic relaxation. Despite the reduced ionic conductivity σ ion, the sub‐micrometer‐thick top‐gate ionogel significantly shortens the ion‐transport distance compared with lateral‐gating structures, thereby compensating for the increased R ion and enabling localized ionic modulation with minimal inter‐device crosstalk (Note S2 and Figure S3).
The operating principle of temporal information encoding in CNT sIGT is illustrated in Figure 1c. τ originates from ion migration and EDL formation at the channel‐ionogel interface. Depending on the relationship between the input pulse period t p and τ, distinct ionic charging and relaxation behaviors emerge. When t p << τ, insufficient EDL formation produces only a small change in G ch, resulting in weak reservoir‐state evolution. When t p becomes comparable to τ, partial EDL formation accumulates over consecutive pulses because subsequent pulses are applied before the channel is fully depleted. Under this temporal matching condition, pulse‐history‐dependent conductance modulation generates distinct reservoir states from different 4‐bit input sequences. In contrast, when t p >> τ, complete EDL formation and relaxation occur within each pulse cycle, causing the conductance state to reset after every pulse and thereby reducing temporal encoding capability. Consequently, both excessively short and excessively long input periods relative to τ lead to degraded reservoir‐state separability, whereas temporal matching maximizes the distinguishability of reservoir states. The experimentally measured reservoir states corresponding to sixteen different 4‐bit pulse patterns are presented in Figure 1d. Distinct conductance distributions are obtained under the temporal matching condition, confirming that reservoir‐state separability is maximized when the temporal scale of the input sequence is matched to the intrinsic ionic dynamics of the reservoir. These results establish the physical basis for utilizing CNT sIGTs with engineered ionic dynamics as multi‐timescale physical reservoirs.
2.2. Quasi‐Static Electrical Characteristics of CNT sIGTs
The ion‐gating mechanism, which relies on ion migration and EDL formation, provides exceptional electrostatic control, particularly in percolating CNT networks. EDL mitigates the field screening effect that commonly arises in stacked CNT networks gated by conventional solid dielectrics [33, 34]. CNT sIGTs on Parylene substrates exhibit near‐ideal subthreshold behaviors, with SS of 61.9 mV/dec, approaching the theoretical Boltzmann limit of 60 mV/dec at room temperature (Figure 2a). A maximum normalized g m of 103.58 µS/V was extracted in the linear regime at the drain‐source voltage V DS = −0.05 V and the gate‐source voltage V GS = −0.3 V. While the figure of merit in conventional organic electrochemical transistors is the product of the volumetric capacitance C * and the carrier mobility µ (µC *), the normalized g m can instead be incorporated when channel material such as PEDOT:PSS is employed [35, 36, 37]. The normalized g m is calculated by g m·(W ch/L ch)−1·V DS −1 and g m·(W ch/L ch)−1·(V GS–V TH)−1 in the linear and saturation regimes, respectively, where W ch and L ch are the channel width and length, respectively. Negligible hysteresis was observed along with an I D,max/I D,min exceeding 104 in the linear regime at V DS = −0.05 V. The output characteristics demonstrate robust current drive capability, with an I D,max of 0.18 mA obtained at V DS = −0.5 V and V GS = −0.5 V (Figure 2b). These results indicate strong gate controllability while simultaneously achieving high current drivability in the CNT sIGTs on plastic substrates.
FIGURE 2.

(a) |I D| and normalized g m‐V GS curves, and the black triangle indicates the Boltzmann limit of the SS at 298 K (60 mV/dec), and (b) output characteristics (W ch/L ch = 900/50 µm). (c) Benchmark plot comparing flexible CNT transistors with solid dielectrics, including soft polymeric materials and rigid inorganic oxides. Red symbols employ ion gating (circle [53] and square [54]), black symbols incorporate non‐ionic polymer dielectric (triangle [55] and inverted triangle [55, 56]), and empty red symbols use high‐k oxide‐based dielectric materials (right triangle [57], left triangle [58], hexagon [59], circle [60], square [61], inverted triangle [62], diamond [63], and triangle [64]). (d) Normalized I D,max and log(I on/I off) as a function of CNT coating time. (e) Cycling stability over 500 sequential V GS sweep cycles. The total measurement duration is 4000 s, and each cycle consists of a dual sweep of V GS from +0.5 to −0.5 V. (f) Long‐term stability of identical device with ion gel concentration of 4%, monitored through time‐dependent |I D| (W ch/Lch = 900 µm/50 µm). (g) Photo of wafer‐scale fabrication of CNT sIGTs on a Parylene substrate (inset: high‐density integration with 1302 CNT sIGTs; zoomed‐in image of a single device; scale bar: 100 µm). (h) |I D|‐V GS curveds of 400 CNT sIGTs fabricated on a single substrate, along with statistical distributions of log(|I D,max|) where V ov at −0.3 V, log(I D,max/I D,min), V TH, and SS (W ch/L ch = 50/3 µm).
Benchmarking of flexible transistors with CNT channel shows that the normalized g m increases monotonically with decreasing equivalent oxide thickness (EOT) (Figure 2c). However, in flexible electronics, aggressive EOT scaling is limited by mechanical compliance and low‐temperature processing constraints. In the CNT sIGT developed here, all fabrication steps were performed below 105°C, ensuring compatibility with plastic substrates. By employing ion gating, the present CNT sIGT achieves a sub‐nanometric EOT of approximately 0.62 nm while remaining mechanically compliant, resulting in a high normalized g m of 103.58 µS/V. Beyond effective EOT scaling, the superior electrostatic performance also originates from the unique gating mechanism in CNT networks. In conventional solid‐dielectric‐gated CNT transistors, electrostatic screening within randomly stacked nanotube networks leads to non‐uniform potential distribution and incomplete gating of inner tubes, degrading switching characteristics [33, 34]. In contrast, ion gating enables ions to penetrate the porous CNT network and form electric double layers around individual nanotubes, allowing volumetric and conformal gating throughout the channel thickness. This effectively suppresses screening effects and ensures uniform channel modulation, contributing to the near‐ideal SS observed in this work. These results demonstrate that strong electrostatic performance can be achieved in flexible electronics by leveraging ion‐based dielectrics, overcoming the fundamental trade‐off between mechanical compliance and gate controllability.
Importantly, the normalized I D increases with multiple CNT coating cycles, corresponding to thicker CNT networks, while preserving an I D,max/I D,min of approximately 105 (Figure 2d and Figure S4). This behavior indicates that effective and uniform channel modulation is maintained even for thick CNT channels, underscoring the robustness of EDL‐based electrostatic control against channel thickness scaling. Beyond material‐level optimization, electrostatic performance was further enhanced through device‐level configuration. By adopting a finger‐type S/D architecture to effectively increase the W ch without enlarging the device footprint, the g m was significantly increased, exceeding 3 mS (Figure S5). These results demonstrate that ion gating remains effective even with increased channel thickness and can be further enhanced through optimized device geometry to improve electrostatic coupling and current drivability.
The robustness of the CNT sIGT was further evaluated through repeated electrical biasing, a critical assessment for transistors employing ionic materials where undesired Faradaic reactions can progressively degrade channel properties. Figure 2e presents I D,max and I D,min from transfer characteristics measured over 500 consecutive V GS sweep cycles under ambient conditions, with a total measurement duration of 4000 s. After cycling, the I D,max increased by 7.8%, while the maximum g m and SS remained negligibly changed, exhibiting variations of only +1.2% and −0.3%, respectively (Figure S6). The absence of performance degradation under repeated ionic gating confirms that visible electrochemical side reactions are not observed in the CNT sIGT, reflecting the high electrochemical stability of the CNT channel with the thin‐film electrolyte and metal gate electrode.
Long‐term reliability was evaluated by characterizing the device's electrostatic characteristics over 55 months after fabrication (Figure 2f). The devices retained stable operation without noticeable degradation, underscoring the robustness of the CNT channel and the long‐term stability of ionogel thin films with ion gel concentration of 4% (Figure S7). This sustained performance over extended time scales highlights the suitability of CNT‐based solid ion‐gated transistors for applications requiring durable and reliable operation under ambient conditions. In addition, the environmental stability of the devices was systematically investigated. Since CNT channels are known to be sensitive to ambient factors, particularly moisture, unencapsulated devices were stored under vacuum and measured in a nitrogen‐filled glovebox (Figure S8). The device exhibited a gradual negative shift in V TH, approaching a saturated value following an exponential decay with a time constant of 55.91 h, indicating relaxation of residual adsorbates. After approximately 100 h, negligible further variation was observed, suggesting stabilization under controlled conditions.
The mechanically robust solid ionogel thin film is fully compatible with a range of conventional thin‐film processes, including photolithography, physical vapor deposition, and CVD, enabling the formation of top‐gate metal electrodes directly on the ionogel layer and the integration of conformal encapsulation layers. The solidification of the electrolyte broadens the process window for thin‐film fabrication, allowing the solid ionogel to support subsequent microfabrication steps, including direct metal deposition as well as photolithographic patterning such as wet‐etching (Figure S1). Importantly, inset in Figure 2g displays fine gate electrode patterning results demonstrating a high density of 2800 devices/cm2 (Figure S9). Wafer‐scale CNT sIGTs are fabricated on 5‐µm‐thick CVD‐grown Parylene foils using a carrier wafer for handling during processing. Statistical analysis of 400 CNT sIGTs distributed over multiple dies (Figure 2h) shows high uniformity, with extracted parameter distributions of the maximum drain current I D,max, the minimum drain current I D,min, the threshold voltage V TH, and the subthreshold swing SS. The corresponding statistical metrics yield log(|I D,max|) = −5.64 ± 0.27 and log(I D,max/I D,min) = 4.12 ± 0.39, along with V TH = −0.42 ± 0.05 V and SS = 114.90 ± 33.56 mV/dec, indicating consistent device performance across large areas and supporting the suitability of the solid‐state CNT sIGT platform for scalable thin‐film electronics.
The non‐fluidic nature of the solid ionogel provides sufficient mechanical integrity to support flexible device configurations, maintaining stable electrical characteristics under bending with a minimum radius of 5 mm as well as under severe crumpling conditions, with negligible degradation in transfer characteristics and gate leakage current (Figure S10). In addition, compatibility with CVD processes allows seamless integration with encapsulation layers. For instance, a 3‐µm‐thick Parylene‐C film can be conformally deposited on the sIGTs, leading to improved device stability under repeated operation (Figure S11). The encapsulated devices exhibit a reduced V TH shift (+0.02 V) compared to unencapsulated devices (+0.09 V) after cycling, while maintaining stable electrical characteristics, with variations in I D,max, transconductance g m, and SS to +14.8%, +8.9%, and +2.2%, respectively, over 500 sweep cycles with a total measurement duration exceeding 16 000 s. These results indicate that the inherent hydrophobicity of both the polymer matrix and the ionic liquid provides intrinsic resistance to environmental effects, which can be further enhanced through conventional passivation processes.
2.3. EIS Analysis of Ionic Transport in Thin‐Film Ionogels
The EIS was employed to investigate the ionic transport and dielectric behaviors of the thin‐film solid electrolyte using metal‐insulator‐metal (MIM) capacitor structures. Three distinct dielectric behaviors were observed: EDL formation at low frequencies, ion migration in the intermediate‐frequency regime, and a polarization‐dominated response at high frequencies (Figure 3a). At low frequencies, mobile ions accumulate at the electrode interfaces to form EDLs, resulting in a large EDL capacitance C EDL. As the frequency increases, ions can no longer fully follow the applied field to establish equilibrium EDLs, and the response becomes governed by ion migration in the ionogel, characterized by the R ion. In the high‐frequency regime, ionic motion is effectively negligible, and the dielectric response is dominated by molecular polarization, giving rise to a bulk capacitance C bulk associated with dipolar reorientation.
FIGURE 3.

(a) 3D illustration of dielectric behaviors in EDL capacitor, illustrating (i) EDL formation in the low‐frequency regime, (ii) ion migration in the intermediate‐frequency regime between (i) and (iii), and (iii) polarization‐dominated behavior in the high‐frequency regime, represented by C EDL, R ion, and C bulk, respectively. (b) σ ion as a function of the 1/t el. The contour line represents a constant RC time constant calculated using C EDL of 5.56 µF/cm2. Previously reported devices employing the same ionic species and polymer matrices are included for benchmarking square, diamond, and triangle symbols for [14, 65], and [39], respectively. Star symbols denote the data from this work. (c) Bode angle plot of the equivalent circuit model consisting of series‐connected R ion and C EDL with a parallel C bulk in MIM capacitor with ion gel concentration of 4% (symbol: measured data, line: fitted data). (d) Bode impedance plot depicting frequency‐dependent |Z| of the solid electrolyte over an ion gel concentration range from 0.5% to 4% (symbol: measured data, line: fitted data). Impedance guidelines corresponding to C i,EDL (5.56 µF/cm2) and C i,bulk (12 nF/cm2), extracted from the fitted parameters of the device with ion gel concentration of 4%, are included.
Figure 3b summarizes the range of σ ion achievable employing 1‐ethyl‐3‐methylimidazolium bis(trifluoromethanesulfonyl)imide ([EMIM][TFSI]) as the ionic liquid and fluorinated polymer matrices based on poly(vinylidene fluoride‐co‐hexafluoropropylene) (P(VDF‐HFP)) and poly(vinylidene fluoride‐co‐trifluoroethylene) (P(VDF‐TrFE)) as ion‐permeable polymers, which are incorporated for solid ionogel in this work. Since areal ion conductance G i,ion and σ ion are directly governed by the ionic content within the ionogel, the corresponding values in Figure 3b are analyzed as a function of mass concentration rather than volume fraction (Figure S12 and Table S1). Given that G i,ion = σ ion/t el, where the t el is the thickness of the electrolyte, the extracted G i,ion values are found to be higher than those reported in previous studies employing an ionic mass concentration of 50 wt.%. This enhancement arises from the thin‐film configuration, which significantly reduces the physical gate‐to‐channel distance, thereby compensating for the reduced ionic conductivity (Note S2).
Hydrophobic ILs such as [EMIM][TFSI] are preferred for thin‐film electrolyte gating due to their wide electrochemical stability window and reduced sensitivity to ambient moisture [38]. [EMIM][TFSI] exhibited the lowest sweep‐delay sensitivity and was therefore selected among the tested ionic species, including ionic liquids with different cation and anion combinations, such as 1‐ethyl‐3‐methylimidazolium trifluoromethanesulfonate ([EMIM][Otf]) and 1‐butyl‐3‐methylimidazolium bis(trifluoromethanesulfonyl)imide [BMIM][TFSI] (Figure S13). Efficient ion transport in the solid state requires polymer matrices capable of coordinating both cations and anions by ‐CH and ‐CF moieties while maintaining an amorphous morphology [39, 40, 41]. Fluorinated polymers provide favorable dipolar interactions with ionic species, enabling homogeneous IL dispersion and continuous ion‐conducting pathways, whereas non‐fluorinated polymers (e.g., PMMA) suffer from ion clustering and reduced ionic mobility in the polymer matrix (Figure S14). By blending P(VDF‐HFP) with P(VDF‐TrFE), ionic mobility is preserved while mechanical robustness is reinforced through controlled crystallite formation, allowing σ ion to be tuned over a wide range without compromising thin‐film integrity [40]. FT‐IR analysis supports this structural modulation: the pristine P(VDF‐TrFE) film (ion gel concentration = 0%) exhibits formation of β‐phase peaks at 850 cm−1 (C–F symmetric stretching), 1288 cm−1 (C–F asymmetric stretching), and ∼1400 cm−1 (–CH2 and –C–C– asymmetric stretching) (Figure S15) [13, 42]. Upon incorporation of the P(VDF‐HFP)‐based ion gel, these peaks are significantly suppressed, while a distinct peak at 1573 cm−1 associated with the ionic liquid emerges, confirming incorporation of ionic species.
The magnitude of the measured impedance |Z| spectra were fitted using an equivalent circuit composed of series‐connected R ion and C EDL, in parallel with C bulk (inset of Figure 3c). Figure 3c presents the Bode phase plot, where the transition from capacitive behavior (phase = −90°) at low frequencies to resistive behavior (phase = 0°) at intermediate frequencies, followed by a return to capacitive behavior at high frequencies, is clearly observed. The solid lines show fitted results that closely reproduce the measured data (symbols), confirming the validity of the proposed circuit model. The solid lines display fitted results that closely reproduce the measured data (symbols), confirming the validity of the proposed circuit model. A small deviation between the fitted and measured phase angles is observed in the high‐frequency regime, which is attributed to the non‐ideal and distributed nature of the dielectric response. In particular, the transition toward capacitive behavior at high frequencies occurs more gradually than predicted by the simplified model, resulting in incomplete convergence to −90° within the measured frequency range. This behavior is further influenced by the geometrical nature of bulk capacitance and possible interfacial non‐uniformities in the thin‐film electrolyte, leading to a distribution of relaxation times.
Figure 3d presents the Bode plot of |Z| as a function of frequency for thin‐film electrolytes with ion‐gel concentrations ranging from 0.5% to 4%. For the device with 4% ion gel concentration, the extracted areal bulk capacitance C i,bulk and areal EDL capacitance C i,EDL are 12 nF/cm2 and 5.56 µF/cm2, respectively, and are used as the reference guidelines in the graph (Figure 3d). This condition corresponds to the lowest fitting error among all compositions, with error values of 7.593% and 3.541% for the respective fitting regimes (Table S2). In comparison, the increased fitting error observed for lower ion gel concentration conditions originates primarily from enhanced noise in the range from 800 to 8000 Hz, as shown in Figure S16, where the impedance response becomes less stable due to a measurement limit change in the regime. The impedance responses for all compositions closely follow the gray reference lines in both the low‐ and high‐frequency regimes. This behavior confirms that large charge accumulation through EDL formation is consistently preserved across different ion gel concentrations. The downward shift of the horizontal plateau in the |Z|–frequency response with increasing ion gel concentration directly reflects a reduction in R ion, indicating that even small variations in ionic liquid content significantly influence ion migration.
2.4. Frequency‐Dependent Dynamic Response of CNT sIGTs
A small‐signal model is formulated using an equivalent circuit composed of R ion, C EDL, and C bulk to investigate the dynamic characteristics of the CNT sIGT. The AC gate current i g is defined by the gate‐side input impedance, while the resulting modulated AC gate‐source potential v gs controls the AC channel current i ch through the g m and output resistance r o (Figure 4a). While the AC drain current i d normally remains independent of the applied frequency within the quasi‐static regime in conventional transistors using solid‐state dielectrics, a clear frequency‐dependent behavior is observed when an ionic dielectric is employed [1]. As the frequency of the AC input voltage v in increases, ionic species are no longer able to follow the applied gate modulation, leading to an effective voltage drop across the R ion. As a result, the effective v GS differs from the v in, giving rise to a reduction in the i d. The i d can be simplified as i d = i ch – 0.5·i g using a discrete circuit model implying the time‐response of the ion‐based device system, assuming |i gd| = |i gs|, where i gd and i gs denote the AC gate‐drain and gate‐source currents, respectively [43]. The i ch was derived from g m·v gs, where the voltage divided across C EDL, which effectively modulates the mobile charge carrier density in the channel, can be expressed following:
where X C_EDL is capacitive reactance from C EDL.
FIGURE 4.

(a) Simplified small signal model of CNT sIGT. (b) Simulated small‐signal analysis. The curve with i ch,1 (solid line) and i g,1 (dash line) corresponds to the reference case (v in = 0.05 V, g m = 6.17 × 10−4 S, C EDL = 1.09 × 10−8 F, R ion = 6.14 × 105 Ω, and C bulk = 5.56 × 10−11 F). The curves with subscripts from 2 to 4 depict simulated cases with reduced R ion, where R ion is scaled to 0.1×, 0.01×, and 0.001× of the reference value, respectively, while all other parameters are kept constant. While i ch,−3 dB is defines as 0.707 × i ch(0), the value of i ch(f T) varies depending on the specific crossing condition. (c) f T, f 3dB, and i ch(f T)/i ch(0) as a function of normalized R ion. (d) Frequency‐dependent i d and i g for devices with W ch/L ch = 900/50 µm and L ov = 240 µm. (e) AC current amplitude as a function of time with 100 Hz, 5, and 20 kHz. (f) Frequency‐dependent i d and i g for devices with W ch/L ch = 250/10 µm and L ov = 100 µm (right) (symbol: measured data, line: fitted data). Black solid line denotes fit based on the input impedance model consisting of a series R ion and C EDL, and a parallel C bulk.
For a solid‐state dielectric, i g typically increases by one order of magnitude for every decade increase in frequency, reflecting capacitive behavior in the dielectric. However, in ion‐gated devices, the frequency response is governed by a frequency‐dependent input impedance that includes both resistive and capacitive ionic components. The i g was fitted by the input impedance, i g = v in/Z input, containing R ion, C EDL, and C bulk expressed by following:
where j is imaginary constant for complex number, ω is angular frequency, and X C_bulk is capacitive reactance from C bulk, respectively. The i d is composed of contributions from both i ch and i g; however, at low frequencies (e.g., 1 Hz), i g remains at the nA level, corresponding to less than 0.01% of i ch, and can therefore be considered negligible in this regime. Nevertheless, for a more accurate analysis over a wide frequency range, parasitic effects should be taken into account to properly capture the real device response. As evidenced by the MIM characteristics in Figure 2, the device response transitions from a capacitive regime at low frequencies to a resistive regime at intermediate frequencies, followed by a second capacitive regime at higher frequencies. This behavior directly manifests in the non‐monotonic frequency dependence of the drain current (Figure 4b).
The dynamic characteristics of the device were evaluated using two conventional metrics. The cutoff frequency f 3dB was extracted at the point where the i d = g m ·v gs drops to −3 dB (0.707×) of i d(0), which corresponds to the DC current, due to the effective v gs drop by R ion [10]. In addition, the transit frequency f T was defined as the frequency at which the current gain (i d/i g) equals unity. A controlled variation of R ion was employed to investigate its influence on frequency‐dependent response and the extraction of dynamic parameters. The reference condition was defined with v in = 0.05 V, g m = 6.17 × 10−4 S, C EDL = 1.09 × 10−8 F, R ion = 6.14 × 105 Ohm, and C bulk = 5.56 × 10−11 F denoted by subscription of 1 in Figure 2b. As R ion is reduced by one order of magnitude, the extracted f 3dB shifts toward higher frequencies, yielding approximately 22.85, 2.28 kHz, 228.45, and 22.85 Hz, respectively. This monotonic scaling behavior indicates a direct correlation between R ion and the −3 dB cutoff, consistent with a response limited by the time constant determined by varying R ion. In contrast, the extracted f T exhibits a markedly different trend. Despite the large variation in R ion, f T differs to 9.21, 9.01, 8.85, and 5.69 kHz, indicating that the unity current‐gain condition is not governed by the same mechanism as the −3 dB cutoff (Figure 4c). The i ch at the f T extracted i ch(f T) is reduced to 99.5%, 40%, 10%, and 1% of its low‐frequency value i ch(0) as the frequency shifts from 9.21 to 5.69 kHz, meaning these operating points are unsuitable for practical signal transmission. While f 3dB is smaller than f T since dynamic response is already limited by the ionic RC time constant in the larger R ion regime, f T is smaller than f 3dB as the i g increases with frequency in the smaller R ion regime. A distinct crossover in dynamic behavior is observed at R ion ≈0.02× the original value. In the ionic R ion·C EDL‐limited regime (left side of Figure 4c), the dynamic response is primarily constrained by ionic dynamics, where the reduction in i ch with increasing frequency. Above the crossover point, the device enters an i g‐limited regime, in which further reduction of R ion no longer improves the dynamic response. Instead, the cutoff behavior is dominated by i g, and can therefore be improved primarily by reducing structural parasitics and enhancing the electrostatic performance of the channel, rather than by further lowering R ion alone. This observation highlights that achieving higher dynamic performance in sIGTs ultimately requires scalable fabrication with fine patterning and precise device geometry control.
The CNT sIGTs were fabricated using ionogel thin films with different G i,EDL, while maintaining similar electrostatic channel characteristics; on‐state current level and g m (Figures S17 and S18). To verify the channel properties, we experimentally evaluated whether key electrostatic performance metrics remain consistent across different ion gel concentrations. The g m, which reflects the efficiency of gate modulation, was used as a representative figure of merit. As shown in Figure S18, although the transfer characteristics exhibit sweep‐rate dependence, devices with ion gel concentration over 0.5% show nearly identical behavior at sweep rates below 20 mV/s, indicating quasi‐static operation. Under a sufficiently slow sweep rate of 2.5 mV/s, the extracted g m values for ion gel concentrations of 0.5%, 1%, 2%, and 4% are 29.16 ± 2.73, 35.00 ± 15.94, 31.16 ± 6.32, and 32.13 ± 3.85, respectively, demonstrating comparable electrostatic performance across devices despite differences in ionic dynamics.
Ionogel compositions with ion gel concentrations of 1%, 2%, and 4% yielded G i,EDL of 9.99 × 10−3, 0.20, and 3.18 S/cm2, respectively, corresponding to approximately one‐order‐of‐magnitude increments in G i,EDL. Small signal analysis reveals that the f 3dB shifts to higher frequencies with increasing G i,EDL, occurring at approximately 10, 200 Hz, and 1 kHz for the devices with ion gel concentrations of 1%, 2%, and 4%, respectively (Figure 4d). The phase relationship between the i d and i g provides insight into the device operation, as shown in Figure 4e. Under low‐frequency conditions, where channel conduction dominates, i d follows the gate input v gs with a near 0° phase alignment. As the frequency increases and i g becomes comparable to or larger than i d, the device response transitions to a capacitive regime, where the phase approaches −90°, indicating displacement‐current‐dominated behavior. In this regime, based on the previously described ionic discrete circuit model, i d is influenced not only by i ch but also by i g, leading to a non‐monotonic frequency response in which i d does not simply decrease but can increase at high frequencies, in contrast to the purely conductive behavior assumed in simplified simulations in Figure 4b. Therefore, the apparent phase variation across different frequency ranges in Figure 4e originates from the transition between conduction‐dominated and capacitance‐dominated regimes, rather than from amplitude‐dependent effects. The i g shows a reduced slope over the frequency range from 10 to 1000 Hz, indicating the emergence of a resistive component corresponding to decreased R ion. Notably, while f 3dB exhibits strong dependence on G i,EDL, the variation in the extracted f T is comparatively modest, consistent with the simulation results (Figure 4b).
For the device with the highest G i,EDL, f 3dB and f T approach similar values, indicating that ionic transport no longer dominates the dynamic limitation. In this regime, further enhancement of f T requires suppression of i g rather than additional increases in G i,EDL. As CNT networks possess abundant vacant sites, their intrinsic channel capacitance is substantially smaller than that of electrodes. Consequently, reducing the L ch and minimizing L ov simultaneously increases the i d while lowering the parasitic capacitance that contributes to i g. As shown in Figure 4f, employing decreased L ch and L ov reduces i g by approximately one order of magnitude at ≈1 Hz for the 4% device in Figure 4d. This optimization yields an f 3dB of 4.2 kHz and an f T of 19.7 kHz, with the measured i g response well captured by the input‐impedance model and showing reasonable consistency with the unit‐step response time constants of 77.8 and 22.2 µs (Figure S18). These results clarify that increasing f 3dB through reduction of R ion is a primary requirement for improving dynamic response in CNT sIGTs, while further performance gains can be achieved by reducing i g via fine gate alignment and patterning. Together, these strategies demonstrate that the dynamic response of solid ion‐gated transistors can be systematically engineered through a combined control of ionic transport and device geometry.
2.5. Ion‐Dynamics‐Driven Synaptic Behavior of CNT sIGT
Electrolyte gating enables ion‐mediated control of G ch, allowing dynamic modulation governed by ionic migration within the dielectric layer (Figure 5a). The gate electrode and channel can be regarded as presynaptic and postsynaptic nodes, respectively. If subsequent pulses are applied before complete relaxation of the ionic distribution, the device exhibits cumulative state evolution, resulting in conductance modulation through short‐term potentiation and depression. This behavior enables programmable conductance states based on pulse history. Under a constant pulse train, devices with higher ion gel concentration quickly saturate to the maximum G ch, as the ion accumulation and relaxation times are too short to support incremental G ch modulation, leading to pronounced nonlinearity during continuous pulse stimulation. In contrast, devices with moderated G i,ion exhibit G ch evolution closer to an ideal linear response, with more uniform step intervals, indicating improved programmability. A voltage pulse applied at the gate, analogous to a presynaptic spike, induces an increase in the drain current that corresponds to an EPSC, thereby emulating synaptic plasticity. Paired‐pulse facilitation (PPF) was employed to evaluate short‐term plasticity (STP) in the CNT sIGT. A pair of 100‐µs‐long gate pulses separated by an interval Δt was applied to a device with an ion gel concentration of 4%. As shown in Figure 5b, the second EPSC amplitude (A 2 = 23.67 µA) exceeds the first response (A 1 = 17.25 µA), yielding a PPF effect. This behavior arises because the cations accumulated during the first pulse partially relax during Δt, and shorter intervals preserve residual ionic accumulation, leading to a higher PPF index defined as A 2/A 1 × 100. The PPF index remains nearly saturated for Δt up to ≈100 µs and gradually decays toward 100% at longer intervals, indicating full relaxation of the excited current.
FIGURE 5.

(a) Schematic illustration of the CNT sIGT emulating synaptic behavior, where pulsed gate input signals generate postsynaptic current responses. (b) PPF characteristics and (c) PPF index as a function of Δt of CNT sIGT. (d) Frequency‐dependent pulse response characteristics of CNT sIGTs with ion gel concentrations ranging from 0.5% to 4%, evaluated using 10‐pulse input trains at 101, 102, 103, and 104 Hz.
To analyze the characteristic time scales underlying the synaptic response, the dependence of the PPF index on Δt was fitted using a bi‐exponential decay function (Figure 5c), enabling the extraction of distinct relaxation components associated with ionic dynamics in the device. The fitting function is expressed as:
where B 0 is the electrostatic offset corresponding to the baseline G ch, B 1 and B 2 are the amplitudes of two relaxation components extracted from the bi‐exponential fitting, and τ 1 and τ 2 are the corresponding characteristic time constants. The fitting yielded B 0 = 102.08, B 1 = 22.38 with τ 1 = 130.05 µs, and B 2 = 23.99 with τ 2 = 482.83 µs. The fitting shows excellent agreement with the experimental data, with an R‐square value of 0.998, indicating high fitting fidelity. The shorter time constant, τ 1, exhibits a temporal scale comparable to that observed in the unit‐step response analysis in Figure S19. This correspondence suggests that τ 1 may originate from relatively fast ionic relaxation occurring in the EDL region adjacent to the CNT channel. Such fast relaxation is expected to dominate short‐term G ch modulation under paired‐pulse stimulation and therefore plays a key role in the observed synaptic facilitation behavior. In contrast, the longer time constant, τ 2 of approximately 480 microseconds, reflects a substantially slower relaxation process in the dielectric bulk region. This component is attributed to slower ionic diffusion and relaxation processes in the bulk region, which are expected to be weakly coupled to the channel electrostatics. Due to its longer relaxation time, this bulk‐dominated process primarily influences quasi‐static electrostatic characteristics, such as baseline conductance and slow relaxation behavior, rather than contributing to dynamic synaptic modulation. The presence of two distinct time constants indicates that the PPF response can be interpreted as the superposition of fast interfacial and slow bulk ionic relaxation processes. This multi‐time‐scale ionic dynamics provides a physical basis for the temporal diversity observed in the synaptic response and underpins the suitability of the device for subsequent reservoir computing operation, where concurrent fast and slow temporal states are required.
When a channel, which is electrostatically gated by EDL, is employed, one of the key advantages is that the intrinsic ionic dynamics of the dielectric can be directly translated into the transistor response with high fidelity. To examine the behavior, synaptic characteristics were analyzed by applying 10 input pulse trains with frequencies spanning four decades (10, 100, 1000, and 10 000 Hz) to CNT sIGTs incorporating dielectrics with ion gel concentrations of 0.5, 1%, 2%, and 4%, corresponding to approximately one‐order differences in R ion (Table S3 and Figure 5d). For devices with an ion gel concentration of 1%, clear synaptic behavior exhibiting STP was observed at both 100 and 1000 Hz. At 100 Hz, the extracted A 2/A 1 and A 10/A 1 values were 148.17 and 295.62, respectively, while at 1000 Hz these values were 139.89 and 338.18 (Table S4). At 100 Hz, the applied pulse interval is sufficiently long for ions to respond effectively, resulting in an elevated G ch and a higher A 2/A 1 compared to the 1000 Hz case. However, this operating regime also marks the onset of G ch saturation, leading to a relatively lower A 10/A 1 despite the larger initial facilitation. In contrast, at 1000 Hz, the reduced ionic response limits the absolute G ch level but enables finer incremental G ch updates, yielding a larger A 10/A 1 ratio and more gradual potentiation exhibiting relative non‐volatile characteristics, long‐term plasticity. Consistent behavior is also observed in devices with systematically faster and slower ionic response times (Figure S20). These results indicate a trade‐off between achievable conductance level and programmability resolution, which can be selected depending on system‐level requirements. Lower‐frequency operation is advantageous when higher G ch or low‐frequency responsiveness is required, whereas higher‐frequency operation is suitable for achieving finer conductance discretization at lower G ch. Through optimization of pulse conditions, up to 50‐step potentiation and depression characteristics were further demonstrated (Figure S21).
Notably, in the low‐frequency regime where ions respond rapidly, the conductance tends to reach saturation within only a few pulses, limiting further pulse‐modulated updates. Conversely, at excessively high frequencies, ions are unable to sufficiently relax, and G ch is no longer effectively updated; instead, the response becomes dominated by displacement gate current, resulting in large coupled currents without meaningful synaptic modulation. In this high‐frequency regime, the transient drain current is not solely governed by electronic channel conduction but includes a significant contribution from ionic displacement current associated with rapid charging and discharging of the channel capacitance [43]. Upon removal of the gate pulse, the redistribution of ions generates a transient current in the opposite direction, leading to the appearance of pronounced negative peaks (undershoot) in the current response (Figure S22). This behavior becomes more prominent as the stimulation frequency increases, where the pulse duration is insufficient for the electronic current to reach a steady state, and the measured signal is increasingly dominated by the ionic transient response.
2.6. Multi‐Time Scale Reservoir Computing in Monolithic 3D CNT sIGTs
To demonstrate thin‐film processability together with tunable ionic dynamics, vertically stacked CNT sIGTs with different ion gel concentrations were fabricated (Figure 6a). The fully solidified CNT sIGTs are compatible with conventional CVD interlayer dielectric deposition, enabling sequential device stacking. In addition, standard photolithographic processes, including lift‐off and wet‐etching steps, can be continuously applied without degradation of the underlying ion‐gated devices. The fabricated dynamic devices exhibit strong classification capability for temporally structured input signals, and their tunable temporal characteristics enable effective matching to the time scale of incoming stimuli, highlighting their potential as time‐domain kernels for a wide range of time‐series signal processing tasks (Figure 6b). The classification performance of the dynamic devices was evaluated across two distinct temporal regimes. The first regime employed fast electrical pulse inputs with a characteristic duration of 3.5 ms, where each input consisted of four sequential pulses applied with three Δt. The second regime utilized slower sequence‐based inputs with a characteristic time unit of 35 ms, likewise composed of four temporal input states separated by three Δt values. These two datasets were designed to probe device operation under microsecond–millisecond‐scale and millisecond‐scale temporal dynamics, respectively, enabling systematic assessment of time‐scale‐dependent classification behavior. Sequential 4‐bit electrical pulse trains were applied to the device gate, yielding clearly distinguishable output distributions corresponding to 16 discrete states (Figure 6c). For each input pattern, the state classification was consistently reproduced over ten repeated measurements under both time‐scale settings, confirming the uniformity and reliability of the device response across disparate temporal regimes. Based on these experimental observations, a reservoir model was constructed by incorporating the experimentally extracted mean values and standard deviations of the device outputs, obtained from repeated measurements for each input time scale. This approach captures intrinsic device‐level variability when extrapolating the model to array‐scale operation.
FIGURE 6.

(a) Moving‐MNIST classification and dual‐timescale reservoir scheme. MNIST digits (10 classes) are converted into 4 frame motion sequences with one of four directions, and 2 classes of time, total is 80 classes. The encoded temporal inputs are applied to vertically stacked CNT sIGT reservoirs with fast and slow ionic dynamics, and the reservoir outputs are classified using an FC readout. (c) 4‐bit gate pulse sequences (from [1111] to [0000]) are applied at 4 timesteps. (d) Time‐scale‐selective classification of moving‐MNIST inputs using fast and slow reservoirs. (e) The resulting reservoir‐state currents for the 16 input patterns are plotted for the first‐tier (slow) and second‐tier (fast) reservoir layers, showing clearly distinguishable output distributions at each timestep (left and right panels). Training and validation accuracy and loss curves of the moving‐MNIST classifier, constructed using the extracted reservoir outputs averaged over 10 repeated cycles for each input sequence, are shown for each layer.
Building on this framework, we further modeled a multi‐tier reservoir architecture by vertically stacking two dynamic device arrays with deliberately different intrinsic time scales. This hierarchical configuration enables concurrent extraction of temporal features in different time domains within a unified reservoir, where the faster tier preferentially responds to short‐timescale variations while the slower tier integrates longer‐timescale components. To validate the generality of this approach, two representative input modalities with markedly different temporal characteristics were examined: a fast electrical input sequence with a duration of 3 ms and a frame‐based visual sequence derived from moving MNIST with a 35 ms time step. In both cases, temporal information was processed through the stacked time‐domain kernels without explicit temporal unfolding or an increase in the number of input nodes. In the extended reservoir computing simulation, MNIST digit images were converted into four‐frame motion sequences with constant temporal displacement, and the per‐pixel 4‐bit temporal patterns were mapped through the multi‐tier time‐domain kernels into a single two‐dimensional output map. The resulting dataset was formulated as a 40‐class classification problem by jointly encoding digit identity and motion direction. A minimal fully‐connected (FC) classifier was employed, in which the 28 × 28 reservoir output was flattened and directly projected onto a 40‐dimensional softmax layer without additional nonlinear transformations, enabling direct assessment of the separability of the spatiotemporal representations generated by the multi‐tier dynamic reservoir. Unlike conventional time‐series processing schemes that allocate independent input nodes for the pixels in each temporal frame, the proposed system exploits the intrinsic dynamics of the stacked device arrays to encode temporal information in situ. As a result, both fast (3 ms‐scale) and slow (35 ms‐scale) input signals are compressed into a single‐frame reservoir output that forms a separable spatial representation, enabling classification using a single FC readout without additional layers. Despite this highly simplified architecture, the system achieves validation accuracies exceeding 90% for the moving‐image sequence tasks at both time scales. These results demonstrate that the multi‐tier dynamic device array effectively accommodates a broad range of temporal scales, enabling robust time‐series classification with reduced explicit input expansion, architectural complexity, and computational overhead.
To further verify the computing capability of the dual‐time‐scale reservoir, we performed simulations of a vertically stacked architecture composed of two tiers: one expanded from ‘fast devices’ and the other from ‘slow devices,’ each arranged as a 28 × 28 array (Figure 6d,e, and Figures S23–S26). The optimized input time scale assigned to each tier not only broadens the spectrum of input signal speeds that can be discriminated by the hardware reservoir, but also enables explicit classification of the signal speed itself. By concatenating the 28 × 28 outputs from the two tiers, a combined 56 × 28 reservoir output was constructed and subsequently classified using an 80‐dimensional softmax FC layer. The input dataset consisted of 40 classes defined by digit identity and motion direction, augmented with additional speed labels corresponding to 1‐ and 10 ms‐scale dynamics, resulting in a total of 80 classification classes. When processed through the multi‐time‐scale reservoir, the system achieved validation accuracies exceeding 90%, with near‐perfect accuracy observed specifically for motion direction and speed classification.
2.7. Design Considerations for Scalable Ion‐Gated Neuromorphic Devices
The vertically integrated structure using solid ionogel thin film provides a distinct pathway to engineer ionic dynamics within a compact device footprint. Ion‐based vertical field‐effect transistor (VFET) architectures offers unique pathway to enabling high‐performance ionic devices by L ch scaling down to the film thickness without requiring complex lateral patterning, relying instead on layer‐by‐layer stacking. This structural advantage simplifies fabrication while enhancing integration density [44, 45, 46, 47]. VFET devices employed a liquid electrolyte specifically advantageous to the common gate configuration sharing a single gate electrode with multiple channels for multimodal ionic interfaces [11, 48]. Nevertheless, the development of ionogels in solidified and thin‐film forms remains a critical agenda for enabling scalable integration. Such solid‐state platforms are expected to facilitate higher device density as well as multifunctional operation, including neuromorphic functionalities [49]. In this context, the extent to which ionic species can fully modulate the channel becomes a key design factor. Increasing ionic content can enhance modulation efficiency and dynamic response; however, a higher fraction of soft ionic components may compromise the mechanical robustness of the ionogel matrix. This trade‐off between ionic conductivity and mechanical stability therefore, plays a central role in determining the scalability and reliability of ion‐gated neuromorphic systems. Beyond this material‐level trade‐off, additional device‐level engineering strategies can further expand the functional space. For instance, the incorporation of charge‐trapping layers can introduce non‐volatile characteristics, while the thin‐film form factor enables compatibility with diverse microfabrication processes [50, 51]. Such flexibility highlights the strong potential of engineering approaches to extend the functionality and applicability of ion‐gated systems.
3. Conclusion
In summary, we demonstrate that all‐solid ion‐gated transistors provide a viable pathway toward M3D neuromorphic hardware by overcoming the integration limitations imposed by liquid electrolytes. Solidification defines the gating length by the thin‐film thickness in a top‐gate configuration, enabling wide‐range tuning of ionic dynamics over more than three orders of magnitude. By employing a lithography‐compatible ionogel thin film, both scalable fabrication up to 4‐inch wafer scale and mechanical deformability are achieved. This solid‐state nature, together with a CVD‐grown interlayer dielectric, provides effective encapsulation and layer isolation for vertical stacking of ion‐gated devices with independently engineered ionic time constants. Unlike conventional approaches that rely on circuit‐level implementations to handle signals with different temporal characteristics, the proposed 3D reservoir utilizes intrinsic device dynamics to directly respond to inputs spanning multiple frequencies. As a result, signals with diverse temporal features can be processed using a compact structure with a simple readout layer. Beyond reservoir computing, this work demonstrates that all‐solid ion‐gated transistors can serve as a scalable platform for 3D integration of devices with engineered dynamic responses, where temporal characteristics are directly controlled at the device level.
4. Experimental Section
4.1. Material Preparation
All the solutions related to the ionogel in this work were stored and prepared in a nitrogen atmosphere to prevent moisture. An ion gel solution was prepared by dissolving P(VDF‐HFP) (Number average molar mass (M n) = 130 000 g/mol and Mass average molar mass (M w) = 400 000 g/mol, Sigma–Aldrich) + [EMIM][TFSI] (≥ 98% (HPLC), ≤ 0.5% water, Sigma–Aldrich) in acetone (99.9%, Sigma–Aldrich) in a weight ratio of 1:4:7 [15, 17, 52], while the solid polymer, P(VDF‐TrFE) (70:30 molar ratio, FC30, Piezotech), solution was dissolved in methyl ethyl ketone (60 mg/mL, stirred 24 h in the nitrogen glove box at 60°C). The solid ionogel solution was prepared by blending the ion gel and polymer matrix solution with a volume ratio of 4:96 (ion gel concentration = 4%), equivalent to 1.33wt.% of ionic mass concentration in the manuscript. The semiconducting carbon nanotube solution was prepared by the selective wrapping method with a conjugated polymer. 10 mg of CNT (RN‐220, Nanointegris) and 10 mg of poly(9,9‐di‐n ‐dodecylfluorenyl‐2,7‐diyl) (PFDD) (M w >50 000 (GPC), Lumtec) was blended in 20 mL of toluene (suitable for HPLC, 99.9%, Sigma–Aldrich). The prepared solution was dispersed by a tip sonicator with 60% of maximum power for an hour (VCX‐130, SONICS) in a cooling bath set to 4°C to offset the rising temperature during the process. The dispersed CNT solution was centrifuged at a relative centrifuge force (RCF) of 90 000 g for an hour. The supernatant was filtered through a PTFE (0.45 µm‐pore size, hydrophobic) membrane, and the collected semiconducting CNT was re‐dispersed in the o‐xylene (suitable for HPLC, 98%, Sigma–Aldrich). After the re‐dispersion process, CNT and polymer concentrations were near 0.050 and 0.150 mg/mL, respectively, confirmed by UV–vis spectroscopy (V‐770, Jasco).
4.2. Device Fabrication
All the substrates used in this article were cleaned using a bath sonicator with the cleaning solvents applied in the following sequence: DI water, acetone, and IPA. After cleaning with the solvents, the cleaned substrate was dried with mild nitrogen blowing. Semiconducting carbon nanotubes were deposited by incubating the substrate in the CNT solution prepared by the conjugated polymer selective wrapping method. Solvent rinsing and drying manipulate the adsorbed tubes in the liquid phase to tightly bond on the substrate, and multiple times of incubating and dry‐cycling are employed for a dense CNT network. Solution‐based thin‐film formation, rather than transfer‐based approaches, enables conformal filling of the inter‐tube spaces within the CNT network. Oxygen plasma was applied to the cleaned substrates for 1 min with DC power before hexamethyldisilane (HMDS) treatment. 1 mL of HMDS (reagent grade, ≥99%, Sigma–Aldrich) was divided into the 4 mL vial, and the substrates were placed together with the vial in a vacuum desiccator for 10 min. After the HMDS treatment, the substrates were thermal‐annealed for 30 min under vacuum at 105°C. The substrate was spin‐coated at 2000 rpm for 1 min with no acceleration time after a 1 min puddling step with the CNT solution. Repeat the cycle three times and rinse with pure toluene to remove excess wrapping polymer in the CNT network.
After CNT deposition, source and drain electrodes were fabricated and patterned utilizing the standard lift‐off method. Prior to electrode formation, the substrate underwent a sonication process in toluene for 1 min using a bath sonicator, aimed at detaching loosely bound CNTs from the surface and removing excess wrapping polymers. The electrodes, composed of evaporated metal layers (Ni/Au – 5/25 nm), were deposited using a e‐beam evaporator. The lift‐off process involved immersing the substrates in acetone for 30 min followed by a sonication for 10 min to remove residual metal. To remove residual moisture from the network before applying the thin‐film electrolyte, the substrates were annealed at 105°C for 30 min in a nitrogen glove box.
For sIGT fabrication, the prepared solid ionogel solution was dispensed using a PTFE syringe (0.45µm‐pore size, luer‐lock type) and allowed to stand for 30 s before spin coating at 2000 rpm for 60 s with no acceleration time. After spin coating, the substrates were annealed at 80°C for 2 h to remove residual solvent. The gate electrode was then deposited using a thermal evaporator. To minimize deposition‐induced damage, a two‐step low‐rate deposition process (0.5 Å/s for 10 min, followed by a 1 h cooldown, and an additional 10 min at 0.5 Å/s) was employed. For copper gate electrodes, patterning was carried out via photolithography using a positive PR (AZ GXR601, 14 cP, Merck), followed by wet etching in a Copper etchant (Sigma–Aldrich) solution diluted to 10%. After gate patterning, 3‐µm‐thick Parylene‐C was deposited as a passivation interlayer dielectric.
To fabricate an ionogel‐based MIM capacitor, bar‐type electrodes of Ni/Au (5/25 nm) were patterned and deposited on the substrate using a shadow mask. Subsequently, ionogel thin film with varying ion gel concentrations resulted in films of different thicknesses: 4% at 683.6 nm, 2% at 621.5 nm, 1% at 582.2 nm, and 0.5% at 528.1 nm. After forming the thin film, an identical Au electrode layer of 60 nm was deposited on top using a two‐step deposition process: 0.5 Å/s for 10 min, a 1 h cooldown, followed by another 10 min deposition at 0.5 Å/s. The capacitors were constructed in a crossbar configuration to analyze the overlapping area, with the solid ionogel‐based MIM capacitors having an overlap area of 0.01 cm2. In contrast, MIM capacitors made solely from ionic liquid covered a larger area of 0.25 cm2. Due to the fluid nature of the ionic liquid, wells were formed on glass substrates coated with indium tin oxide (ITO) electrodes using Kapton tape, and then filled with the ionic liquid to create a sandwich cell structure. The distance between electrodes for the fabricated MIM capacitors was determined to be 60 µm, accounting for the thickness of the tape, and this measurement was incorporated into the EIS analysis.
4.3. Electrical Characterization
The electrostatic characteristics (or DC) measurement was conducted using Keysight B1500A semiconductor device analyzer. The dynamic characteristics (or AC) measurement and synaptic behavior analysis were carried out by using the B1530A waveform generator/fast measurement unit (WGFMU) attached to the B1500A. The emulated pulse signal to analyze the synaptic behaviors of the device was programmed using the WGFMU. EIS analysis was conducted using PalmSens 4 potentiostat (PalmSens), and the Levenberg–Marquardt algorithm within the PSTrace software was employed for data fitting of MIM capacitors characterized in Figure 3. EIS fitting for three‐terminal devices in Figure 4f was done by an open‐source code for the EIS‐Toolbox in Matlab with a certain equivalent circuit under fitting configuration of Nelder‐Mead algorithm, Proportional weighting, 1000 iterations, and 1 core. Film thickness is measured by the surface profiler (P6, KLA Tencor).
Conflicts of Interest
The authors declare no conflicts of interest.
Supporting information
Supporting File: adma73882‐sup‐0001‐SuppMat.docx.
Acknowledgment
This research was supported by the National R&D Program through the National Research Foundation of Korea(NRF) funded by the Korean government (MSIT) (RS‐2023‐00281195 and RS‐2024‐00355384) by the Korea Planning & Evaluation Institute of Industrial Technology(KEIT) (RS‐2024‐00417909) funded by the Ministry of Trade, Industry & Energy(MOTIE, Korea).
Contributor Information
Yong‐Young Noh, Email: yynoh@postech.ac.kr.
Jimin Kwon, Email: jmkwon@kaist.ac.kr.
Data Availability Statement
The data that support the findings of this study are available from the corresponding author upon reasonable request.
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Associated Data
This section collects any data citations, data availability statements, or supplementary materials included in this article.
Supplementary Materials
Supporting File: adma73882‐sup‐0001‐SuppMat.docx.
Data Availability Statement
The data that support the findings of this study are available from the corresponding author upon reasonable request.
