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. Author manuscript; available in PMC: 2010 Mar 1.
Published in final edited form as: Proc IEEE Inst Electr Electron Eng. 2009;97(3):513–552. doi: 10.1109/JPROC.2009.2013612

Review: Semiconductor Piezoresistance for Microsystems

A Alvin Barlian 1, Woo-Tae Park 1, Joseph R Mallon Jr 1, Ali J Rastegar 1, Beth L Pruitt 1
PMCID: PMC2829857  NIHMSID: NIHMS178656  PMID: 20198118

Abstract

Piezoresistive sensors are among the earliest micromachined silicon devices. The need for smaller, less expensive, higher performance sensors helped drive early micromachining technology, a precursor to microsystems or microelectromechanical systems (MEMS). The effect of stress on doped silicon and germanium has been known since the work of Smith at Bell Laboratories in 1954. Since then, researchers have extensively reported on microscale, piezoresistive strain gauges, pressure sensors, accelerometers, and cantilever force/displacement sensors, including many commercially successful devices. In this paper, we review the history of piezoresistance, its physics and related fabrication techniques. We also discuss electrical noise in piezoresistors, device examples and design considerations, and alternative materials. This paper provides a comprehensive overview of integrated piezoresistor technology with an introduction to the physics of piezoresistivity, process and material selection and design guidance useful to researchers and device engineers.

Keywords: MEMS, microfabrication, micromachining, micro-sensors, piezoresistance, piezoresistor, sensors

I. INTRODUCTION

Piezoresistive sensors are among the first Micro-Electro-Mechanical-Systems (MEMS) devices and comprise a substantial market share of MEMS sensors in the market today [1], [2]. Silicon piezoresistance has been widely used for various sensors including pressure sensors, accelerometers, cantilever force sensors, inertial sensors, and strain gauges. This paper reviews the background of semiconductor piezoresistor research (Section I), physics and limitations (Section II), applications and devices (Section III), and newer promising piezoresistive materials (Section IV).

A. History

William Thomson (Lord Kelvin) first reported on the change in resistance with elongation in iron and copper in 1856 [3]. Telegraph wire signal propagation changes and time-related conductivity changes, nuisances to telegraph companies, motivated further observations of conductivity under strain. In his classic Bakerian lecture to the Royal Society of London, Kelvin reported an elegant experiment where joined, parallel lengths of copper and iron wires were stretched with a weight and the difference in their resistance change was measured with a modified Wheatstone bridge. Kelvin determined that, since the elongation was the same for both wires, “the effect observed depends truly on variations in their conductivities.” Observation of these differences was remarkable, given the precision of available instrumentation.

Motivated by Lord Kelvin’s work, Tomlinson confirmed this strain-induced change in conductivity and made measurements of temperature and direction dependent elasticity and conductivity of metals under varied orientations of mechanical loads and electrical currents (Fig. 1) [4], [5].

Fig. 1.

Fig. 1

The alteration of specific resistance produced in different metals by hammering-induced strain. After Tomlinson, 1883 [5]. Reprinted with permission from the Royal Society Publishing.

The steady state displacement measurement techniques of Thomson and Tomlinson were replicated, refined, and applied to other polycrystalline and amorphous conductors by several researchers [6]–[9]. In 1930, Rolnick presented a dynamic technique to quantify the resistance change in vibrating wires of 15 different metals [10]. In 1932, Allen presented the first measurements of direction-dependent conductivity with strain in single crystals of bismuth, antimony, cadmium, zinc and tin [11]–[14]. Based on her work, Bridgman developed a tensor formulation for the general case of homogeneous mechanical stress on the electrical resistance of single crystals [6], [7].

In 1935, Cookson first applied the term piezoresistance to the change in conductivity with stress, as distinct from the total fractional change of resistance [15]. The term was most likely coined after piezoelectricity, the generation of charge with applied stress, a ferroelectric-mediated effect quite different from piezoresistivity. Hanke coined the term piezoelectricity in 1881 after ‘piezen’ from the Greek to press [16], [17]. The now standard notation for piezoresistivity was adapted from analogous work on piezoelectricity [18]. Voigt formalized tensor notation for stress and strain in crystals and formulated tensor expressions for generalized Hooke’s Law and piezoelectricity [19]. He adapted this notation from the works of Curie and Kelvin [18], [20]–[23].

In 1938, more than 80 years after the discovery of piezoresistance, Clark and Datwyler used a bonded wire to monitor strain in a stressed member [24]. In the same year, Arthur Ruge independently reinvented the bonded metallic strain gauge which had been first suggested by Edward Simmons, Jr. in 1936 [25]–[28].

In 1950, Bardeen and Shockley predicted relatively large conductivity changes with deformation in single crystal semiconductors [29]. In his seminal paper on semiconductor piezoresistance, C. S. Smith (a researcher who was visiting Bell Laboratories from Case Western Reserve University and who was interested in anisotropic electrical properties of materials), reported the first measurements of the ‘exceptionally large’ piezoresistive shear coefficient in silicon and germanium [30].

In 1957, Mason and Thurston first reported silicon strain gauges for measuring displacement, force, and torque [31]. Semiconductor strain gauges, with sensitivity more than fifty times higher than conventional metal strain gauges, were considered a leap forward in sensing technology. Early silicon strain gauges were fabricated by sawing and chemical etching to form a ‘bar’ shaped strain gauge [32]. The gage was then attached to a material surface with cement. This method allowed the development of the first bonded semiconductor pressure sensors. The first commercial piezoresistive silicon strain gauges and pressure sensors started to appear in the late 1950’s. Kulite Semiconductor, founded in 1958 to exploit piezoresistive technology, became the first licensee under the Bell piezoresistive patents [33]. By 1960 there were at least two commercial suppliers of bulk silicon strain gauges: Kulite-Bytrex and Microsystems [33]. Fig. 2 shows modern bar and U-shaped silicon strain gauges.

Fig. 2.

Fig. 2

Modern micromachined, precision-etched silicon gages with welded lead wires. (a) Bar shaped strain gauge with a length of 6 mm. (b) U-shaped strain gauge with a length of 1.2 mm. Courtesy of Herb Chelner, Micron Instruments, Simi Valley, CA.

Developments in the manufacture of semiconductors, especially Hoerni’s invention of the ‘planar’ transistor in 1959, resulted in improved methods of manufacturing piezoresistive sensors [34]. Silicon piezoresistive devices evolved from bonded single strain gauges to sensing devices with “integrated” (in the sense that the piezoresistive region was co-fabricated with the force collector) piezoresistive regions. In their classic 1961 paper, Pfann and Thurston proposed the integration of diffused piezoresistive elements with a silicon force collecting element [35]. The first such ‘integrated’ device, a diffused piezoresistive pressure sensing diaphragm was realized by Tufte et al. at Honeywell Research in 1962 [36].

Piezoresistive sensors were the first commercial devices requiring three-dimensional micromachining of silicon. Consequently, this technology was a singularly important precursor to the MEMS technology that emerged in the 1980’s. In 1982, Petersen’s seminal paper “Silicon as a Mechanical Material” reviewed several micromachined silicon transducers, including piezoresistive devices, and the fabrication processes and techniques used to create them [37]. Petersen’s paper helped drive the growth in innovation and design of micromachined silicon devices over the subsequent years.

The field benefited, to a degree that no other sensor technology has, from developments in silicon processing and modeling for the integrated circuits (IC) industry. Technological advances in the fabrication of ICs including doping, etching, and thin film deposition methods, have allowed significant improvements in piezoresistive device sensitivity, resolution, bandwidth, and miniaturization (Fig. 3). Reviews of advances in MEMS, microstructures, and microsystems are available elsewhere [38], [39].

Fig. 3.

Fig. 3

Technological advances in IC fabrication (above the horizontal line) and micromachining (below the horizontal line) [30], [33]–[37], [47], [79], [112], [122], [130], [149], [160], [191], [251], [254], [268], [284], [372]–[384].

II. PIEZORESISTANCE FUNDAMENTALS

The electrical resistance (R) of a homogeneous structure is a function of its dimensions and resistivity (ρ),

R=ρla, (1)

where l is length, and a is average cross-sectional area. The change in resistance due to applied stress is a function of geometry and resistivity changes. The cross-sectional area of a bulk material reduces in proportion to the longitudinal strain by its Poisson’s ratio, ν, which for most metals ranges from 0.20 to 0.35. For anisotropic silicon, the effective directional Poisson’s ratio ranges from 0.06 to 0.36 [40], [41]. The isotropic lower and upper limit for ν are −1.0 and 0.5 [42].

The gauge factor (GF) of a strain gauge is defined as

GF=ΔR/Rε (2)

where ε is strain and ΔR/R is fractional resistance change with strain. The change in resistance is due to both the geometric effects (1 + 2ν) and the fractional change in resistivity (Δρ/ρ) of the material with strain [10],

ΔRR=(1+2ν)ε+Δρρ. (3)

Geometric effects alone provide a GF of approximately 1.4 to 2.0, and the change in resistivity, Δρ/ρ, for a metal is small—on the order of 0.3. However, for silicon and germanium in certain directions, Δρ/ρ is 50–100 times larger than the geometric term. For a semiconductor, elasticity and piezoresistivity are direction-dependent under specified directions of loads (stress, strain) and fields (potentials, currents). This section first reviews notation and then discusses fundamentals of piezoresistivity in semiconductors. We also refer the reader to the comprehensive background on piezoelectricity in Nathan and Baltes [43].

A. Notation

1) Miller Indices and Crystal Structure

Crystals have periodic arrangements of atoms arranged in one of 14 lattice types and complete reviews are available elsewhere [44], [45]. The Miller indices specify crystal planes by n-tuples. A direction index [hkl] denotes a vector normal to a plane described by (hkl), and t represents a family of planes equivalent to (hkl) by symmetry. Angle-bracketed indices, like 〈hkl〉, represent all directions equivalent to [hkl] by symmetry. In a hexagonal crystal, as found in most silicon carbide polytypes, the Bravais-Miller index scheme is commonly adopted where four indices are used to represent the intercept-reciprocals corresponding to the four principal crystal axes (a1, a2, a3, and c). The axes a1, a2, and a3 are on the same plane and 120° apart from one another while c is perpendicular to the a-plane defined by the (a1, a2, a3) triplet.

Crystalline silicon forms a covalently bonded diamond-cubic structure with lattice constant a = 5.43 Å [Fig. 4(a)]. The diamond-cubic structure is equivalent to two interpenetrating face-centered-cubic (FCC) lattices with basis atoms offset by 1/4a in the three orthogonal directions [44]. Silicon’s diamond-cubic lattice is relatively sparse (34% packing density) compared to a regular face-centered-cubic (FCC) lattice (74% packing density). Commonly used wafer surface orientations in micromachining include (100), (111), and (110) [Fig. 4(b)]. Photolithography and etch techniques can create devices in various directions to access desirable material properties. For instance a 〈111〉 oriented piezo-resistor in a (110) plane will have the highest piezoresistive sensitivity in a pressure sensor [46]. More commonly 〈110〉 aligned piezoresistors on (100) wafers are used because of their high equal and opposite longitudinal and transverse piezoresistive coefficients. Directionality of silicon piezoresistive coefficients is discussed in Sections II-A3 and II-D1, and the selection of device orientation with directional dependence is discussed in more detail elsewhere [31], [35], [47], [48].

Fig. 4.

Fig. 4

(a) Covalently bonded diamond cubic structure of silicon. (b) Commonly employed crystal planes of silicon, i.e., (100), (110), and (111) planes. Silicon has four covalent bonds and coordinates itself tetrahedrally. The {111} planes, oriented 54.74° from {100} planes, are most densely packed. Mechanical and electrical properties vary greatly with direction, especially between the most dense {111} and the least dense {100} planes.

2) Stress, Strain, and Tensors

To define the state of stress for a unit element (Fig. 5), nine components, σij, must be specified, as in:

σ=σ11σ12σ13σ21σ22σ23σ31σ32σ33. (4)
Fig. 5.

Fig. 5

Nine components, σij, of stress on an infinitesimal unit element. For clarity, stresses on negative faces are not depicted.

The first index i denotes the direction of the applied stress, while j indicates the direction of the force or stress. If i = j, the stress is normal to the specified surface, while ij indicates a shear stress on face i (Fig. 5). From static equilibrium requirements that forces and moments sum to zero, a stress tensor is always symmetric, that is σij = σji, and thus the stress tensor contains only six independent components. Strain, εij, is also directional. For an isotropic, homogeneous material, stress is related to strain by Hooke’s Law, σ = εE [49].

Although “effective” values of Young’s modulus and Poisson’s ratio for a single direction are often employed for simple loading situations, a tensor is required to fully describe the stiffness of an anisotropic material such as silicon [37], [50], [51]. The stress and strain are related by the elastic stiffness matrix, C, where σij = Cijkl * εkl, or equivalently by the inverse compliance matrix, S, where εij = Sijkl * σkl:

[σ11σ22σ33σ23σ13σ12]=[c11c12c13c14c15c16c12c22c23c24c25c26c13c23c33c34c35c36c14c24c34c44c45c46c15c25c35c45c55c56c16c26c36c46c56c66][ε11ε22ε332ε232ε132ε12] (5)
[ε11ε22ε332ε232ε132ε12]=[s11s12s13s14s15s16s12s22s23s24s25s26s13s23s33s34s35s36s14s24s34s44s45s46s15s25s35s45s55s56s16s26s36s46s56s66][σ11σ22σ33σ23σ13σ12]. (6)

Collapsed notation reduces each pair of subscripts to one number: 11→1, 22→2, 33→3, 23→4, 13→5, 12→6, e.g., σ11 to σ1, ε12 to ε6, c1111 to c11 and s2323 to s44.

3) Piezoresistance

Single crystal germanium and silicon, both of which have a diamond lattice crystal structure, were the first materials widely used as piezoresistors. Smith reported the first measurements of large piezoresistive coefficients in these semiconductor crystals in 1954 noting that work by Bardeen and Shockley, and later Herring, could explain the phenomena [30]. Smith applied Bridgman’s tensor notation [8] in defining the piezoresistive coefficients and geometry of his test configurations (Fig. 6). The piezoresistive coefficients (π) require four subscripts because they relate two second-rank tensors of stress and resistivity. The first subscript refers to the electric field component (measured potential), the second to the current density (current), and the third and fourth to the stress (stress has two directional components). For conciseness, the subscripts of each tensor are also collapsed [31], e.g., π1111π11, π1122π12, π2323π44. Kanda later generalized these relations for a fixed voltage and current orientation (ω) as a function of stress (λ) [47]:

Δρωρ=λ=16πωλσλ. (7)
Fig. 6.

Fig. 6

Notation for Smith’s test configurations. Configurations A and C measured longitudinal piezoresistance, while configurations B and D provided transverse coefficients. Voltage drops between the electrodes (dotted lines) were measured while uniaxial tensile stress, σ, was applied to the test sample by hanging a weight. The experiments were done in constant-current mode in a light-tight enclosure with controlled temperature (25 ± 1 °C). After Smith [30]. © 1954 American Physical Society, http://www.prola.aps.org/abstract/PR/v94/i1/p42_1.

Smith determined these coefficients for relatively lightly doped silicon and germanium samples with resistivities ranging from 1.5–22.7 Ω-cm, e.g., 7.8 Ω-cm for p-type silicon [30]. Current commercial and research practice uses doping levels several orders of magnitude higher than Smith’s. Higher concentrations have somewhat lower piezoresistive coefficients, but much lower temperature coefficients of resistance and sensitivity. For example, in our laboratory, we regularly use doping levels that result in resistivities in the range of 0.005–0.2 Ω-cm [52]–[57]. Smith measured the piezoresistive coefficients for (100) samples along the 〈100〉 and 〈110〉 crystal directions. Longitudinal and transverse coefficients for the fundamental crystal axes were determined directly. Shear piezoresistive coefficients were inferred. By these measurements and considering the crystal symmetry, Smith fully characterized the piezoresistive tensor of 7.8 Ω-cm silicon as

[πωλ]=[π11π12π12000π12π22π12000π12π12π33000000π44000000π44000000π44]=[6.61.11.10001.16.61.10001.11.16.6000000138.1000000138.1000000138.1]×1011Pa1. (8)

In another early paper, Mason and Thurston utilized bonded gauges with the most favorable longitudinal orientations to measure displacement, force, and torque [31]. They derived directional coefficients from full formulations relating the electric field, current density, and stress components. They also presented more general formulations for longitudinal ( π11)and transverse ( π12) piezoresistive coefficients for a gauge in an arbitrary crystal direction,

π11=π112(π11π12π44)×(l12m12+l12n12+m12n12), (9)

and

π12=π12+2(π11π12π44)×(l12l22+m12m12+n12n22), (10)

where l, m, and n are the direction cosines of the direction associated with π11 or π12, with respect to the crystallo-graphic axes.

Pfann and Thurston [35] recognized the benefits of using transverse and shear piezoresistance effects in conjunction with longitudinal piezoresistance for devices. Many of their geometries employed a full Wheatstone bridge with two longitudinal and two transverse piezoresistors to increase sensitivity and compensate for resistance changes due to temperature (Sections II-D2 and III-E). Notably, they proposed integrating the piezoresistors with the force collecting structure and discussed the advantages and disadvantages of a number of geometries for various types of measurements. They anticipated most of the geometries widely employed today.

Stress sensitivity in silicon also can be exploited by the pseudo-Hall effect and the piezojunction effect. The pseudo-Hall effect is based on the shear piezoresistive effect, whereby the induced shear stress distorts the potential distribution in a piezoresistive plane. Motorola Semiconductor (now Freescale Semiconductor) used this configuration in a pressure sensor in the 1970s [58] and has continued producing this type of pressure sensor. Doelle et al. and Gieschke et al. reported geometry-based design rules and novel applications for the pseudo-Hall effect piezoresistive plates [59]–[61]. The piezojunction effect is defined as the change in the saturation current of a bipolar transistor or a p-n junction due to mechanical stress [62]. Metal-oxide-semiconductor field effect transistors (MOSFETs) using the piezojunction effect have been demonstrated for small cantilever strain sensing [63]–[65]. The main advantage over conventional piezoresistors lies in reduced power consumption but this trades off with size and circuit complexity [66]. The piezojunction effect is also important to understanding sources of unwanted offset in integrated circuits and sensors [67]–[70].

B. Piezoresistive Theory

The discovery of such large piezoresistive effects demanded a theory of the underlying physics. This section discusses the prevailing theories at the time of Smith’s measurements as well as more recent advances. The theories of semiconductor piezoresistance are grounded in one-dimensional descriptions of electron and hole transport in crystalline structures under strain (potentially extended to three dimensions and to include crystal defects, electric potentials, and temperature effects). The various models require some framework of bandgap energy models, wave mechanics, and quantum effects; the interested reader is referred to [44], [71]–[73] and the references of this section for more information.

At the time of Smith’s piezoresistance measurements, existing theories were based on shifts in bandgap energies. The band structure of diamond (Fig. 7) was first calculated by Kimball in 1935 [74], and that of silicon by Mullaney in 1944 [75]. In 1950, Bardeen and Shockley presented a model for mobility changes in semiconductors subjected to deformation potentials and compared both predicted and measured conductivity changes in the bandgap with dilation [29]. This work served as the basis for later analyses, such as that of Herring [76], [77] and Long [78].

Fig. 7.

Fig. 7

Energy bands split in diamond and are a function of strain or atomic spacing, R (Atomic Units). Besides the four shaded bands, there are four bands of zero width, i.e. two following curve IV and two following curve VI. After Kimball [74]. © 1935 American Institute of Physics.

The mobilities and effective masses of the carriers are significantly different from one another and fluctuate under strain. N- and p-type piezoresistors exhibit opposite trends in resistance change and different direction-dependent magnitudes under stress. The magnitudes and signs of the piezoresistive coefficients depend on a number of factors including impurity concentration, temperature, crystallographic direction, as well as the relation of voltage, current and stress to one another and to the crystallographic axes. The relationship between carrier characteristics and strain has been investigated both experimentally [30], [31], [79] and analytically [29], [35], [47], [77], [80], [81]. Focusing on n-type silicon, these early studies utilized either effective mass or energy band calculations with wave propagation in one direction at a time. The change in mobility (and thus, conductivity) with lattice strain is attributed to band warping or bending and the non-uniform density of states.

The implications for the related large mobility and resistance changes were not realized prior to Smith’s discovery [82], [83]. Following Bardeen and Shockley’s models for mobility changes with deformation potentials, more refined models of transport and energy band structure based on new experimental work became available. In 1955, Herring proposed his Many-Valley model, which adequately explained piezoresistance for n-type silicon and germanium [29], [35], [77], [80], [81], [84]–[87].

Herring’s Many-Valley model for n-type silicon proposes three symmetrical valleys along the 〈100〉 direction [77]. His model projects the band energy minima in three orthogonal directions (x, y, z) as locations of constant minimum energy (Fig. 8). The minimum energy of each valley lies along the centerline of the constant energy ellipsoid of revolution. Electrons have a higher mobility along the direction perpendicular to the long axis of the ellipsoid. Since electrons occupy lower energy states first, they are found in these regions bounded by ellipsoids of constant low-energy. These ellipsoids, bounded by higher-energy regions, are referred to as valleys. With strain however, the symmetry is broken and the ellipsoids are asymmetrically dilated or constricted. This results in an anisotropic change in conductivity proportional to strain.

Fig. 8.

Fig. 8

(a, b) Test configuration and resulting schematic diagrams of probable constant energy surfaces in momentum space for n-type Si with potential, E, and strain, e, as depicted. The electrons are located in six energy valleys at the centers of the constant energy ellipses, which are shown greatly enlarged. The effect of stress on the two valley energies shown is indicated by the dotted ellipsoids. The mobilities, μ, of the several groups of charge carriers in various directions are roughly indicated by the arrows. The test configurations correspond to Smith’s experimental arrangements A and C (Fig. 6). After Smith [30]. © 1954 American Physical Society. (c) The changes in silicon energy minima with dilation in a plane normal to a (001) axis. Four minima vary as shown by the solid line, and two on the axis normal to the plane follow the dashed line. After Keyes [87], © 2002 IEEE.

Most models represent the direction dependence of bandgap and electron energies by either directional waves (k has direction and magnitude) or momentum (p) and the effective masses of the carriers. The energy surfaces for electron mobility are accordingly represented in k-space or momentum space. The wave propagation is confined to quantum states by the periodicity of the lattice, and edges in the band diagrams correspond to the edges of the Brillouin zone (smallest primitive cell, or unit cell, of the reciprocal lattice) oriented in a direction of interest [44].

In the unstrained silicon crystal, the lowest conduction band energies (valleys) or highest mobility orientations are aligned with the 〈100〉 directions. The conduction electrons are thus imagined to be lying in six equal groups or valleys, aligned with three 〈100〉 directions. For any valley, the mobility is the lowest when parallel to the valley direction, and the highest when perpendicular to the valley, e.g., an electron in the z valley has higher mobility in the x and y directions. Net electron conductivity is the sum of the conductivity components along the three valley orientations and is independent of direction. Net mobility is the average mobility along the three valleys (two high and one low) [87]. Uniaxial elongation increases the band energy of the valley parallel to the strain and transfers electrons to perpendicular valleys, which also have high mobility along the direction of strain. Electrons favor transport in directions of higher mobility (higher conductivity and lower resistance) in the direction of strain, and tension removes electrons from the valley in that direction and transfers them to valleys normal to the tension. In n-type silicon, average mobility is increased in the direction of tension (longitudinal effect) and lowered transverse to that direction (transverse effect). Compression has the opposite effect. Lin later provided an explanation of large mobility degradation at higher transverse electric fields and lower temperatures based on the physics of electron population and scattering mechanisms of quantized subbands at (100) Si surfaces [88].

The piezoresistance theory for n-type semiconductors continued to be refined from 1954 onward, but until recently “piezoresistive effects in p-type silicon have not been fully clarified due to the complexity of the valence band structure” [89]. In 1993, Ohmura stated that “the [piezoresistance] effect for n-type Ge and Si has been successfully accounted for…” while “the [piezoresistance] effect for p-type Si and Ge has not been fully understood…” [90]. However, recent computational advances have enabled an improved understanding of p-type piezoresistance [73], [91]–[93]. This is important because most research and commercial piezoresistive devices are p-type and models of this successful technology had been largely based on empirical results. Theoretical studies based on the strain Hamiltonian [94]–[96] and on deformation potentials in strained silicon as well as cyclotron resonance experimental results have revealed several factors that affect hole mobilities in semiconductors, e.g., band warping and splitting, mass change, etc. [97]–[101].

Historically, piezoresistive technology drew from mainstream IC research and continues to do so. Now, with the strong interest in “strain engineering” to increase transport speed in ICs, the situation has reversed and mainstream semiconductor technology is drawing on findings of piezoresistive research. Strain engineered materials (e.g., inclusion of germanium into a silicon layer) can increase the mobility of a channel in MOS (metal-oxide-semiconductor) devices [73], [102]–[104]. Suthram et al. [104] applied large uniaxial stress on n-type MOS field-effect transistors (MOSFETs) and showed that piezoresistive coefficients were constant while the electron mobility enhancement increased linearly for stresses up to ~1.5 GPa. Fig. 9 shows plotted hole mobility enhancement factor for several semiconductors as a function of stress.

Fig. 9.

Fig. 9

Hole mobility enhancement in semiconductors, taking into account surface roughness scattering, as a function of stress (~GPa). Sun et al. compared their experimental results with those of several groups [385]–[387] and noted that “the hole mobilities of Ge and GaAs increase steadily with stress up to 4 GPa, while the hole mobility of Si saturates at about 2 GPa. For the technologically important stresses of 1–2 GPa, Ge shows similar enhancement as Si. However the unstressed hole mobility of Ge is ~3× higher than Si.” Reprinted with permission from Sun [73], © 2007 American Institute of Physics.

C. Piezoresistor Fabrication

Several design and process parameters such as energy, dose and doping method as well as anneal parameters such as temperature, time and environment affect piezoresistor sensitivity and noise. We review the commonly used fabrication methods for forming piezoresistors on semiconductor substrates and discuss their advantages and drawbacks. Diffusion, ion implantation, and epitaxy are the most common impurity-doping techniques for introducing dopants into a silicon substrate. These techniques result in different doping profiles (Fig. 10). A complete review of doping techniques is available elsewhere [105].

Fig. 10.

Fig. 10

(a) Microfabricated piezoresistive cantilever [57]. (b) TSUPREM4 [388] simulation plots of doping profiles using ion implantation vs. epitaxial deposition techniques. Note the difference in the dopant profiles following ion-implantation and epitaxy and the progression of dopant diffusion with increasing time of thermal annealing. Courtesy of Sung-Jin Park, Stanford University.

1) Diffusion

Diffusion is the migration of dopant atoms from a region of high concentration to a region of low concentration. The fabrication of piezoresistors using diffusion involves a pre-deposition and a drive-in step. During the pre-deposition step, wafers may be placed in a high-temperature furnace (900–1300 °C) with a gas-phase or a solid-phase dopant source [105], [106]. The gas-phase dopant source, e.g., diborane (B2H6), phosphine (PH3), or arsine (AsH3), is carried in an inert gas, e.g., N2 or Ar. The solid-phase dopant source (a compound containing dopant atoms in a form of solid discs) is placed such that the active surface is facing the surface of the silicon wafer inside the furnace. Both the source and the wafer are heated, causing transport of dopants from the source to the wafer. Alternately, dopant pre-deposition may utilize doped spin-on glass layers [107]–[109]. During pre-deposition, the boundary condition is a constant surface concentration and the doping profile is approximated by a complementary error function. The source can be removed and dopants “driven-in” deeper with high temperature annealing (900–1300 °C). Gas-phase dopant sources provide inconsistent doses for surface concentrations below the solid solubility level.

2) Ion Implantation

Ion implantation was researched extensively in the 1950s and 1960s as an alternate pre-deposition method to provide better control of the dopant dose [105], [110]–[121]. Ion implantation gained wide use in the 1980s and remains the preferred method today. In ion implantation, dopant ions are accelerated at high energy (keV to MeV) into the substrate. The ions leave a cascade of damage in the crystal structure of the implanted substrate [118]. Any layer thick or dense enough to block the implanted ions, such as photoresist, silicon oxide, silicon nitride, or metal, can be used for masking. Typical silicon piezoresistor doses range from (1 × 1014 to 5 × 1016 cm−2, with energy ranges from 30 to 150 keV [51]. Dopant distribution is approximated by a symmetric Gaussian distribution (Fig. 10). Most implants are done with a 7° tilt of (100) silicon wafers to avoid ion channeling, a phenomenon where ions deeply traverse gaps in the lattice without scattering. Larger implant angles (7°–45°) are sometimes used to form piezoresistors on etched sidewalls of deep-reactive-ion-etched (DRIE) trenches as found in flexures or beams in dual-axis cantilevers, in-plane accelerometers, and shear stress sensors [53], [122]–[125]. One major disadvantage of ion implantation is significant damage to the crystal. Lattice order is mostly restored by high-temperature dopant activation and annealing [118]. However, shallow junctions are difficult to obtain with high crystal quality. Parameters that affect the junction depth include the acceleration energy, the ion mass, and the stopping power of the material [115].

3) Epitaxy

Epitaxy is the growth of atomic layers on single-crystal materials that conform to the crystal-structure arrangement on the surface of the crystalline substrate [105]. Chemical Vapor Deposition (CVD) technique can be used to deposit epitaxial silicon by decomposing silane (SiH4) or by reacting silicon chloride (SiCl4) with hydrogen. Conventional epitaxial growth is done at high temperatures (1000–1250 °C) and reduced pressure (30–200 torr). A clean surface is necessary to obtain a high quality epitaxial layer. Contaminants and native oxide will prevent single-crystal growth. An in situ HCl clean can remove wafer contaminants and native oxide. Halide source gases, such as SiCl4, SiHCl3, or SiH2Cl2 (DCS), are used to grow silicon with the advantage that chlorine is one of the net byproducts. The chlorine removes metal contaminants from the deposited silicon film, resulting in better quality single-crystal silicon. Selective deposition of epitaxial silicon, i.e., the silicon deposits only on exposed regions of silicon, but not on other dielectric films such as SiO2 or Si3N4, can be achieved by tailoring the deposition conditions [55], [105], [126]–[129]. Epitaxial silicon films may be doped during the deposition by introducing appropriate dopant source gases such as AsH3, PH3, or B2H6 into the chamber along with the silicon source gases.

Epitaxial piezoresistors require no annealing and have a uniform dopant profile (Fig. 10). Epitaxy has enabled ultra thin piezoresistive layers and increased force sensitivity [130]. Harley and Kenny [131] and Liang et al. [132] demonstrated the use of epitaxially grown doped silicon to form piezoresistors in ultra-thin cantilevers (less than 100 nm). This is a practical method for such thin piezoresistive cantilevers, especially given the difficulties of implanting shallow junction depths (less than 50 nm), activating dopant atoms, and restoring lattice quality. Joyce and Baldrey [126] first demonstrated selective deposition of silicon epitaxial layers using oxide-masking techniques in 1962 and Zhang et al. [133] demonstrated an HCl-free selective deposition technique. We have also demonstrated epitaxial piezoresistors on the sidewalls of microstructures for in-plane sensing applications using selective deposition techniques [55]. These epitaxial sidewall piezoresistive sensors showed increased sensitivity over oblique-angle ion-implanted piezoresistors of the same dose.

4) Doped Polysilicon

Polycrystalline silicon (polysilicon or “poly”) may be doped by diffusion, ion implantation, or in situ doping. Polysilicon in situ doping introduces gas-phase dopants with the precursor polysilicon gases during chemical vapor deposition. However, introduction of dopant gases results in non-uniform polysilicon layer thickness across the wafer, a lower deposition rate, and dopant nonuniformity [105]. Moreover, adding dopants during the deposition of the polysilicon layer also affects layer properties and changes grain size, grain orientation, and intrinsic stress. The deposition temperature, anneal time and anneal temperature determine the surface roughness, grain size, grain orientation, and intrinsic stress of the resulting polysilicon layer.

Piezoresistive effects in polysilicon were studied extensively in the 1970s and 1980s [134]–[146]. French and Evans presented a theoretical model for piezoresistance in polysilicon as a function of doping, grain size, and orientation and proposed an optimum set of processing parameters for a given grain size [145].

5) Tradeoffs in Process Selection

Ion implantation is the most common method of fabricating piezoresistors. Advantages of ion implantation include precise control of dopant concentration and depth. Disadvantages include lattice damage and annealing requirements for dopant activation. Diffusion has the advantage of batch processing, but suffers from poor dopant depth and concentration control. Epitaxy provides excellent depth control without annealing, which enables shallow junctions with abrupt dopant profiles. However, processing complexity and equipment costs and availability are drawbacks to epitaxy. Table 1 compares ion-implantation, diffusion, and epitaxy techniques.

Table 1.

Comparisons of Doping Methods (After Plummer et al. [105])

Ion implantation Diffusion Epitaxy
Process condition room temperature, vacuum, batch process high temperature, batch process high temperature, low pressure, single wafer
Damage significant, requires annealing, enhances diffusion none none
Doping concentration control excellent acceptable good
Dopant depth control good not good very good
Typical range of doses or concentration 1×1011 to 1×1016 cm−2 concentration is limited to solid solubility 1×l014 to 1×1017 cm−2
Masking photoresist or hard mask (silicon oxide, silicon nitride, metal, etc.) hard mask oxide mask and selective deposition (more difficult) or etchback

D. Design and Process Effects on Piezoresistor Performance

Design and process parameters affect piezoresistor sensitivity and noise. Sensitivity is a strong function of dopant concentration and piezoresistor orientation. In choosing the device geometry, doping, and anneal conditions, the piezoresistive device designer must also consider the temperature coefficients of sensitivity and resistance, nonlinearity with strain and temperature, and noise and resolution limits.

1) Device Doping and Orientation

Initial experiments by Smith used bars of silicon cut from wafers doped while growing the single-crystal ingot [30]. Later, Pfann and Thurston [35] suggested diffusion techniques to integrate doped piezoresistors on the sensor surface. The piezoresistive properties of diffused layers were subsequently investigated by Tufte and Stelzer [79]. They also provided empirical data on piezoresistive coefficients for different surface concentrations and resistivities. Kurtz and Gravel replotted their data and noted that the piezoresistive coefficients decrease approximately with the log of surface concentration [147].

The early analyses by Smith, and Pfann and Thurston, covered virtually all crystal orientations and piezoresistor designs for n-type and p-type piezoresistors in use today. Kanda [47] extended these analyses with graphical representations of the piezoresistive coefficients in arbitrary directions in the commonly used (100) crystal plane and the less common (110), and (211) planes. These graphs provide a useful picture of how piezoresistive coefficients vary with respect to crystal orientations for both longitudinal and transverse geometries (Fig. 11). Kanda also presented theoretical calculations of piezoresistive change versus dopant concentration. He suggested a simple power law dependence of the relaxation time with temperature and noted a discrepancy between his calculations and the experimental data for high doping concentrations (Fig. 12). In his notation, the piezoresistive coefficient is calculated by multiplying the piezoresistive factor, P(N, T) (Fig. 13), by the room temperature piezoresistive coefficient. The calculated values of the P(N, T), agree well with the experimental values obtained by Mason [148] for doping concentrations less than 1 × 1017 cm−3, over the temperature range of −50 to 150 °C, but differ by 21% at a concentration of 3 × 1019 cm−3 at room temperature. The error was attributed to dopant ions scattering for high dopant concentrations, whereas the calculation only considered lattice scattering. Harley [149] later evaluated data from several researchers and provided an empirical fit of piezoresistance vs. concentration that better estimates the sensitivity for higher concentration devices. Our devices typically fall in a regime described by extension of Harley’s fit [55]–[57], [150].

Fig. 11.

Fig. 11

Room temperature piezoresistive coefficients in the (100) plane of (a) p-type silicon (b) n-type silicon. These graphics predict piezoresistive coefficients very well for low doses. After Kanda [47], © 1982 IEEE.

Fig. 12.

Fig. 12

Piezoresistive coefficients as a function of doping. Experimental data obtained by Kerr, Tufte, and Mason are fitted by Harley and Kenny [79], [148], [149], [157]. Theoretical prediction by Kanda overestimates the piezoresistive coefficients at higher concentrations. After Harley and Kenny [149], © 2000 IEEE.

Fig. 13.

Fig. 13

The adjusted piezoresistance factor P(N,T) as a function of impurity concentration and temperature for (a) p-type silicon (b) n-type silicon. These graphics predict piezoresistive coefficients very well for low doses but the trends with temperature are correct. After Kanda [47], © 1982 IEEE.

Four-point bending is used to measure piezoresistive effects in semiconductors [151], [152], though care must be taken in high-stress test conditions [104]. Richter et al. [48], [153], [154] demonstrated a novel piezocoefficient-mapping device to measure 3D stresses in device packaging and also to extract directional piezoresistive coefficients (Fig. 14). Using orthogonal 〈100〉 piezoresistors and 4-point bending strain along the 〈110〉 direction, they measured piezoresistance coefficients for silicon and strained silicon (Si0.9Ge0.1) molecular beam epitaxial (MBE) grown layers at boron doping levels of 1 × 1018 and 1 × 1019 cm−3; they extracted piezoresistive coefficients as a function of doping and direction. Their results are higher than Smith’s lower dose values and also showed that lattice strain raises the value of π44.

Fig. 14.

Fig. 14

(a) Stress sensor chip with a p-type circular piezoresistors in the middle of the chip. (b) Schematic diagram of the circular piezoresistor with a radius of 1700 μm. From Richter et al. [154], © 2007 IEEE.

2) Temperature Coefficients of Sensitivity and Resistance

Piezoresistors are sensitive to temperature variation, which changes the mobility and number of carriers, resulting in a change in conductivity (or resistivity) and piezoresistive coefficients (sensitivity) [155]. Consequently, doped silicon can be used for accurate temperature sensing as in resistance temperature detectors (RTDs). A typical commercial piezoresistive pressure sensor has a thermal resistance change ten times the full-scale stressed resistance change over a temperature range of 55 °C. Kurtz [156] presented data and discussed the trend of the piezoresistive coefficient (π), temperature coefficient of piezoresistive coefficient (TCS), resistivity (ρ), temperature coefficient of resistivity (TCR) and strain nonlinearity, as a function of dopant concentration (Fig. 15).

Fig. 15.

Fig. 15

Trends of key piezoresistive properties with concentrations, such as (a) longitudinal piezoresistive coefficient (sensitivity) (b) temperature coefficient of sensitivity (c) temperature coefficient of resistivity with dopant concentration. After Kurtz and Gravel [147]. © 1967 Industrial Automation Standards.

Kurtz was the first to clearly highlight the advantages of using higher doping levels for piezoresistors. The temperature dependence of sensitivity decreases with increasing surface concentration. This trend is desirable except that increasing surface concentration also sacrifices the sensitivity of the piezoresistors. However, the temperature coefficient of sensitivity drops off faster than sensitivity. Also at higher doping levels, the strain and temperature nonlinearities in sensitivity, and temperature change of resistance are very much reduced. Some piezoresistive pressure sensor manufacturers, such as Kulite Semiconductor Products, Merit Sensors, and GE NovaSensor manufacture high-dose piezoresistors, taking advantage of this reduced temperature sensitivity. Ultimately some temperature dependence in silicon strain sensors is inevitable though this dependence may be compensated by the use of a half or full-active Wheatstone bridge and conditioning circuitry (Section III-E).

Tufte and Stelzer [79] first presented detailed measurements of these parameters for diffused layers over a wide range of dopant concentrations (1018 – 1021 atoms cm−3) and temperatures (−90 °C to 100 °C). They also showed that the piezoresistive coefficient was relatively insensitive to the diffusion depth for a diffused layer. Kerr and Milnes [157] showed that the surface dopant concentration could be used as an adequate proxy for the average effective concentration in modeling the piezoresistivity of diffused layers. More recently, refined concentration-dependent temperature sensitivity measurements have been reported on integrated die using 4-point bending and finite element analysis of stress profiles [158].

3) Nonlinearity

The response of piezoresistors to stress is nonlinear at larger strain (> 0.1%). Understanding and compensating for the nonlinearity of piezoresistors is important for precision piezoresistive devices. Matsuda et al. [159], [160] calculated and measured the piezoresistive coefficients and third-order effects for both p-type and n-type silicon for the three major crystallographic orientations with strain up to 0.1%. Higher strain levels were difficult to measure since surface defects in the silicon lattice cause fracture at low strain levels. Addressing this problem, Chen and MacDonald [161] co-fabricated a microactuator and a 150-μm-long, 150-nm-diameter single-crystal silicon fiber from one single-crystal silicon substrate to reduce the possibility of defects, allowing measurements of strains greater than 1%. With the increased range of strain, the second and third order fit for piezoresistive coefficients were quantified more accurately (Fig. 16). Table 2 shows the results obtained by Chen and MacDonald compared to the data obtained by Tufte and Stelzer [162]. Additional studies of the effects of strain on semiconductor properties have been undertaken recently as interest in strained substrates has increased [48], [73], [104], [163].

Fig. 16.

Fig. 16

(a) SEM image of micro-actuator and 150-μm-long, 150-nm-diameter, phosphorous-doped, 〈110〉 silicon fiber (test sample) with resistivity of 0.6 mΩcm. (b) Percentage change longitudinal piezoresistance vs. strain exhibited less nonlinearity at low strain than previous reports at lower doping (Data of Matsuda et al. [161] were included by converting stress data using Young’s modulus of 170 GPa). Reprinted with permission from Chen and MacDonald [161], © 2004 American Institute of Physics.

Table 2.

Piezoresistive Coefficients Using Data From 0% to 1% Strain. From Chen and MacDonald [161], Reprinted With Permission From American Institute of Physics

[110] longitudinal piezoresistive coefficients Piezoresistance of n-type silicon fiber with doping level of 2×1020 cm−3 Tufte and Stelzer [163] n-type silicon with doping level of 2×1020 cm−3
First-order π1(10−4MPa−1) −1.86 ± 0.01 −1.9
Second-order π2(10−7MPa−2) 0.12 ± 0.01 N/A
Third-order π3(10−10MPa−3) 0.100 ± 0.003 N/A

E. Noise in Piezoresistors

Electrical noise is the random variation in the potential of a conductor. The electrical noise in a piezoresistor sets the fundamental lower limit of piezoresistive transducer resolution. The dominant random electrical noise sources in piezoresistors are Johnson (thermal) noise and 1/f (flicker) noise. Other noise sources, such as inductive or capacitive line pickup also exist [51]. Also, for many applications the accuracy of piezoresistive transducers is limited by temperature effects or thermo-mechanical hysteresis, e.g., in commercial piezoresistive devices such as piezoresistive pressure sensors. Integrated shield layers have been shown to reduce noise effects, including temperature sensitivity [164].

1) Thermal Noise

Thermal noise, also known as Johnson or Johnson-Nyquist noise, is universal to resistors. It was first observed in 1928 by Johnson [164] and theoretically explained by Nyquist [165]. Thermal noise is a function of the absolute temperature T(K) of the resistor, resistance value R(Ω), and Boltzmann’s constant k (J/K). For a 1 Hz bandwidth the thermal noise is:

Vj=4kTR. (11)

Thermal noise is fundamental, exists in all resistors, and cannot be eliminated. A discussion on thermal noise in modern devices can be found elsewhere [166].

2) 1/f Noise

The power spectral density of 1/f noise, as its name implies, is inversely proportional to frequency. The origins of 1/f noise are still not fully understood and remain an active topic of research [167]–[178]. In particular, 1/f noise in piezoresistors is dependent on fabrication process parameters, such as implant dose and energy, and anneal parameters. A 1/fn noise exponent of n >1 can be a measure of conductor reliability. Excessive 1/f noise can indicate poor fabrication process quality [179], [180]. Several researchers have presented piezoresistive device optimization to include 1/f noise [149], [181]–[183].

Despite many decades of research, the source of 1/f noise is still debated [176]. McWhorter and Hooge proposed two opposing theories of 1/f noise. These views are currently the leading explanations for the origin of 1/f noise. The McWhorter model attributes the 1/f noise to surface factors [184], [185], while the Hooge model implicates bulk defects [167], [177] (Fig. 17).

Fig. 17.

Fig. 17

Conductivity fluctuations based on (a) Hooge model (bulk effect) (b) McWhorter model (surface effect). Courtesy of Paul Lim, Stanford University.

Experiments show that 1/f noise is due to conductivity fluctuations in the resistor [177], [178]. Hooge showed that the 1/f low-frequency noise modulated the thermal noise even with no current flowing through the resistor [172]. This experiment demonstrates that 1/f noise is not current-generated. Current is only needed to transform the conductivity fluctuations into voltage fluctuations. Thermal and 1/f noise are fundamentally different. Thermal noise is a voltage noise; therefore it does not depend on the amount of current in the resistor. In contrast, 1/f noise is a conductivity noise; therefore the voltage noise is proportional to the current in the resistor.

Hooge’s empirical 1/f noise model, fit to observed data, predicts that the voltage noise density is given by:

V1/f=VbαNf (12)

where f, N, and Vb, are frequency, total number of carriers in the resistor volume, and bias voltage across the resistor, respectively. A non-dimensional fitting parameter, α, is ascribed to the “quality of the lattice” and typically ranges from 10−3 down to 10−7 [56], [149], [183].

Attempts to observe the lower limit of 1/f, below which the spectrum theoretically flattens, have not been successful [177]. Measurements down to 3 μHz (or approximately 4 days per cycle) show a noise spectrum that is still 1/f [186]. Harley and Kenny showed that resistors with different surface to volume ratios have the same 1/f noise characteristics, and 1/f noise scales with the resistor volume, consistent with Hooge’s empirical equation [149].

Hooge defines 1/f noise as only those spectra with a frequency exponent of 0.9–1.1. Noise with a different power spectral density and other frequency exponents, sometimes referred to as 1/f-like noise, is often confused with 1/f noise and is not predicted by the Hooge equation. According to Hooge, noise with a higher exponent, e.g., 1.5 or 2, indicates noise mechanisms other than mobility fluctuations that should not be considered 1/f noise and are not predicted by (12). Abnormal 1/f noise characterization can give insights into piezoresistor reliability and failure analyses. For example, Neri [187] found that the 1/f exponent is closer to 2 in metal traces that exhibit electromigration. Vandamme [188] showed that excess 1/f noise in semiconductors can be attributed to small constrictions and current crowding. Devices with constriction resistance show third harmonics and nonlinearities in their output.

Current crowding theory also explains why polysilicon has higher 1/f noise than its crystalline counterpart [168]. At grain boundaries, small constrictions are present, thus reducing the total number of carriers (N) and effectively increasing the 1/f noise. Basically, 1/f voltage noise does increase linearly with the applied excitation. If the noise spectrum trends otherwise, then other mechanisms, such as current crowding, could be present. The noise floor of the experimental setup may be verified by reducing the applied excitation and observing only the thermal noise of the piezoresistor.

Reducing 1/f noise is important for low frequency applications. Chemical and bio-sensing applications based on displacement transduction require static and low frequency measurements and require stability over time periods of tens of seconds to many hours. Lower 1/f-noise piezoresistors are required for these applications. The fabrication process parameters can be tailored to achieve low 1/f noise amplitude spectral densities. As suggested by Kanda’s model, low impurity doping is often used to achieve high sensitivity. However, this model underestimates sensitivity at high and low doping and leads to a device design that poorly trades-off sensitivity with noise for lower frequency applications. The empirical data of Tufte and Seltzer [79], on the other hand, offer better guidance in these regimes. The advantages of high doping are lower noise and lower temperature coefficients for modest reduction of sensitivity. For example, if peak doping concentration, Cpeak, decreases from 1019 cm−3 to 1017 cm−3, the sensitivity increases by only 65% while the noise increases by a factor of ten. From (12), the 1/f noise can be reduced by increasing N, the total number of carriers dependent on piezoresistor volume and impurity implant dose, and reducing α. Vandamme [179], [189] showed that α depends on crystal lattice perfection and lattice quality increases with higher temperature anneals and longer anneal times. Mallon et al. [56] extended the work of Harley and Kenny [56], [149] and showed that long, high temperature anneals can produce lower noise piezoresistors with low values of α (Fig. 18).

Fig. 18.

Fig. 18

Hooge noise parameter, α, improves (decreases) with increasing anneal diffusion length, √Dt. Reprinted with permission from Mallon et al. [56]. © 2008 American Institute of Physics.

Fig. 19 shows the typical 1/f noise of a piezoresistor. The horizontal straight line is the thermal noise of the resistor. For reference, a 1 kΩ resistor has 4 nV/√Hz thermal noise; other resistor values are easily referenced to this value. The thermal noise of a resistor is also an excellent source to calibrate and verify the measurement system [190]. The straight, sloped line is the 1/f noise of the resistor, which depends on the applied bias voltage. If the resistor is unbiased, the 1/f noise disappears, while the thermal noise remains. The 1/f noise is proportional to applied bias voltage with proportionality constant α/Nf. The total noise is the sum of thermal and 1/f noise. Since the noise sources are uncorrelated they are additive as,

Fig. 19.

Fig. 19

Typical noise curve of a full-bridged piezoresistor. The sloped solid line is the total noise dominated by 1/f-noise component, while the horizontal solid line is the total noise dominated by thermal-noise component. The 1/f noise corner frequency is the frequency at which the thermal noise is equal to the 1/f noise. In this noise spectrum, the corner frequency is ~1 Hz. The horizontal dashed line is the measurement system noise level, which is verified with a 680 Ω resistor from 0.01 Hz. For clarity, system noise is not shown above 1 Hz. The noise is measured using modulation-demodulation technique (Section III-E). The roll-off above 60 Hz is due to system bandwidth. Reprinted with permission from Mallon et al. [56]. © 2008 American Institute of Physics.

VTotalNoise=Vthermal2+V1/f2. (13)

III. DEVICES AND APPLICATIONS

Piezoresistors are widely used in pressure, force and inertial sensors. An external force creates a deflection or stretch in the structure proportional to the measurand, and piezoresistance varies proportional to the applied stress. When used in a Wheatstone bridge or other conditioning circuit, the change in resistance is converted to change in voltage output. In this section, we review some of the most commonly used devices that employ piezoresistive transduction schemes in microsystems as well as common signal conditioning approaches. For brevity we focus on seminal and representative examples of the art.

A. Cantilever Sensors

Cantilevers are beams with one free and one fixed end (Fig. 20). A piezoresistive cantilever force sensor normally has a piezoresistor at the root of the beam, near the top surface to maximize sensitivity. From beam mechanics, the maximum stress (σ) occurs at the outer surface of the root (y = ±h/2, x = 0), when an external force (F) is applied at the end of a cantilever (x = L):

σ=12F(xL)ybh3 (14)

where x is the distance along the length of the cantilever measured from the root, y is the distance along the thickness of the cantilever measured from the neutral axis, b is the width, and h is the thickness of the cantilever.

Fig. 20.

Fig. 20

A cantilever with applied force at the tip and the resulting stress profile in the beam. The maximum stress occurs at outer surface of the root (y = ±h/2, x = 0).

The change in resistance is a function of the stress in the piezoresistor. The cantilever is a ubiquitous structure in the field of micromachined transducers. Cantilevers are relatively simple and inexpensive to fabricate, and analytical solutions of displacement profiles and stress distributions under load are well developed [49]. Cantilever beams are commonly used as force and displacement sensors as well as mass sensors when excited in resonance. Various schemes can transduce the force applied to the cantilever by measuring the stress (piezoresistive) or displacement (optical, capacitive) at any location on the cantilever.

The earliest work on integrated silicon piezoresistive cantilevers started in the late 1960s, when Wilfinger [191] used a silicon cantilever with diffused piezoresistive elements as a ‘resonistor’ (resonator). The silicon cantilever was mechanically deflected by electrically induced thermal expansion. The piezoresistors were used to detect the maximum stress at the resonant frequency. Fulkerson [192] integrated a bridge and an amplifier circuit in a microfabricated piezoresistive cantilever sensor to linearize and amplify the output, pioneering the concept of signal conditioning integration. Numerous resonant, piezoresistive cantilever devices have been implemented for mass sensing, chemical sensing, and inertial sensing since that time [193]–[195].

Perhaps the best-known application of cantilevers as force and displacement sensors is in Atomic Force Microscopy (AFM). AFM was invented by Binnig, Quate, and Gerber in 1986 as the first tool capable of investigating the surface of both conductors and insulators at the atomic scale [196]. The first AFM combined Scanning Tunneling Microscopy (STM) technology [197] and a stylus profilometer. This AFM used tunneling current for cantilever displacement detection and achieved lateral and vertical resolutions of 30 Å and less than 1 Å, respectively. Since then, other detection methods such as optical [198] and capacitive [199], [200], have been used to detect the displacement of the AFM cantilever. However, these methods require a sensing element external to the cantilever. In 1993, Tortonese et al. first used piezoresistive transduction to detect AFM cantilever displacement [130]. The scheme achieved 0.1 Årms vertical resolution in a 10 Hz–1 kHz bandwidth. Piezoresistive transduction is attractive in its simplicity and reliability because: 1) the absence of external sensing elements simplifies the design of an AFM for large samples and adverse environments (high vacuum, etc.) and reduces the cost of the experimental setup; 2) the operation of the microscope is further simplified by eliminating the need for precise system alignment; 3) piezoresistive AFM requires low voltages and simple circuitry for operation.

Several innovations increased the visibility of piezoresistive AFM for specialized applications. AFM piezoresistive cantilevers have been improved for parallel high-speed imaging. Integrated actuators (thermal or piezoelectric) allowed increased bandwidth (0.6–6 kHz) by bending the cantilever over sample topography rather than moving the sample up and down with a piezotube [201], [202]. Brugger et al. demonstrated lateral force measurements using surface piezoresistors on AFM cantilevers [203]. Chui et al. [122] later introduced sidewall-implant fabrication for dual-axis piezoresistive AFM cantilever applications. The dual-axis AFM cantilevers utilize regions with orthogonal compliance to reduce mechanical crosstalk when an AFM cantilever is operated in a torsional bending mode and allow improved measurement of lateral forces at the tip (Fig. 21). Brugger et al. also fabricated and tested ultra-sensitive piezoresistive cantilevers for torque magnetometry [204]. Hagleitner et al. fabricated the first parallel scanning, piezoresistive AFM cantilevers integrated with on-chip circuitry using Complemetary Metal Oxide Semiconductor (CMOS) technology [205]. A review of advances in piezoresistive cantilevers for AFM until 1997 is available elsewhere [206].

Fig. 21.

Fig. 21

(a) Dual-axis AFM cantilever with orthogonal axes of compliance. Oblique ion implants are used to form electrical elements on vertical sidewalls and horizontal surfaces simultaneously. (b) SEM Image of a dual-axis AFM cantilever. Reprinted with permission from Chui et al. [122]. © 1998 American Institute of Physics.

Piezoresistive cantilevers have also been widely used for environmental [207], chemical [208], [209], and biological [210]–[218] sensors. Boisen et al. developed AFM probes with integrated piezoresistive read-out for environmental sensing [207]. The sensors had a resolution less than 1 Å and facilitated measurement in both gaseous and liquid environments. Franks et al. fabricated piezoresistive CMOS-based AFM cantilevers for nanochemical surface analysis application [219]. Baselt et al. reviewed micromachined biosensors and demonstrated the use of piezoresistive AFM cantilevers for the study of interactions between biomolecules and chemical sensors [210]. Piezoresistive cantilevers have also been used for materials characterization [220]–[222], liquid or gas flow velocity sensing [223], [224] and data storage applications [225]–[227]. However, researchers have found that thermal-based cantilevers perform better (more than one order of magnitude) in terms of sensitivity and resolution for data storage applications compared to the piezoresistive cantilevers [228]–[230]. Aeschimann et al. developed piezoresistive scanning-probe arrays for operation in liquids [231]. Their cantilevers were passivated with 50-nm silicon nitride films over the piezoresistors and 500-nm silicon oxide films over the metal lines. They also fabricated “truss” cantilevers to reduce the hydrodynamic resistance or damping in liquids.

Researchers have also pushed the limits of micro-fabrication to make ultra thin cantilevers. Harley and Kenny fabricated 890 Å thick single crystal silicon cantilevers using epitaxial deposition with sensitivity of 5.6 × 10−15 N/(Hz) 1/2 in air [131]. Liang et al. showed 700 Å thick n-type piezoresistive cantilevers with sensitivity of 1.6 × 10−15 N/(Hz) 1/2 at 1 kHz [132]. Harley and Kenny and Liang et al. formed the piezoresistors by growing doped epitaxial layers, which allowed the fabrication of ultra thin piezoresistors and cantilevers. However, Bergaud et al. showed that ion-implantation technique could also be used to fabricate ultra-thin piezoresistors (900 Å) by implanting Boron Fluorine (BF2) into germanium-prearmorphized silicon [232]. They found that the experimental sensitivity was 80% of their theoretical prediction and that the germanium prearmorphization step did not affect the sensitivity of the piezoresistors. Bargatin et al. developed a novel method to detect displacement and resonance up to 71 MHz using piezoresistors as signal downmixers [233]. They tested their scheme using nanoscale silicon and AlGaAs piezoresistive cantilevers (1100-Å thick) and demonstrated that the downmixed signal is approximately 1000 times larger than in the standard scheme (using high-frequency network analyzer). The same group later reported nanoscale silicon carbide (SiC) cantilevers with piezoresistive gold films for very high-frequency (VHF) applications in Scanning Probe Microscopy (SPM) [234]. Their smallest cantilever, 0.6 μm × 0.4 μm × 700 Å, with a first resonant frequency of 127 MHz and 1/f noise corner frequency of 100 Hz, was sensitive to thermomechanical self-noise. These devices fall into the category of piezoresistive Nano-Electro-Mechanical Systems (NEMS) and reviews on NEMS are available elsewhere [218], [235], [236].

Harley and Kenny reported optimization of thin (epitaxial), power-limited piezoresistive cantilevers for AFM applications [149]. The methods and analyses are extensible to other types of piezoresistive sensors. Three design aspects were discussed: geometric (thickness, length, and width), processing (dopant depth, dopant concentration, and surface treatment and anneal), and operation (bias voltage). Park et al. [57] extended this optimization to the general case of ion-implanted piezo resistors. Sensitivity in a single piezoresistor, ion implanted cantilever may be expressed as

SFΩ=ΔRRF=12(l12lp)πl_maxbt3t/2t/2qμpPzdzt/2t/2qμpdz, (15)

where S is the force sensitivity (V/N), πl_max is the maximum longitudinal piezoresistive coefficient (Pa−1), l is the length of the cantilever (m), lp is the length of the piezoresistor (m), b is the width of the cantilever (m), t is the thickness of the cantilever (m), p is the doping density (cm−3), μ is the dopant mobility (cm2 V−1 s−1), q is the electronic charge, P is the piezoresistance factor, z is the distance to the neutral axis of the cantilever and β* is the efficiency factor,

β=2tt/2t/2qμpPzdzt/2t/2qμpdz. (16)

The efficiency factor, β*, accounts for an arbitrary doping profile, e.g., ion-implanted, convolved with the stress profile and competing effects of dopant diffusion on sensitivity.

Yu et al. performed a similar analysis for piezoresistive cantilevers used in micro-channels [183]. Yu et al. also compared types of piezoresistive material (amorphous, microcrystalline, and single-crystal silicon) in their analysis. Yang et al. reported design and optimization of piezoresistive cantilevers for biosensing applications using finite element analysis, and analyzed the change in relative resistivity in the presence of a chemical reaction [213]. Optimization of piezoresistive cantilevers for chemical sensing has also been shown to differ significantly from optimization for force or displacement probing [389], [390]. Hansen and Boisen provided design criteria for piezoresistive AFM cantilevers by investigating the devices’ noise performance [181]. They took into account vibrational noise of the cantilever, Johnson and 1/f noise of the piezoresistor, and the effect of self-heating from the input power on the total noise.

B. Strain Gauges

The measurement of strain is important in numerous applications in science and engineering and metallic strain gauges are widely used. The measurement principle is based on the change in electrical conductance and geometry of a stretched conductor, as described in Sections II-A3 and II-B. Higson reviewed advances in mechanical bonded resistance strain gauges, from their introduction in 1938 to 1964 [237]. The discovery of the piezoresistive effect in silicon and germanium by Smith in 1954 [30] generated significant interest in semiconductor strain sensing. Kulite Semiconductor and Microsystems developed commercial products in the late 1950s [33]. These first-generation semiconductor strain gauges were used for making stress measurements. The gauges were organically bonded to metal flexural elements to make pressure sensors, load cells and accelerometers (Fig. 2). More recently stress sensitive rosette patterns have been integrated onto silicon die to measure integrated circuit packaging stresses [238] Creatively, Schwizer et al. used piezoresistive rosettes to measure wire bonding forces and flip chip solder ball process parameters [239], [240]. Planar arrangements of pseudo-hall effect strain sensors have also been demonstrated for 3D sensing when coupled with an input arm such as a joystick or coordinate measuring probes [59], [391].

C. Pressure Sensors

Piezoresistive pressure sensors are some of the most reported and developed micromachined devices. Esashi et al. [241] reviewed micromachined pressure sensors with various transduction mechanisms and principles. In this paper, we focus on piezoresistive pressure sensors, which typically measure deflection (deformation) of a thin circular or rectangular membrane (diaphragm) under an applied external pressure (Fig. 22). The membrane may be made from the same material as the wafer substrate (silicon, diamond, etc.) or CVD-based thin films (oxide, nitride, etc.). Integrated piezoresistors are formed by dopant diffusion, ion implantation, or doped epitaxy. Maximum stress occurs at the edge of the membrane so piezoresistors are usually located near the edge to maximize sensitivity.

Fig. 22.

Fig. 22

Illustration of a piezoresistive pressure sensor. (a) Top view of piezoresistive pressure sensor. Four piezoresistors are placed on each edge forming a Wheatstone bridge circuit. (b) Cross section A-A showing deflected diaphragm with piezoresistors at maximum stress locations. (c) Photograph of a pressure sensors with four 3C-SiC (a polytype of silicon carbide, see Section IV-A) piezoresistors. From Wu et al. [336]. © 2000 IEEE.

Kulite-Bytrex and Microsystems introduced commercial metal-diaphragm pressure sensors in the late 1950s [33]. Semiconductor-based strain gauges were epoxy-bonded to the surface of a machined metal diaphragm. Typically, four semiconductor strain gauges were employed, two in tension at the diaphragm center and two at the edge, allowing configuration into a four active arm Wheatsone bridge which: provided a voltage output proportional to ΔR/R, increased sensitivity, nulled the output, and provided a first order correction for zero shift with temperature. These sensors were intended for high-cost, low-volume industrial, aerospace, and biomedical applications. These miniature devices had relatively low performance by today’s standards. They suffered especially from poor zero stability due to the mismatch between the thermal expansion coefficients of the silicon strain gauge and the stainless steel diaphragm and the relatively poor stress transmission characteristics of the metal-epoxy-silicon interface, which caused creep and hysteresis. In 1959, Burns patented one of the earliest diaphragm-based piezoresistive semiconductor microphones [242]. Although intended as acoustic transducers, the operation principles were similar to those of piezoresistive pressure sensors.

In 1962, Tufte et al. [36] reported the first silicon pressure sensors with piezoresistors integrated with the diaphragm using dopant diffusion. These diffused piezoresistive pressure sensors eliminated the epoxy bonding and replaced the metal diaphragm with single-crystal silicon, improving the performance of the sensors significantly. Following this, Peake et al. [243] developed an integrated circuit digital, diffused silicon, piezoresistive pressure sensor for air data applications in 1969.

In the late 1960s and early 1970s, three microfabrication techniques, anisotropic chemical etching of silicon, ion implantation, and anodic bonding, were developed. These techniques played a major role in improving the performance of microfabricated pressure sensors. Anisotropic etching and anodic bonding allowed batch fabrication of pressure sensors, reducing the cost of the production. In addition, these technologies enabled miniaturization, increased sensitivity, and precise placement and dose of the piezoresistors. In 1967, Stedman [244] pioneered bossed-diaphragm pressure sensors. Samaun et al. [245] used anisotropic etching to form the silicon diaphragm and showed a significant increase in sensitivity of the sensor. Wilner [246], [247] further improved sensitivity and linearity by placing piezoresistors in the transverse direction at the concentrated stress locations and introduced sculptured diaphragms. In 1977, Marshall [248] at Honeywell patented the first silicon-based pressure sensor using ion implantation. In 1978, Kurtz et al. [249] at Kulite Semiconductor invented a low pressure, bossed-diaphragm, pressure transducer with good sensitivity and linearity at low pressure. In the 1970s, Kulite Semiconductor and Honeywell, Inc. began to produce and make widely available commercial integrated pressure sensors. Clark and Wise enabled refined designs with derivation of the governing electromechanical equations of thin diaphragm silicon pressure sensors using finite difference methods [250]. The solutions were presented in dimensionless form applicable to anisotropically etched square diaphragms of arbitrary size and thickness.

From the 1980s to the present, continued improvements in fabrication technologies, such as anisotropic etching, photolithography, dopant diffusion, ion implantation, wafer bonding, and thin film deposition, have allowed further reduction in size, increase in sensitivity, higher yield, and better performance (Fig. 23). Several microfabrication techniques have been developed and employed to precisely control diaphragm thickness. Jackson et al. and Kim and Wise used an electrochemical P-N junction as an etch stop, taking advantage of significantly different etch rates of p-type and n-type silicon (3000:1 in ethylene diamine-based etchants) [251], [252]. Kloeck et al. [253] reported improved output characteristics of piezoresistive pressure sensors fabricated with electrochemical etch-stop techniques. In the late 1980’s Novasensor introduced the use of silicon fusion bonding to MEMS sensors [254]. NovaSensor used this technique combined with controlled thinning techniques, such as boron etch stopped etching and p-n electrochemical etching, to produce a number of piezoresistive sensors. These sensors included low-pressure sensors with sculptured bosses, high-pressure and high-temperature sensors, sensors with precision stop overload protection, and accelerometers [255]–[258].

Fig. 23.

Fig. 23

The evolution of micromachined pressure sensors from 1950s to 1980s. After Eaton and Smith [102].

Chau and Wise [259] provided scaling limits for ultra-miniature and ultra-sensitive silicon pressure sensors based on Brownian noise, electrical noise, electrostatic pressure variations, and pressure offset errors due to resistance mismatch. Spencer et al. [260] compared noise limits for piezoresistive and capacitive pressure sensors integrated with typical signal conditioning for varying diaphragm thickness, diameter, and gap. Regardless of the sensor dimension, piezoresistive sensors configured in a Wheatstone bridge achieved the best resolution. Sun et al. [261] presented a theoretical model of the reverse current (leakage current across the piezoresistor-substrate p-n junction) and its effect on thermal drift of the bridge offset voltage. They found cleaner processing, gettering of metal impurities, and contamination control reduced the reverse current and offset errors.

Bae et al. [262] reported a design optimization of a piezoresistive pressure sensor considering the piezoresistor lengths and number of turns and showed that the optimal design is significantly different when noise in considered. The optimal output signal-to-noise ratio was 2.5 times that of the sensor designed maximizing the output voltage alone. Kanda and Yasukawa considered several factors in their optimization of piezoresistive pressure sensors including: the shape of the diaphragm (square or circular); the thickness uniformity of the diaphragm (with or without a center boss); anisotropy of the piezoresistivity and elasticity; and large deflection of diaphragms [46]. They introduced a new index, η (modified signal-to-noise ratio), which allowed them to optimize the crystal planes of the diaphragm and the crystal directions of the piezoresistors, regardless of the dimensions. They found that a square diaphragm with a center boss on a (100) plane with four piezoresistors aligned along the 〈111〉 direction was the optimum design. Bharwadj et al. reported on signal-to-noise ratio optimization of piezoresistive microphones and took into account the placement of piezoresistors, geometry, process condition, and bias voltage [182]. These microphones are based on a pressure-sensitive diaphragm, similar to that of pressure sensors.

The design, manufacture and processing of silicon piezoresistive pressure sensors has achieved a high level of sophistication. An example is the Bosch piezoresistive pressure sensor shown in Fig. 24. This sensor is used to measure atmospheric and manifold pressure in electronic engine control systems. Researchers at Bosch developed a new technique for these piezoresistive pressure sensors using porous silicon and epitaxy to form a single crystal silicon membrane and vacuum cavity without bonding [263], [264]. This approach saves wafer real estate and is CMOS compatible.

Fig. 24.

Fig. 24

Bosch porous silicon pressure sensor. (a) Sensing diaphragm and cavity cross section. (b) Pressure sensor with mixed signal integrated CMOS signal conditioning electronics. (c) Ceramic surface mount packaged sensor. © Bosch. Pictures: Bosch.

Most pressure sensors manufactured today still use piezoresistive transduction. Advantages of piezoresistive sensing compared to capacitive sensing include ease of differential pressure sensing configurations and freedom from the film stress related errors and failures of surface micromachining.

D. Inertial Sensors

1) Accelerometers

Accelerometers are another heavily commercialized MEMS application. A comprehensive review of micromachined inertial sensors, including piezoresistive accelerometers, was provided by Yazdi et al. [265], Accelerometers are widely used in automotive (crash detection and stability control), biomedical (activity monitoring), consumer electronics (portable computing, cameras lens stabilization, cellular phones), robotics (control and stability), structural health monitoring, and military applications. Gyroscopes can be used together with accelerometers to provide additional information on angular velocity for navigation purposes in automotive, robotics, and military applications.

A mechanical accelerometer consists of a proof mass, m, sprung from beams (spring constant, k), anchored to a fixed substrate (Fig. 25). The proof mass motion is damped by viscous effects (damping constant, b) of any surrounding fluid. The resonant frequency (ωo) and the quality factor (Q) of the system can be calculated from

Fig. 25.

Fig. 25

An accelerometer is modeled as a second order system with a proof mass (m), spring (k), and damper (b). The displacement (x) is proportional to the acceleration (A) in the x-direction. The range of the proof mass movement is limited by the end stops, which protect the device from shock damage.

Q=mωob (17)

where,

ωo=km. (18)

In the late 1960s, Gravel and Brosh [266] reported on a diffused, chemically micromachined, integrated silicon beam accelerometer. Roylance and Angell introduced the first fully integrated piezoresistive micromachined accelerometers in 1978 for biomedical applications [267], [268]. The accelerometer consisted of a piezoresistive cantilever with an integrated micromachined lumped mass at the end and a diffused piezoresistor at the root of the flexure. The device layer was fully packaged inside a pair of pyrex glass wafers. The glass wafers served to protect the device from the environment and to limit proof mass travel. Barth et al. [269] introduced the first commercialized piezoresistive accelerometer using silicon fusion bonding to provide an integral package and over pressure stop. Monolithic integration of piezoresistive accelerometers with CMOS circuitry subsequently improved the output readout and accommodated temperature compensation circuitry [270], [271]. Allen demonstrated piezoresistive accelerometers with self-test features [272]. Chen et al. integrated a novel vertical beam structure in a piezoresistive accelerometer to allow in-plane and out-of-plane acceleration measurements [273]. Kwon and Park [274] fabricated a three axis piezoresistive accelerometer using bulk micro-machining and silicon direct bonding technology using a polysilicon layer. Partridge et al. [123] and Park et al. [124] used oblique ion-implantation for the piezoresistors with DRIE to fabricate devices designed for lateral acceleration sensing. These devices also incorporated a novel wafer-level packaging technique using a thick polysilicon epitaxial cap to seal the devices and protect the piezoresistors from harsh plasma processing. This protection reduced the noise and package footprint [275]. Park et al. also reported using a fully packaged sub-mm scale piezoresistive accelerometer, for vibration measurements in middle ear ossicles (Fig. 26). This technology could provide an alternative sensing method for implantable hearing aids [276]. Lynch et al. integrated piezoresistive planar accelerometers with wireless sensing unit for structural monitoring [277].

Fig. 26.

Fig. 26

(a) Oblique-view SEM of a sidewall-implanted (41° from the vertical axis) piezoresistive accelerometer with a 20-μm-thick epi-poly encapsulation. (b) Optical photograph of the completely packaged piezoresistive accelerometer with flexible circuit wiring. The sensor is shown in the background of table salt crystals. From Park et al. [276]. © 2007 IEEE.

Today, piezoresistive transduction vies with capacitive transduction as the most popular sensing mechanism for commercial accelerometers. Many Japanese accelerometer manufacturers (e.g., Hitachi Metals, Matsushita, Fujitsu, and Hokuriku) use piezoresistive transduction, while manufacturers from the US and Europe (e.g., Bosch, Freescale, Kionix, STMicroelectronics and Analog Devices) focus mainly on capacitive sensing. Other companies, such as SensoNor (now Infineon) and Novasensor (now GE sensing) have also demonstrated piezoresistive accelerometers in production. Both sensing mechanisms utilize CMOS integrated circuits for amplification and compensation, either a monolithic (Analog Devices) or hybrid approach. Large manufacturers of automotive sensors prefer capacitive sensing with integrated self-test by electrostatic actuation. Three-axis sensing capability, size, and cost are becoming important factors as demand for consumer electronics with accelerometer sensing increases, especially in portable devices and game consoles.

2) Gyroscopes

Inertial gyroscopes measure rate of rotation and operate by detecting inertial resistance to changes in velocity, e.g., by detecting precession forces when tilting a spinning mass or via Coriolis forces on a vibrating mass. Most micromachined gyroscopes are based on vibration and use the transfer of energy between two orthogonal vibration modes via the Coriolis force. The Coriolis force, Fc, induces acceleration (in y) of the mass proportional to vibration velocity (in x) and angular rate of rotation (about z): Fc = 2 mΩXipωr cos(ωrt), where m is mass of the proof mass, Ω is magnitude of a rotation vector, and Xipωr cos(ωrt) is the in-plane velocity of the proof mass (Fig. 27). Micromachined gyroscopes are difficult to manufacture because they require a high performance resonator and an accelerometer coupled in a high-vacuum hermetic package. Few MEMS gyroscopes utilize piezoresistive detection but these require another transduction method for the vibration, e.g., Paoletti et al. and Voss et al. demonstrated piezoresistive sensing in a tuning-fork gyroscope driven by piezoelectric and electromagnetic forces, respectively (Fig. 28) [278], [279]. Gretillat et al. improved this design by creating a higher symmetry mechanical structure using Advanced Deep Reactive Ion Etching (ADRIE) and separating the first and second resonant frequencies [280].

Fig. 27.

Fig. 27

A MEMS gyroscope is driven in one axis and sensed in an orthogonal axis.

Fig. 28.

Fig. 28

Gyroscope with electromagnetic excitation and piezoresistive detection. From Paoletti [278]. © 1996 IEEE.

Most micromachined gyroscopes are based on vibration. Vibratory gyroscopes use the transfer of energy between two vibration modes by the Coriolis force. Micromachined gyroscopes are difficult to manufacture, as they require a high performance resonator and an accelerometer, coupled in a high-vacuum hermetic package.

In most commercial MEMS gyroscopes, the same transduction scheme is preferred for both resonator actuation and acceleration sensing for ease of integration, e.g., piezoelectric or capacitive; this is one reason why piezoresistive gyroscopes are not seen in production. Another reason is the 1/f noise source. In most rate sensing applications, i.e., navigation, the primary variable of interest is position. However, a gyroscope senses rate of rotation and to obtain position the output of gyroscope must be integrated. As with any integration, the slightest offset errors will induce an increasing (ramped) error in the integrated position. Hence, the zero stability and 1/f noise of gyroscopes are of enormous importance for position sensing applications. Piezoresistor transduction has inherent 1/f noise that limits the useful integration time (accuracy) on the device output. Capacitive sensing gyroscopes are more commonly employed because they do not exhibit 1/f noise at the transducer. However, with progress in very low 1/f noise piezoresistors [56], piezoresistive gyroscopes may soon appear with new possibilities of improved quadrature signal cancellation.

3) Shear Stress Sensors

The accurate measurement of wall shear stress (or skin friction) is important for both applied and basic problems. From improving the aerodynamic design of a vehicle body to understanding the formation of atherosclerosis on the wall of human blood vessels [281], shear stress measurement provides key input to understanding the fluid flow physics. Naughton and Sheplak reviewed three relatively modern categories of skin-friction measurement techniques that are broadly classified as MEMS-based sensors, oil-film interferometry, and liquid crystal coatings [282]. While MEMS-based techniques show great promise, further development is needed and piezoresistive shear stress sensors are an area of active research [282], [283]. Piezoresistive shear stress sensors commonly utilize a floating-element anchored to the substrate via four piezoresistive tethers (fixed-guided beams). The displacement of the floating element due to the integrated shear stress (force) is detected as bending stress in the piezoresistors.

Ng et al. [284] and Shajii et al. [285] used wafer-bonding technology to fabricate floating-element (120 × 140 μm2) sensors. Piezoresistors were fabricated on the top surface of the tethers using ion implantation (Arsenic at 80 keV and 7 × 1015 cm−2 dose). In operation, the fluid flow direction was parallel to the tethers such that a shear force over the element loads two of the tethers in axial compressive stress and the other two in axial tensile stress. The sensor was designed to detect high shear stresses (1–100 kPa) in high pressure (6600 psi) and high temperature (220 °C) liquid environments, and was tested in a cone-plate viscometer.

We used oblique (20°) ion-implantation to form piezoresistors on the sidewall of two tethers and a normal surface implant for two other tethers (Fig. 29) [53]. The sidewall piezoresistors are sensitive to lateral deflections (Fz and My in the flow direction), while the normal piezoresistors are sensitive to flow fluctuations producing out-of-plane deflections (Fy and Mz). Thus, each sensor enabled simultaneous measurements of normal and shear stresses. The floating element (500 × 500 μm2) was defined using frontside and backside silicon DRIE processes. A hydrogen anneal (1000 °C and 10 mTorr for 5 minutes) smoothed the DRIE scallops before ion-implant and improved the 1/f noise level of the oblique-implanted piezoresistors by an order of magnitude. The sensors were designed for harsh, liquid environments, and were tested in a gravity-driven flume [150]. Li et al. also developed piezoresistive shear stress sensors using oblique ion-implantation technique, optimizing the geometry of the piezoresistors and the sensors, as well as the dopant concentration and bias voltage [125], [286]. Other piezoresistive 3D stress sensors have been used to measure multi-axis tactile or traction forces for biological [287]–[289], robotic [290], and device packaging applications [59]–[61], [69], [153], [291]–[294]. Noda et al. fabricated 2-D shear stress sensors for tactile sensing with standing piezoresistive cantilevers embedded in polydimethylsiloxane (PDMS) [295]. Fan et al. and Chen et al. have designed, fabricated, and characterized artificial-hair-cell-based piezoresistive flow sensors for underwater applications [296], [297]. These artificial haircells are inspired by biological hair-cells and utilized arrays of piezoresistive cantilevers with posts (hairs) normal to the cantilever. These sensors can also be used to measure shear stress with similar principles to those of piezoresistive fence-based shear stress sensors [298], [299].

Fig. 29.

Fig. 29

(a) Piezoresistive floating-element MEMS shear stress sensor. Each sensor consists of two top-implanted and two sidewall-implanted piezoresistors. The sidewall-implanted piezoresistors are sensitive to in-plane stress (shear stress), while the top-implanted piezoresistors are sensitive to out-of-plane stress (normal stress). Thus, each sensor enables simultaneous measurements of normal and shear stresses. (b) SEM image of a 500-μm square floating element. (c) SEM image of one of the tethers with a sidewall-implanted piezoresistor. Reprinted from Barlian et al. [53] with permission from Elsevier.

E. Signal Conditioning and Temperature Compensation

As discussed in Sections II-D2 and II-E1, piezoresistors are also sensitive to temperature variations. In many cases, the resistance change due to temperature is higher than that of the desired signal. The electronics can correct for these changes. Moreover, processing variations also give rise to different piezoresistive characteristics, which in turn alter the temperature characteristics of each sensor. However, each piezoresistive sensor can be individually calibrated to achieve high accuracy. The most common temperature compensation techniques in piezoresistive sensors use identical resistors in a Wheatstone bridge configuration. Co-fabricated piezoresistors of the same design exhibit similar temperature dependence; therefore, the zero output of a compensated Wheatstone bridge remains constant with temperature changes (to first order). This scheme trades off favorably for signal-to-noise ratio (SNR) with increased sensitivity despite increased noise e.g., Mallon et al. [56]. Temperature-sensing resistors may also be co-fabricated with stress-sensing piezoresistors and used as bridge elements. These resistors should be placed near one another to minimize the effects of process variation. Modern electronics can ultimately correct all repeatable errors. If a piezoresistive sensor is heated and then cooled to the initial temperature, then the output should be the same for the same input. However, small differences are observed between temperature cycles. This thermal non-repeatability is one of the fundamental limits of sensor accuracy, not correctable with signal conditioning circuits.

Prior to 1980 most of the temperature compensation circuits for piezoresistive sensors employed trim resistors with or without low noise bipolar amplifiers. Laser-trimmed resistors are used to adjust the offset, span, nonlinearity and other errors of piezoresistive sensors. Laser-trimmed amplifiers are rather bulky due the mechanical limits placed on the trim resistors. CMOS circuitry became the dominant source of signal conditioning after 1990. The need for even smaller, more accurate, and cheaper sensors was an impetus for the transition to CMOS. The bipolar technology, an analog technology, does not offer the functionality of a digital technology (CMOS) measured in terms of cost per power per functionality. The push toward CMOS technology evolved with the availability of non-volatile memory (NVM). The laser-trimmed resistors were then replaced with digital-to-analog converters (DAC) and memory. By use of double correlated sampling, offset and low frequency noise of the CMOS circuit are sampled and stored on a capacitor and in the next cycle they are subtracted from the original signal. Hence rendering the CMOS amplifier almost ideal in the low frequency region relative to the sampling frequency. In CMOS, the need for digital output is easily addressed by integrating the analog to digital converter with the sensor. A majority of designs incorporate sigma-delta converters (Fig. 30) as the primary analog to digital converter (ADC) architecture due to its inherent robustness [300], [301].

Fig. 30.

Fig. 30

(a) CMOS integrated piezoresistive cantilever array (two scanning cantilevers and one reference cantilever) (b) Micrograph of the overall sensor CMOS signal conditioning circuit (c) Array of 12 cantilevers (the inner ten can be used for scanning while the outer two serve as a reference). The dimensions of the scanning cantilevers are 500 μm × 85 μm. From Hafizovic et al. [305], reprinted with permission from PNAS.

By use of analog circuit techniques and NVM, the need for laser trimming as a means of sensor compensation was eliminated and the power of digital technology was used to compensate and calibrate the piezoresistive sensors. This technology enabled unprecedented sensor accuracy at very low cost [302].

There are two main architectures for piezoresistor temperature compensation, i.e., fully digital path and digitally controlled analog path [303]. Digital path architecture uses an ADC to digitize the sensor and temperature signal and then uses a mathematical equation to compensate offset and span. If an analog output is needed then the compensated digital data is fed to a DAC. This architecture is the most flexible but has some inherent problems that limit its use in control loops. One of the main drawbacks is the delay time from the input to output. The ADC, the microprocessor, and the DAC all need processing time, this dead time may not be tolerated in feedback control. In contrast, the analog path architecture takes advantage of the fact that temperature is a slow signal. Hence, delay in processing of the temperature signal is not of concern. The digitized temperature signal is mathematically processed and controls an analog path by changing the gain and the offset of wide-band amplifiers, which inherently have small delays.

The question of integration of the sensor with electronics mainly depends on the application. Generic signal conditioning circuitry consists of an excitation circuit, a bridge circuit, an amplifier, and a filter [51]. These components all contribute to the overall resolution of the system (Fig. 31). Ishihara et al. developed the first CMOS integrated silicon diaphragm pressure sensors in 1987 [304]. Since then, CMOS circuitry has been integrated with piezoresistive MEMS devices, such as AFM [63], [195], [205], [216], [219], [305]–[307] and force or stress sensors [59], [61], [68], [290], [292], [294], [308]–[310]. Mayer et al. determined three piezoresistive coefficients, π11, π12, and π44, of an n+ diffusion of a commercial piezoresistive CMOS chip using a novel method by subjecting the chip to three different stress fields [311]. This method can be used to calibrate CMOS-based piezoresistive stress sensor chips. Baltes et al. reviewed advances in the CMOS-based MEMS until 2002, including microsensors and packaging, and discussed some key challenges and applications for the future [312], [313]. Recently, more advanced techniques have been employed to achieve better control in temperature compensation. Chui et al. took advantage of the dependence of the piezoresistive coefficient of silicon on crystallographic orientation, and showed an order of magnitude improvement in thermal disturbance rejection over conventional approaches using uncoupled resistors by using piezoresistors in both the 〈100〉 and 〈110〉 directions [314].

Fig. 31.

Fig. 31

The power spectral density (PSD) and integrated force noise of a measurement system using an AD622 instrumentation amplifier and piezoresistor bridge. All components in a signal conditioning circuit contribute to the noise and resolution of the system. Courtesy of Sung-Jin Park [54], reprinted with permission from PNAS.

Mallon et al. used a modulation-demodulation circuit to measure 1/f noise of piezoresistors at low frequencies [56]. The modulation demodulation technique is primarily used for low noise and low frequency detection of a sensor signal. This technique overcomes the high noise of electronics at low frequencies since all linear non-switched electronic amplifiers exhibit higher noise at low frequencies. The bridge is excited with sinusoidal voltage (10 Vpp). The output of the piezoresistive bridge is proportional to the applied voltage multiplied by conductivity variation. The modulated output of the piezoresistive bridge is then amplified (×1000) using a high frequency low noise amplifier (TI103), and then bandpass-filtered to reduce the effect of noise folding (bandwidth ~200 Hz, center frequency 500 Hz). Using a multiplier with gain of 4/π (AD630) the signal is demodulated. The signal is finally low-pass filtered with a three pole filter (Fig. 32).

Fig. 32.

Fig. 32

Modulation-demodulation circuit for low frequency low noise detection.

F. Device Design Summary

Since the discovery of piezoresistance, several generations of commercial device designers and academic researchers have designed piezoresistive sensors for diverse applications. However, all piezoresistive sensors have fundamental tradeoffs between sensitivity and noise. The piezoresistor geometry, device geometry, and fabrication process must be designed together for low noise and high sensitivity to achieve the required resolution. Design constraints and flexibility have evolved with mainstream semiconductor technology providing new processes such as ion implantation and reactive ion etching. As discussed already, several investigators have provided detailed device optimization analyses for given applications within very specific constraints [46], [57], [149], [181]–[183], [213], [262]. No concise, generic design guidelines exist for all devices types and the sensitivity and noise are convolved with the geometry and mechanics of any particular device. However, the design criteria for the piezoresistor itself can be described by a rich parameter space and we review here many that are directly in control of the designer.

Design parameters include: dopant type, energy, and deposition method; the type, temperature and time of anneal(s); the thickness (tp), length (lp), and width (wp) of the piezoresistor and their relation to device geometry (e.g., ratio of piezoresistor length to beam length); and the number of dopant atoms (N) in the piezoresistor volume. The geometry and dimensions of the device are designed in parallel to meet bandwidth, dynamic range, sensitivity, and resolution requirements. Particular attention to the tradeoffs in parameters is required when pushing towards very small sizes, high sensitivity, or large bandwidth. Figs. 12, 15, and 18 and (13) and (14) provide quantitative guidance in the tradeoffs in selecting dopant concentration, anneal, and bias voltage to increase sensitivity and decrease noise. For example, the minimum force resolution in an ion implanted, end-loaded, piezoresistive cantilever in a 1/4-active Wheatstone bridge may be expressed as a function of (11), (12), (15), and (16) as

Fmin=αVbias22lpwpNzln(fmaxfmin)+8kBTRslpwp(fmaxfmin)3(l12lp)πl_max2wt2βγVbias (19)

where γ is the ratio of the strained region of piezoresistance to the unstrained resistance path.

However the optimization must also be tempered with application specific requirements for device size, power dissipation, bandwidth, dynamic range, linearity, and temperature stability. For example, reduced power dissipation argues for higher overall resistance (lower N) and lower bias voltage. Lower carrier number (N) concomitantly increases the 1/f noise, resistance, sensitivity, temperature coefficients of sensitivity and resistance, while higher resistance increases Johnson noise. In determining dimensions for a displacement sensing cantilever, Table 3 provides a relational matrix between parameters the designer can tune to tailor device performance.

Table 3.

Example Design Matrix Showing Relationship of Parameters in Piezoresistive Cantilever Beam for Displacement Sensing [Trends Within the Ranges of Figs. 12, 15, 16 and 18 and (13) and (14)]. As the Controlled Design Parameter Increases (While Other Parameters Are Held at Typical Values and Input Displacement is Fixed), the Observed Parameters Respond as: Increasing (↑), Decreasing (↓), Weak or No Relation (-).

Observed Parameters
Power (W) Volume (m3) Bandwidth & ωn (Hz) Sheet resistance (Ω/square) Sensitivity (V/m) 1/f Noise (V/√Hz) Johnson Noise (V/√Hz) Junction depth (m) TCR (/°C) TCS (/°C)
Controlled Parameters n (cm−3) - - - *
Vb (V) - - - - - - -
Dt (m) - - -
tp (m) - - -
wp (m) - - - - - -
lp (m) - - - - -
h (m) - - - - - - -
L (m) - - - - - - -
b (m) - - - - - - - - -
*

Note: Please See Fig. 15.

Vb, Vb, and Dt are the Dopant Concentration, Bias Voltage, and Diffusion Length, Respectively. tp, wp, and lp are the Piezoresistor Thickness, Width, and Length, Respectively. h, b, and L are the Cantilever Beam Thickness, Width, and Length, Respectively

Generally, larger dimensions allow better sensitivity and larger piezoresistor size which lowers noise and improves heat dissipation. Beam dimensions are selected for dynamic range, sensitivity, and bandwidth. Minimum thickness is limited by process capability (Section III-C) and should also be selected to achieve appropriate piezoresistor strain and account for strains from residual stresses in dielectrics or thin films. Well-prepared, small-diameter samples of silicon exhibit high fracture stress [315], while processed MEMS devices of millimeter dimensions exhibit lower values [316].

Once devices are fabricated, testing usually involves characterization of noise power spectral density and sensitivity calibration of individual devices after packaging and integration with signal conditioning. The noise integrated over the measurement or application frequency band sets the resolution, reported by converting voltage output to the measurand using the sensitivity calibration. Calibration methods vary from device to device but should be accomplished over the temperature range, dynamic range, and bandwidth appropriate to the application. For example, piezoresistive cantilevers calibrated with an electrostatic force balance at the U.S. National Institute of Standards and Technology (NIST) are promising metrology devices as force transfer standards for MEMS and AFM users [317], [318].

IV. ALTERNATIVE PIEZORESISTIVE MATERIALS

Most commercial and research piezoresistive MEMS devices and microsystems utilize silicon and germanium, or their alloys. For example, Lenci et al. reported the first experimental values of piezoresistive coefficients in polycrystalline silicon-germanium and demonstrated a pressure sensor of this material [319]. They found longitudinal and transverse piezoresistive coefficients of 4.25 × 10−11 Pa−1 and 0.125 × 10−11 Pa−1, respectively. However, with advances in materials science and processing, newer materials are currently being developed for MEMS and microsystems. These materials have advantages over silicon in some applications (e.g., higher melting temperature, higher/lower modulus of elasticity, or higher piezoresistive coefficients). In this section, we review four novel materials that could complement silicon in piezoresistive sensing applications.

A. Silicon Carbide

Silicon Carbide (SiC), with superior mechanical properties, such as higher Young’s Modulus (424 GPa), higher sublime temperature (1800 °C), higher thermal conductivity, and inertness to corrosive environments, is an attractive new material for MEMS and NEMS devices [320]. In addition to its superior mechanical properties, single crystal SiC also has a wider band gap (2.39–3.33 eV) compared to that of single crystal silicon (1.12 eV) [320]. This reduces the effect of thermal generation of carriers that results in increased reverse leakage current across a p-n junction, at high temperatures. Werner and Fahrner summarized electronic maximum operating temperature and band gaps for several semiconductor materials [321]. SiC has several advantages over other wide-bandgap materials (GaAs, diamond, etc.), including commercial availability of substrates, some device processing techniques, and the ability to grow stable native oxides [320]. Nevertheless, obtaining a high-quality oxide with low interface state and oxide trap densities has proven challenging because of the carbon on the surface, as well as off-axis epitaxial layers which have rough surface morphologies [322].

SiC has about 200 known polytypes. The physical properties of each polytype vary. A complete review of SiC crystal structures and polytypes is available elsewhere [323]. The most common ones are 6H-SiC, 4H-SiC, and 3C-SiC. Polytypes 6H-SiC and 4H-SiC have a hexagonal crystal structure (α-SiC), while 3C-SiC has a cubic crystal structure (β-SiC). In one of the earliest systematic studies in the piezoresistivity of 3C-SiC, Shor et al. measured the longitudinal and transverse gauge factors as a function of temperature for two different doping levels [324]. Ziermann et al. reported the first piezoresistive pressure sensor using single crystalline β-SiC n-type piezoresistors on Silicon-on-Insulators (SOI) substrates [325]. Studies performed on the piezoresistivity of a-SiC have shown negative gauge factors as large as −35 for longitudinal and −20 for transverse gauge factors [326], [327]. A summary of published piezoresistive data for both α- and β-SiC through 2001 was presented by Werner et al. (Fig. 33) [328].

Fig. 33.

Fig. 33

Longitudinal gauge factor in 〈100〉 direction for β-SiC as a function of temperature for different doping levels from various researchers [324], [325]. Werner et al. noted that these experimental data are in good agreement with the theoretical gauge factor predicted by electron transfer mechanism theory [81] in many-valley semiconductors [328]. After Werner et al. [328]. Reprinted with permission from Wiley.

In contrast to its single crystal counterpart, polycrystalline SiC exhibits positive gauge factors of smaller magnitude. Strass et al. provided a summary of the gauge factor of polycrystalline SiC as a function of temperature and doping [329]. At room temperature, the gauge factor is around 6 for undoped and 2–5 for doped polycrystalline SiC. The shift from negative to positive values was explained by the greater influence of grain boundaries in polycrystalline wide-bandgap materials compared to polysilicon. The piezoresistance also depends on the temperature, the crystal orientation, and the doping type.

Piezoresistance of polycrystalline β-SiC fibers has also been studied [330]. With a gauge factor of 5 in 14-μm diameter β-SiC fibers under tension, SiC fibers have been used for continuous reinforcement of high-temperature structural composites for their oxidation resistance. Their piezoresistive properties are useful to monitor strain in these composites.

Additionally, theoretical investigations of the piezoresistivity in the cubic 3C-SiC and hexagonal n-type 6H-SiC, based on electron transfer and the mobility shift mechanism, have been performed [331], [332]. In the hexagonal 6H-SiC, the anisotropic part of the piezoresistance tensor vanishes in the (0001) plane and only the isotropic part remains. As a consequence, longitudinal, transverse, and shear gauge factors and properties are isotropic in the (0001) plane.

Several SiC-based piezoresistive MEMS devices have been developed to withstand harsh operating environments, such as high impact/acceleration (40 000g) [333] and high temperatures (200–500 °C) [334]–[336]. Complete reviews of SiC-based MEMS and NEMS, especially for harsh environment applications, are available elsewhere [321], [328], [337]–[340].

B. Diamond

Diamond is also an attractive new material for micromechanical devices for elevated temperatures and harsh environments [321], [328], [341], [342]. Superior properties, compared to silicon, include physical hardness, higher Young’s modulus, higher tensile yield strength, greater chemical inertness, lower coefficient of friction, and higher thermal conductivity. Experimental values for Young’s modulus of CVD diamond have been reported from 980 to 1161 GPa [341].

Doping of diamond can be done in-situ during film growth, or using other standard techniques, such as ion implantation and high-temperature diffusion. Werner et al. summarized both longitudinal and transverse piezoresistive coefficients reported by various research groups before 1998 (Fig. 34) [342]. The reported piezoresistive GF of single crystal and polycrystalline diamond are typically in the ranges of 2000–3836 and 10–100, respectively [343]. Polycrystalline diamond has a higher GF compared to that of SiC, but like the other piezoresistive properties, these values depend greatly on the doping concentration and temperature.

Fig. 34.

Fig. 34

The summary of published average longitudinal and transverse piezoresistance coefficients in boron-doped polycrystalline diamond by Werner et al. [342]. The published gauge factor data were converted to piezoresistive coefficients assuming Young’s modulus of 1143 × 109 Pa. After Werner et al. [342]. © 1998 IEEE.

The relatively low GF of polycrystalline diamond is usually attributed to its polycrystalline structure. A study of intra- and inter-grain conduction in large-grain CVD diamond showed the intra-grain resistivities are lower than those of grain boundaries [343]. The intra-grain GF over 4000 for a large grain (50–80 μm) polycrystalline diamond is the largest piezoresistive effect reported for any material. However, the GF deteriorates when grain boundaries are included in the conductance path, with a GF of 133 when the conductance path includes eight grain-boundaries. Yamamoto and Tsutsumoto suggested two methods to improve the GF of polycrystalline diamond films [344]. The first was to decrease the ratio of carbon to hydrogen when depositing boron-doped diamond films. Decreasing the ratio of C-O/H from 5.5% to 2.2%, increased the GF from 3 to 30. In this case, the quality of diamond was improved by decreasing the C-O/H ratio and the GF increased as the diamond quality was improved and the grain size became larger. A second method varied boron doping time and the boron-doped layer thickness. Varying doping time from 3 to 10 minutes (corresponding to layer thickness of 0.1 to 0.33 μm) increased the GF from 0 to 50.

C. Carbon Nanotubes (CNT)

Carbon nanotubes (CNTs) are graphene sheets rolled-up into cylinders with diameters as small as one nanometer and lengths as large as centimeters. This form of carbon was first reported by Iijima in 1991 [345]. Mechanically, nanotubes are among the strongest and most resilient materials known in nature. CNT Young’s modulus is on the order of TPa with tensile strength two orders of magnitude higher than that of steel [346]. Electronically, CNTs can be metallic, semiconducting, or small-gap semiconducting (SGS) [347]. Qian et al. reviewed theoretical predictions and experimental techniques that are widely used for visualization, manipulation, and measurements of mechanical properties of CNTs [348]. Most experiments use an AFM tip to deflect a CNT suspended over a trench and several experiments have measured electromechanical properties of CNTs [349]–[351]. The piezoresistance is attributed to energy band shifts and is observed as a shift in nonlinear CNT I-V curves. Fung et al. integrated bundled strands of CNT on polymer-based diaphragms of microfabricated pressure sensors using dielectrophoretic (DEP) nanoassembly [352]. Grow et al. reported measurements of the electromechanical response of CNTs adhered to pressurized membranes [353]. Single-tube CNTs adhered to silicon nitride membranes by van der Waals interactions, were electrically connected in-situ and assumed to experience the same strain as the membrane (Fig. 35). The conductivity of the CNT decreased as the membrane was pressurized (0 ~ 15 psi). This CNT pressure sensor had a resolution of 1 psi with CNT gauge factors of 400 and 850 for semiconducting and SGS tubes, respectively. Possible applications include integration of nanotubes on or in a variety of substrates, including flexible plastics. Chiamori et al. [354] incorporated single-wall nanotubes (SWNT) into the negative resist material, SU-8, and investigated the SU-8/SWNT nano-composite electromechanical properties, such as effective Young’s modulus and piezoresistivity. We found a gauge factor of 2–4 for the 1–5 wt% (weight percent) SU-8/SWNT composite and an effective Young’s modulus of about 0.5 GPa for the 1 wt% composite. Complete reviews of electromechanical properties and other applications of CNT are available elsewhere [347], [355], [356].

Fig. 35.

Fig. 35

(a) Schematic of a CNT device on a membrane (b) Optical microscope image of a membrane with electrodes (c) Zoomed in image of devices near the edge of a membrane (d) SEM Image of a CNT crossing the gap between two electrodes (~800 nm). Reprinted with permission from Grow [353]. © 2005 American Institute of Physics.

D. Nanowires

Nanowires, also known as quantum wires, are electrically conducting wires, in which quantum transport effects are important. As the width of the wire is reduced to Fermi wavelength scale, the conductance between the electrodes connected by the nanowire is quantized in steps of 2e2/h (where e is the charge of the electron and h is the Planck’s constant) and conductance is no longer dependent on the length of the wire [357]. Different types of nanowires, e.g., metallic, semiconducting, insulating, and molecular (organic and inorganic) have different electromechanical properties. Nanoindentation is a popular method to determine the hardness and elastic modulus of nanowires, such as gallium nitride (GaN) and zinc oxide (ZnO) nanowires, tantalum oxide (Ta2O5) nanowires, single-crystal and polycrystalline copper nanowires, and gold nanowires [357]–[362]. Zhu and Espinosa, Desai et al., and Lu et al. have also developed MEMS experimental test beds for electromechanical testing of nanowires [359], [362], [363].

To date, relatively few reports on the development of silicon nanowire-based sensors are available [364]. However, p-type single crystalline silicon nanowires have been studied for sensor applications [365], [366]. Separation by implanted oxygen (SIMOX), thermal diffusion, electron beam (EB) direct writing, and reactive ion etching (RIE) have been used to fabricate silicon nanowire piezoresistors [365]. Both the longitudinal and transverse piezoresistive coefficients, πl[011] and πt[011], are dependant on the cross sectional area of the nanowires. The πl[011] of the nanowire piezoresistors increased (up to 60%) with a decrease in the cross sectional area, while πt[011] decreased with a decrease in the cross sectional area (Fig. 36). The enhancement behavior of the πl[011] was explained qualitatively using 1-D hole transfer and hole conduction mass shift mechanisms. The decrease in the πt[011] with decrease in the cross sectional area is due to decrease in the stress transmission from substrate to the nanowire. The maximum value, πl[011] of 48 × 10−11 Pa−1 at a surface concentration of 5 × 1019 cm−3, suggests enough sensitivity for sensing applications. Dao et al. incorporated these p-type silicon nanowires as piezoresistive elements in a miniaturized 3-degrees-of-freedom (3-DOF) accelerometer [367]. Roukes and Tang patented strain sensors based on cantilever-embedded nanowire-piezoresistor wires and ultra-high density free-standing nanowire arrays [368].

Fig. 36.

Fig. 36

Size (cross sectional area) effect on longitudinal and transverse piezoresistive coefficients in boron-doped nanowires fabricated using electron beam (EB) lithography and reactive-ion-etching (RIE). After Toriyama [366]. © 2002 IEEE.

He and Yang reported on very large piezoresistance effect (commonly referred to as “giant piezoresistance”) in p-type silicon nanowires, particularly in the 〈111〉 direction [369]. The measured piezoresistance values were a function of the nanowires diameters and resistivities, with the largest value of −3550 × 10−11 Pa−1 in the longitudinal direction. Silicon nanowires in the 〈111〉 direction, with diameters of 50–350 nm and resistivities of 0.003–10 Ω cm, were grown and anchored to a silicon substrate (from SOI wafers) to form a bridge structure (Fig. 37) and uniaxial stress was applied to the nanowires using a four-point bending setup. Cao et al. explained the giant piezoresistance phenomenon in 〈111〉 silicon nanowires based on a first-principles density-functional analysis and identified “the strain-induced band switch between two surface states, caused by unusual relaxation behavior in the surface region,” as the key contributor [370]. Their model and calculations captured all the main features of the experimental results by He and Yang. Following the experimental results from He and Yang, Reck et al. used a lift-off and an electron beam lithography (EBL) technique to fabricate silicon test chips and study the piezoresistive properties of crystalline and polycrystalline nanowires as a function of stress and temperature [371]. Compared to the bulk silicon’s piezoresistive effect, they found a 633% and 34% increase in piezoresistive effect for the crystalline and polysilicon nanowires, respectively. They also found that the piezoresistive effect greatly increases as the nanowire diameter decreases, consistent with the results from He and Yang [369].

Fig. 37.

Fig. 37

(a) A 〈111〉 nanowire grown and anchored onto a silicon substrate. (b) morphology of a bridged nanowire along the 〈111〉 direction. (c) Transmission Electron Microscopy (TEM) images of the left joint between the sidewall and the nanowire bridge. (d) Longitudinal piezoresistive coefficients of 〈111〉 nanowires as a function of the nanowire diameter and resistivity. Piezoresistive coefficients from bulk silicon are also included. The scale bars in (a)–(c) are 2 μm, 500 nm, and 100 nm, respectively. From He and Yang [369]. Reprinted with permission from Macmillan Publishers Ltd.: Nature Nanotechnology [369] © 2006.

V. CONCLUSION

With the discovery of the large piezoresistive coefficients in silicon in 1954, the study of piezoresistance moved from scientific inquiry of a material property to extensive investigation, development and commercialization. Piezoresistor development largely followed that of the mainstream semiconductor industry. Integration of piezoresistors with micromachined flexure elements enabled widespread implementation of these MEMS sensors. Piezoresistance has become a fundamental sensing modality in the toolbox of MEMS sensor designers. Recent research focuses on driving to the nanoscale, using high band gap semiconductors to make high pressure, high temperature sensors, and applying piezoresistive cantilevers to biological and chemical sensing. Building on over fifty years of research, the field remains active and vibrant.

Acknowledgments

Research in the Pruitt Microsystems Laboratory related to piezoresistance has been supported by the National Science Foundation under awards ECCS-0708031, ECS-0449400, CTS-0428889, ECS-0425914, and PHY-0425897 and the National Institutes of Health under award R01 EB006745-01A1.

The authors are grateful to Dr. M. A. Hopcroft, Dr. M. Doelle, P. Ponce, N. Harjee, S.-J. Park, and P. Lim for helpful discussions.

Biographies

graphic file with name nihms178656b1.gif

A. Alvin Barlian received the B.S. degree with Honors and Distinction from Purdue University, West Lafayette, IN, in 2001 and the M.S. and Ph.D. degrees from Stanford University, Stanford, CA, in 2003 and 2009, respectively, all in mechanical engineering.

His doctoral research focused on the development of micro-fabricated piezoresistive shear stress sensors for harsh liquid environments, characterization of microfabricated piezoresistive cantilevers for force sensing applications, and a novel sidewall epitaxial piezoresistor fabrication process for in-plane force sensing applications (U.S. patent, pending). In 2008, he worked on the characterization of capacitive RF MEMS switches as an Interim Engineering Intern with the Technology R&D Department at Qualcomm MEMS Technologies.

In 2007, he was presented the Centennial Teaching Assistant Award by Stanford University for his efforts in co-developing a micro/nanofabrication laboratory course at Stanford University. In 2005, he received the Best Poster Award for the most outstanding poster presentation at the International Mechanical Engineering Congress and Exposition in Orlando, FL. In 2001, he was inducted into the Honor Society of Phi Kappa Phi and he received the John M. Bruce Memorial Scholarship from Purdue University. He was the P.T. Caltex Pacific Indonesia scholar from 1998 to 2002.

graphic file with name nihms178656b2.gif

Woo-Tae Park received the B.S. degree in mechanical design from Sungkyunkwan University, Seoul, Korea, in 2000, the M.S. and Ph.D. degrees in mechanical engineering from Stanford University, Stanford, CA, in 2002 and 2006 respectively.

For his graduate degree work, he worked on optical measurements for electrical contact deformation, wafer scale encapsulated MEMS devices, and submillimeter piezoresistive accelerometers for biomedical applications. After graduation, he started as a senior packaging engineer at Intel, designing silicon test chips for assembly, test, and reliability. He is now with Freescale semiconductor, working on MEMS process development in the Sensor and Actuator Solutions Division. Dr. Park has authored seven journal papers, fifteen conference papers and holds one patent.

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Joseph R. Mallon, Jr. received the B.S. degree in science (cum laude) from the Fairleigh Dickinson University and the MBA degree in Management, Marketing and New Venture from California State University, Hayward, CA. From 1965 to 1985, Mr. Mallon was the Vice President of Engineering for Kulite Semiconductor Products, one of the earliest MEMS sensor companies. From 1985 to 1993, he was the Co-President, COO, Co-Founder, and Director of NovaSensor, a venture funded Silicon Valley firm that helped establish MEMS as a widely known and commercial technology. Mr. Mallon was the Chairman and CEO of Measurement Specialties, a publicly traded sensor manufacturer, from 1995 until 2002. Currently he is studying and doing research at Stanford University along with his position as the CEO of axept. Mr. Mallon is a pioneer in MEMS technology with forty-five patents and over sixty technical papers and presentations.

graphic file with name nihms178656b4.gif

Ali J. Rastegar received the B.S. and M.S. degrees in electrical engineering from the Worcester Polytechnic Institute in 1982 and 1984, respectively. He then joined Analog Devices as an integrated circuit design engineer where he developed several high-speed, state of the art analog-to-digital converters. In 1992, he founded MCA-technologies which was purchased by Maxim integrated products in 1997. In 2001 Mr. Rastegar became fascinated with the information storage capabilities of living cells and decided to further his understanding by pursuing the Ph.D. degree and joining the Stanford Microsystems Laboratory. Mr. Rastegar has designed more than 54 integrated circuits and holds eight issued U.S. patents.

graphic file with name nihms178656b5.gif

Beth L. Pruitt (B.S. MIT 1991, M.S. 1992 and Ph.D. 2002 Stanford University) developed Piezoresistive Cantilevers For Characterizing Thin-Film Gold Electrical Contacts during her Ph.D. In 2002 she worked on nanostencils and polymer MEMS in the Laboratory for Microsystems and Nanoengineering at the Swiss Federal Institute of Technology (EPFL). She joined the Mechanical Engineering faculty of Stanford in Fall 2003 and started the Stanford Microsystems Lab. Her research includes piezoresistance, MEMS and Manufacturing, micromechanical characterization techniques, biomechanics of mechanotransduction, the development of processes, sensors and actuators as well as the analysis, design, and control of integrated electro-mechanical systems. Her research includes instrumenting and interfacing devices between the micro and macro scale, understanding the scaling properties of physical and material processes and finding ways to reproduce and propagate new technologies efficiently and repeatably at the macro-scale.

Prior to her Ph.D. at Stanford, Beth Pruitt was an officer in the U.S. Navy, at the engineering headquarters for nuclear programs and as a Systems Engineering instructor at the U.S. Naval Academy, where she also taught offshore sailing.

Footnotes

This paper provides a comprehensive overview of integrated piezoresistor technology with an introduction to the physics of piezoresistivity, process and material selection and design guidance useful to researchers and device engineers.

Contributor Information

A. Alvin Barlian, Email: barlian@stanfordalumni.org.

Woo-Tae Park, Email: wtpark@mems.stanford.edu.

Joseph R. Mallon, Jr, Email: mallon@stanford.edu.

Ali J. Rastegar, Email: alir1@stanford.edu.

Beth L. Pruitt, Email: pruitt@stanford.edu.

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