Field-effect-tuned lateral organic diodes

Abstract

The operation of organic diodes in solar cells and light-emitting displays strongly depends on the properties of the interfaces between hole- and electron-carrying organic semiconductors. Such interfaces are difficult to characterize, as they are usually buried under the surface or exist as an irregular “bulk heterojunction.” Using a unique fluorinated barrier layer-based lithographic technique, we fabricated a lateral organic p-n junction, allowing the first observation of the potential at an organic p-n interface simultaneously with the charge transport measurements. We find that the diode characteristics of the device (current output and rectification ratio) are consistent with the changes in the surface potentials near the junction, and the current-voltage curves and junction potentials are strongly and self-consistently modulated by a third, gate electrode. The generality of our technique makes this an attractive method to investigate the physics of organic semiconductor junctions. The lithographic technique is applicable to a wide variety of soft material patterns. The observation of built-in potentials makes an important connection between organic junctions and textbook descriptions of inorganic devices. Finally, these kinds of potentials may prove to be controlling factors in charge separation efficiency in organic photovoltaics.

The field of organic semiconductor-based electronics has made remarkable progress in the last three decades. Heterojunctions based on organic semiconductors are the active elements of organic light-emitting diodes (OLEDs) and organic photovoltaic cells, and the performance parameters of these devices (1, 2) have been steadily improving since their first reports (3–5). The interfaces between different types of materials play a crucial role in the functioning of these devices (6–9), and there is a strong need to understand the physics at the interfaces to ensure further progress. In order to achieve higher interfacial area, most organic heterojunction devices are prepared as vertical bilayers, or as phase-separated blends. Because of the “buried” nature of interfaces in vertical or bulk heterostructures, it has been difficult to study key properties, such as conductivity, dielectric constant, morphology, and surface potential on both sides of the interfaces in the same device. Photoemission spectroscopy technologies (namely, ultraviolet photoemission spectroscopy and its variant, inverse photoemission spectroscopy) have been used to investigate the modulation of orbital energies at such interfaces with good accuracy (10–14), but not simultaneously with transport measurements.

Here we report the fabrication and the characterization of laterally defined organic heterojunction diodes. The lateral geometry allowed us to apply a transverse field through a third terminal (gate) at the back of the substrate, and the surface potentials at the junction were probed directly using scanning Kelvin probe microscopy (SKPM) while the device was in operation. Recent reports showed a lateral organic heterostructure device acting as a bipolar transistor (15) and another as an OLED where light emission intensity could be controlled by the gate (16), but the organic semiconductor thin films overlapped significantly and no rectification behavior was reported. In general, little is known about the physics that underlies the operation of these devices, such as the positions of interface states and Fermi levels (or alignment of quasi-Fermi levels) at the heterojunction (17). Measurements of the surface potential through SKPM reflect the local density of states (18) and can offer substantial insight into the operation of organic devices (19).

Results

The lateral organic diode consists of a hole-transporting polymer poly (3-hexylthiophene) (P3HT) (supplied by Plextronics, Inc.) and a derivative of an electron-transporting small molecule, a naphthalene tetracarboxydiimide (NTCDI) (20), as shown schematically in Fig. 1A. The materials were chosen to have sufficient lateral charge carrier mobility and show large gate-field-effect response in transistors. The devices were fabricated using a nondamaging lithographic patterning technique, shown in Fig. 1B. The critical element of this technique is the use of fluorinated barrier layers (to protect the underlying organic semiconductor) that are soluble only in fluorinated solvents, which in turn are completely orthogonal to any other nonfluorinated or partially fluorinated material. The lithographic patterning ensured that the junction had no overlap or mixing of the two semiconductors, within the limits of the photolithography, as confirmed by the SKPM results discussed below. Such orthogonality has been demonstrated for photoresists used with organic electronic materials (21, 22). The details of the fabrication can be found in the Materials and Methods section.

Fig. 1.

(A) Schematic diagram of the lateral heterojunction diode, also showing the molecular structures and their energy level diagrams before heterojunction formation. (B) Fabrication process steps of lateral diodes. Here, the first organic semiconductor is the NTCDI and the second is the P3HT. (C) Transfer characteristics of the P3HT:P3HT homojunction transistor along with those of individual P3HT films.

As a control, we prepared samples with P3HT spin coated on both sides but using P3HT of different purity on each side, obtained from Plextronics and from Aldrich. Fig. 1C shows the transfer characteristics (current versus gate voltage at constant lateral voltage) of the transistor that includes regions of both P3HT films in series as well as transistors including only individual P3HT films. As expected, the transfer characteristics of the transistor which comprises regions of both films shows intermediate currents compared to those made from the individual films, which differed because of the different doping levels (and possibly the crystallinity) of the two grades of P3HT. This control experiment clearly illustrates the good electrical continuity of the junction and the lack of degradation from the lithographic patterning technique (23). The leakage currents through the underlying dielectric in all the devices were of the order of nA, while the lowest lateral currents in any of the devices was at least an order of magnitude higher. Field-effect measurements and SKPM on thin films of each organic semiconductor with Au contacts showed that the metal/organic semiconductor contacts were not contributing to the rectification in diode measurements (24–27) (SI Text and Figs. S1, S2).

Fig. 2A shows the current-voltage characteristics of a lateral organic diode at different gate voltages. It is clear that the application of a gate voltage can modulate both the forward and the reverse bias currents by orders of magnitude. A positive gate bias of +20 V (blue curve) causes both the forward and reverse current to increase by an order of magnitude as compared to the zero gate bias case (black curve). With a further increment in gate bias to +40 V (green curve) and +60 V (red curve), both the forward and reverse currents decrease to lower values. However, the rectification ratios (current at the maximum forward bias/current at the same magnitude reverse bias) continue to increase sharply with the gate voltage as seen in Fig. 2B, reaching a maximum at about 50 V before starting to drop with further increase of the gate bias. With the application of negative bias, both the forward and reverse currents increase by two orders of magnitude and the rectification ratio decreases. The change of the rectification ratio due to negative gate bias is less steep compared to positive gate bias.

Fig. 2.

(A) Semilogarithmic I–V curves for different gate voltages on a lateral diode. (B) Rectification ratio of the diode as a function of gate voltage.

In order to correlate the changes in the diode characteristics with the electrochemical potentials at the heterojunction, we measured the surface potentials at the interface between P3HT and NTCDI as a function of gate bias using SKPM. SKPM tracks the local variations in the surface potential of a semiconductor by reporting the differences in the local electrochemical potential as the tip scans the surface at some small distance above the junction. The comparison of the surface potential measured by SKPM on each side of the junction gives (at ∼100-nm lateral resolution) the chemical potential difference (CPD) on the two sides of the junction, which equals the local vacuum level shift at the heterojunction [caused by band bending or an interface dipole (28)]. Both SKPM and electric force microscopy (EFM) have been widely used to investigate the physics of inorganic semiconductor devices (29) , organic semiconductor devices (24, 26, 30–36), and ionic devices (37–39). The lateral geometry of our diodes gives us easy access to the active interface, allowing us to use SKPM to characterize the interfacial CPD as a function of injected charge.

Fig. 3A shows the surface potential across the heterojunction for repeated scans at zero gate voltage. This step of ∼0.2 V is highly reproducible and of the same order of magnitude in all measured devices. The surface potential difference across the junction as a function of the applied lateral voltage is shown in Fig. 3B. At positive voltages (forward bias), when current is flowing more easily through the device, electrons flow from the n side to the p side (and holes flow from p to n), causing the CPD to decrease. This decrease is reflected in the smaller step in the measured surface potential on the two sides of the interface. On the other hand, for large negative (reverse) bias, carriers are pushed in the direction that adds further to the junction potential, and CPD increases.

Fig. 3.

(A) Built-in potential of the junction with no applied bias. (B) Variation of built-in potential with applied lateral voltage (forward and reverse) and gate terminal grounded. (C) Variation of built-in potential with gate voltage applied and lateral voltage fixed to zero. In all plots, left side is 5FPE-NTCDI (n-type) and right side is P3HT (p-type).

Fig. 3C shows the plots of the surface potential across the interface for different values of gate bias while the two terminals of the diode are grounded. With the application of gate bias, the CPD increases to a maximum of 0.7 eV for a +20 V gate bias and decreases to 0.05 eV for a negative gate bias of -20 V. This set of data shows an increase in built-in potential for a positive gate bias and a decrease for negative gate bias, which correlates with the increase in rectification ratio of the diode for a positive gate bias and decreased rectification ratio for negative gate bias shown in Fig. 2B.

Discussion

The electrical characteristics shown in Fig. 2A can be explained by considering the lateral diode as a heterojunction barrier in conjunction with two series resistances (40) (one on the 5FPE-NTCDI side and the other on the P3HT side). While the voltage drop across the heterojunction as seen in the SKPM is in the range of 0.1–1 V, we apply voltages up to 60 V. This is because the device length (∼200 μm) is orders of magnitude greater than the extent of the junction region [∼10 nm, though the limit of SKPM resolution is ca. 100 nm (31)]. Most of the voltage drop across the diode occurs across the series resistances, as shown in SI Text and Table S1. Application of a gate bias causes increases in both the currents and the rectification ratios, attributed respectively to changes in the series resistance on each side of junction, and in the voltage barrier at the junction. Reproducibility is shown in Table S2.

Hole conductivity is much higher in the P3HT as deposited, compared to the electron conductivity in initially deposited 5FPE-NTCDI, because of the inevitable doping of P3HT in air. Hence, for the zero gate bias we explain the forward-bias diode characteristics as dominated by hole injection from P3HT into NTCDI. As shown in the SI Text and Fig. S3, the reverse current shows a soft breakdown because of recombination and tunneling via interface states, a common characteristic of heterojunction diodes (41). For a positive gate bias, after a threshold voltage (∼10 V), the mobility and conductivity of electrons in NTCDI increase by up to 4 orders of magnitude and hence the series resistance on the NTCDI side drops. Simultaneously, the series resistance on the P3HT side increases because of partial depletion of holes, but this increase is not as striking, because the hole channel on the P3HT side never completely turns off. As a result, the output current increases. After a further increment in gate bias, the effect of the increase in built-in potential at the junction overcomes the decrease in the series resistance on the NTCDI side. Hence the currents decrease and the rectification ratio continues to increase. When a negative gate bias is applied, holes are accumulated in the channel. The hole conductivity on the P3HT side increases drastically, causing more efficient hole injection across the heterojunction. Simultaneously, as observed in the SKPM scans, the barrier at the junction decreases. Thus both the forward and reverse currents increase to much higher values as compared to the zero bias case, and the rectification ratio decreases. In the negative bias case, only hole injection need be considered, because at negative bias, the electrons are depleted from the channel and hence their contribution to conductivity would be limited even if their injection from the Au into 5FPE-NTCDI were very efficient.

In general, positive gate bias should raise the chemical potential in a semiconductor, bringing it closer to the lowest unoccupied molecular orbital, and a negative gate bias should lower the chemical potential and bring it closer to the highest occupied molecular orbital, as compensating charge defined by the gate capacitance flows from the top electrodes to the semiconductor-dielectric interfaces. However, different materials would have different shifts in chemical potential as a result of a given gate bias, owing to different dielectric constants, density of states (DOS) at particular energies, and impurity concentrations (18). The relative shift in the chemical potentials on the two sides of a heterojunction will dictate the change in the CPD as a function of gate bias. If both sides of a heterojunction display the same chemical potential shift for a given quantity of compensating charge, then we would observe no change in the chemical potential difference. However, if at a positive gate voltage, the CPD increases from the zero gate bias case, this implies that electrons are accumulated into states encompassing a wider range of energies in the n-type material than the range of energies in which holes are depleted in the p-type material, resulting in a greater rise in chemical potential on the n side than on the p side. The reequilibration of these chemical potentials across the junction results in a more positive surface potential on the n side relative to the p side, as some of the higher-energy electrons drift from the n side to the p side. The latter situation pertains to the heterojunction under study (P3HT/5FPE-NTCDI). Furthermore, hole sites are depleted over a wider energy range in 5FPE-NTCDI than are accumulated in P3HT (perhaps because the P3HT is already doped) on application of a negative gate bias. Our results imply that 5FPE-NTCDI has a wider Gaussian-type DOS (42–44) relative to P3HT.

Conclusions

We have prepared predominantly lateral organic heterostructure diodes using a unique and generally applicable lithographic technique, which can be used to pattern films of soft matter without degradation of physical properties. We show that the electrical characteristics of lateral organic diodes can be tuned by applying a voltage using a gate terminal in a field-effect transistor configuration. As a result, we have achieved a modulation of rectification ratio of almost two orders of magnitude and a simultaneous increase in the forward and reverse currents. SKPM of the junction interface showed the presence of a built-in potential, the magnitude of which is consistent with previous determinations (45), can be modulated by application of the gate bias, and which responds as predicted to the application of forward and reverse bias. SKPM data also correlate well with the trend in rectification ratios of the diode as a function of gate bias, and the analysis points to the relative width of the tail of the density of states distribution in the materials on the two sides of the heterojunction.

Furthermore, laterally defined heterojunction diodes can potentially be used as a readily accessible tool for field-dependent observation of the electronic barriers at organic heterojunctions, which may be important to the charge carrier separation efficiencies of organic solar cells (46). SKPM (33, 35), EFM (32), and photoconductive atomic force microscopy (PC-AFM) (47) have already been applied to characterize the bulk heterojunction blends used typically in organic solar cells. Successful correlations were made in those references between performance parameters and the solar cell morphology, energy levels, and so on. However, the domains of the best polymer solar cells are on the scale of 10–30 nm, while the resolution of SKPM is ∼100 nm. Further, because of the three-dimensional nature of the phase-separated blend, one cannot be sure that the observed energy levels at one location of a blend film, identified with a particular component, do not reflect contributions from another component which might be lying beneath it. Using PC-AFM (47) on a lateral diode, correlations between the performance and interfacial voltage of a particular donor/acceptor material combination can be made independent of the morphology of the bulk heterojunction. Photoinduced processes can also be studied with application of bias to the terminals of the lateral diode—giving the electric field dependence of the concentration of charge carriers on each side of the junction—a related parameter that also helps determine charge separation efficiency.

Materials and methods

Lateral Diode Fabrication.

The substrates used were highly doped silicon wafers with 300 nm thermally grown SiO₂. A 50 nm 5FPE-NTCDI film was thermally evaporated in a high vacuum chamber (10^-6 mtorr) at a rate of 0.3–0.5 Å/s at a substrate temperature of 120 °C. CYTOP (Asahi Glass Company) was spin coated on top of the film and the photolithographic patterning was done using a standard photoresist (Shipley S1813) film on top and exposed to UV light through a mask. The pattern in the photoresist was then transferred to the underlying layer of CYTOP and 5FPE-NTCDI using O₂ plasma treatment for 1 min on medium power. A P3HT film was spin coated from solution in 1,2-dichlorobenzene (10 mg/ml) at 1,500 rpm for 90 s. A 130 nm film of perfluoroeicosane (PFI) was then thermally evaporated on the samples in a vacuum chamber at a rate of 1 Å/s. The samples were immersed in acetone to lift off the photoresist on top of the 5FPE-NTCDI/CYTOP stack. With PFI protecting the P3HT region and the high hydrophobicity of both fluorinated barrier layers, there was no damage done to the organic films beneath the barrier layers during the acetone treatment. The samples were then washed with perfluorodecalin to remove the barrier layers and uncover the heterojunction. AFM images of the junction and separate components are shown in Fig. S4. After fabricating the lateral heterojunction, gold electrodes were thermally evaporated in a vacuum chamber as top contacts using a metal shadow mask with separation of 200 μm. In the above method, both CYTOP and perfluoroicosane can be used interchangeably with the flexibility that the former can be spin coated and the latter can be thermally evaporated under high vacuum. This technique is a general method to pattern any soft matter films using photolithography and completely retain all the functional properties of the film. A recently reported method similar to ours uses unique fluorinated photoresist which on UV exposure is soluble in supercritical CO₂ or fluorinated solvents (48). That method in principle would be equally effective but would need specialized resist not available commercially.

P3HT/P3HT Homojunction Fabrication.

The fabrication steps were similar to the method reported in the Results. The first P3HT film was spin coated from a 10 mg/ml solution of P3HT in 1, 2 dichlorobenzene at 1,500 rpm and annealed in a glove box at 120 °C for 20 min. The second P3HT film was spin coated from a 6 mg/ml solution in 1, 2 dichlorobenzene at 800 rpm. We measured the transistor characteristics of the films on each side as well as the transistor which includes the junction. All the measurements were performed in air. Due to doping of P3HT in air, the transistors do not turn off completely even at a depletion gate voltage of +60 V.