Back-Side Readout Silicon Photomultiplier

Abstract

We present a novel structure for the back-side readout silicon photomultipler (SiPM). Current SiPMs are front-illuminated structures with front-side readout, which have relatively small geometric fill factor leading to degradation in their photon detection efficiency (PDE). Back-side readout devices will provide an advantageous solution to achieve high PDE. We designed and investigated a novel structure that would allow back-side readout while creating a region of high electric field optimized for avalanche breakdown. In addition, this structure has relatively high fill factor and also allow direct coupling of individual micro-cell of the SiPM to application-specific integrated circuits. We will discuss the performance that can be attained with this structure through device simulation and the process flow that can be used to fabricate this structure through process simulation.

I. Introduction

A very promising recent development in the design of solid-state photodetector is the silicon photomultiplier (SiPM) [1–5], which is capable of single photon detection and operation inside magnetic fields. SiPM has been considered as an alternative to photomultiplier tubes (PMTs) in many applications ranging from radionuclide imaging in single-photon emission computed tomography (SPECT) and positron emission tomography (PET) to particle physics, nuclear physics, and astrosphysics. An SiPM is a large number of small identical avalanche photodiodes (micro-cells) operating in Geiger-mode arranged in a matrix. It is also known by many names: metal-resistor-semiconductor avalanche photodiode (MRS APD), micro-pixel avalanche photodode (MAPD), multi-pixel photon counter (MPPC), Geiger-mode APD (G-APD), solid-state photomultiplier (SSPM), etc. Many research groups and commercial manufacturers have developed their versions of SiPM. Each micro-cell of an SiPM has dimensions typically ranging from 10 μm to 100 μm. Each micro-cell operates as independent photon counter in Geiger-mode (the operating voltage is biased 5–20% above the breakdown voltage). A photon impinging on one cell can create free carriers that can give rise to a Geiger-mode discharge. This discharge is quenched when the micro-cell’s voltage drops below the breakdown voltage when the discharge current passes through an integrated quenching resistor. The cell is a binary device since the signal from a micro-cell has approximately the same shape and amplitude. The discharge currents from all micro-cells are added on a common load resistor; therefore, the output signal of a SiPM is the sum of the signals from all the micro-cells firing at the same time. Recently, SiPMs have received a lot of interest because of some of their key features: high gain (10⁵ to 10⁶), low bias voltage (< 100 V), insensitivity to magnetic fields, good timing resolution, low power consumption, and they can be fabricated using CMOS technology, which can potentially reduce the cost of these devices.

A recent development in SiPMs has combined electronics block next to each micro-cell to detect the photons. This electronics block contains active quenching and recharge circuitry, a one-bit memory to enable and disable the corresponding micro cell, and trigger signals to on-chip time-to-digital converter and counter [6].

One drawback of current designs of SiPMs is that the signals are read out from the front-side of the device. Quenching resistive structures fabricated on the front surface of the device often reduces the active area for photon detection. In addition, any other components (active or passive) fabricated on this front surface would limit the active area. Generally, current SiPM with small micro-cell size has relatively small fill factor (the fraction of total area occupied by the active micro-cell areas), which reduces the photon detection efficiency (PDE). The PDE of SiPMs is given by the product of the quantum efficiency, the geometric fill factor, and the probability of an incoming photon triggerring a breakdown.

SiPMs with integrated bulk quenching resistors have recently been developed to improve their fill factor [7–8]. Since there is no polysilicon resistors or metal lines on the front-side, the active area for photon detection is increased. However, the signals are still added on a continuous electrode common to all micro-cells and read out on the front-side.

We propose a design of the SiPM that increases the fill factor and consequently, the PDE by bringing the electronic signal from each micro-cell of the SiPM to the back side of the structure. In addition, active or passive components can be fabricated on the back side without affecting the active area of the micro-cell on the front-side where the incident photons are impinging. Since the electronic signals from the micro-cells are brought out to the back side, they can also be coupled to an application-specific integrated circuit (ASIC) for signal processing. In this paper, we use the TCAD tools from Synopsys [9] to determine the electrical and optical properties of this new structure.

II. Back-Side Readout SiPM

Fig. 1 shows schematically the structure of a single micro-cell of the back-side readout SiPM. The structure starts with a p-type substrate. In order to read out the signal from the back side, a column is etched out from the bottom to the top stopping short of the surface. Then the column is filled and doped with n+ polysilicon to serve as electrode. An n+ region is implanted into the front surface of the substrate to define the anode of the micro-cell. Then a p-type epitaxy silicon layer is deposited on the front surface of the substrate. A higher p-type doping is implanted into the epitaxy layer to define the avalanche region. A thin highly-doped p+ layer is then deposited on the front to serve as an ohmic contact. Since the p+ contact on the front surface is non-structured, there are no metal lines within the active area of the micro-cell. In addition, the gaps between the micro-cells can be small to maximize the PDE.

Fig. 1.

Schematic structure of the back-side SiPM with n+ column readout, and p-type substrate and epitaxy layer.

Another advantage of the back-side SiPM is that passive and/or active circuitries can be implemented on the back side or on a separate ASIC for signal processing (analog and/or digital) without affecting the PDE. For example, quenching circuitry can be implemented to stop the avalanche breakdown and recharge the micro-cell. Fig. 2 shows each micro-cell of the back-side readout SiPM bump-bonded to an ASIC with matching pads. This hybrid approach would allow the SiPM and ASIC to be separately optimized and fabricated. Furthermore, array of SiPMs can be bump-bonded to a large area readout ASIC to make a large detection area as depicted in Fig. 3.

Fig. 2.

Schematic of a back-side readout SiPM bump-bonded to a readout ASIC.

Fig. 3.

Schematic of an array of back-side readout SiPMs bump-bonded to a large area readout ASIC.

III. TCAD Simulation

All process and device simulations are performed on a back-side readout SiPM with n+ column readout, and p-type substrate and epitaxy layer. Unless otherwise stated, the simulations are performed in 2-D at room temperature and on half of a micro-cell.

A. Doping Profile and Depletion Region

Fig. 4 shows the cross-section of the doping profile of the front side and back side of a back-side readout SiPM after running the simulation through a realistic process flow. The column is etched anisotropically through the substrate, stopping short of the surface and the n+ implant. Columns with aspect ratio as high as 25:1 have been fabricated using Inductively Coupled Plasma etching [10–11]. After filling and doping the column, the dopants diffuse out of the column into the substrate during the annealing process. The gap between the column and the n+ region has to be small enough such that it is not depleted to maintain a good electrical connection to the n+ region, while large enough such that it does not affect the doping profile across the p-n junction in the micro-cell.

Fig. 4.

Cross-section of the doping profile of the front-side (top) and backside (bottom) of half of a micro-cell of a back-side readout SiPM.)

In the simulation, a negative bias voltage is applied to the p+ contact from zero to −40 V. The avalanche region of the p-n junction is fully depleted below −20 V. The depletion region extends across the epitaxy layer encompassing the n+ anode all the way down the n-type polysilicon column to the bottom surface isolating the individual micro-cell. On the back side, a layer of SiO₂ is deposited on the surface between the n+ polysilicon electrodes. This oxide layer contains trapped positive charges, which can attract electrons to the Si-SiO₂ interface shorting the n+ electrodes together. Because SiPM devices are often used in radiation detection applications in the presence of ionizing radiation, this fixed positive oxide charge tends to increase with ionizing radiation eventually saturating at a density of about 10¹² cm⁻² [12]. A common approach to interrupting this electron layer is to use a p-type implant between the n+ columns, which is also known as a p-stop [13–14].

In the simulation, the micro-cell size is 40 μm × 40 μm, and the gap between the p implant and the edge of the micro-cell is 2 um yielding a fill factor of about 90%. The fill factor would be greater than 90% as the micro-cell size increases because the gap between the p implant and the edge of the micro-cell remains at 2 μm.

B. Electric Field

Fig. 5 shows the cross-section of the electric field profile of the front side of a back-side readout SiPM. The high field region at the p-n junction is confined to the p-type region, which is slightly smaller in size than the n+ region. This structure decreases the field at the edges to prevent premature breakdown. Since the p-n junction wraps around the n+ region, there is a low field junction surrounding the rest of the n+ region because of the lower background doping. Therefore, free carriers generated from the bulk crossing through the low-field junction will not contribute to the dark count rate.

Fig. 5.

Cross-section of the electric field profile of the front-side of half of a micro-cell of a back-side readout SiPM.

The simulation shows that the field at the edge is about 27% lower than the high-field region at the p-n junction. However, the simulation is performed in 2-D, which implies that the calculated field at the edge is more representative of a cylindrical junction. In a real 3-D device, the corner of the junction is a spherical region. Since a spherical region of a junction has a higher field intensity than a cylindrical region, the calculated field at the edge need to be extrapolated to a spherical junction to validate that the field at the corner in a 3-D device is still low enough to prevent premature breakdown. The annealing process rounds the edges resulting in relatively large radius of curvature as shown in Fig. 4, which reduces the field at the edge when compared to a sharp edge. Simple numerical calculations implies that the increase in the fields from a cylindrical junction to a spherical junction [15] are low enough to prevent premature breakdown for reasonable values of the ratio of the radius of curvature of the junction to the depletion width that represent the edge junction of the simulated structure. In addition, preliminary 3-D simulations seem to validate that the fields at the corners is low enough to prevent premature breakdown.

C. I-V and C-V Characteristics

Fig. 6 and 7 show the leakage current and capacitance as a function of the bias voltage. The leakage is reported as ampere per mm² and the capacitance is for one micro-cell. The breakdown voltage is around −30 V. The calculated breakdown voltage is normally under-estimated because the local field model used in the simulation predicts higher impact ionization rates [16].

Fig. 6.

I–V characteristic of a back-side readout SiPM.

Fig. 7.

C–V characteristic of a back-side readout SiPM.

The capacitance is calculated to be about 130 fF, which is consistent with a depletion depth of about 1.2 μm and a micro-cell area of 40 μm × 40 μm.

D. Quantum Efficiency

In the quantum efficiency (Q.E.) simulation, a non-structured version of the back-side SiPM is used. So, the calculated Q.E. does not include the loss due to the fill factor as well as the loss due to the probability of triggering an avalanche breakdown, which is dependent on the overvoltage and the position where the primary carriers are generated [17]. The simulation is performed with no avalanche model and thus the Q.E. is estimated by taking the ratio of the collected anode current to the source photo current. Only the generated carriers in the epitaxial layer contribute to the anode current because these carriers would trigger avalanche breakdowns. The carriers generated in the substrate are ignored because they would not enter the high-field region and thus cannot trigger avalanche breakdowns. In addition, we study the effect of the p+ contact thickness on the front surface of the device on the Q.E. Fig. 8 shows two sets of curves for three different thicknesses of the p+ contact (ranging from 10 nm to 100 nm), one with no anti-reflection (AR) coating and one with indium tin oxide (ITO) as the AR coating. Another advantage of using ITO is that it is conductive and can be applied across the whole front surface. We optimize the thickness of the ITO layer for 420 nm to maximize the Q.E. for the light emission of LSO. At longer wavelengths, the Q.E. decreases rapidly because the depletion depth of the active region is only about 1.2 μm. At shorter wavelengths, the Q.E. decreases with increasing thickness of the p+ contact due to carrier recombination loss in the p+ layer. As expected, the Q.E. is improved significantly with the AR coating.

Fig. 8.

Quantum efficiency versus wavelength of a back-side readout SiPM for varying p+ contact thicknesses with and without AR coating. The thickness of the AR coating is optimized to maximize the Q.E. at 420 nm.

IV. Design With Crosstalk Suppression

During an avalanche process and breakdown, there are visible light photons emitted. There are on average about 3 photons emitted for every 10⁵ generated carriers [18–19]. These photons can propagate to a neighboring micro-cell triggering an avalanche breakdown, which is known as optical crosstalk. The back-side readout SiPM naturally suppresses the crosstalk originating in the bulk due to the low field p-n junction below the n+ region as discussed in Section III.B. However, crosstalk can still originate in the avalanche region triggering an avalanche breakdown.

A common approach to suppress the crosstalk in the avalanche region is to introduce trenches around the micro-cell borders. Fig. 9 shows the doping and electric field profiles of a back-side readout SiPM with trenches filled with SiO₂. Alternatively, the trenches can be filled with metal. In addition, the surface of the trenches is passivated with higher p-type doping to reduce surface generated carriers [20]. The trenches have to be placed far enough from the n+ anode edge so that the field at the edge remains lower than the field at the high-field junction. The simulation shows that a gap of 3 μm between the n+ anode implant and the edge of the micro-cell is sufficient enough to avoid premature breakdown at the edge. Because the p implant is 1 μm from the n+ implant edge, the fill factor decreases to 81% for a micro-cell size of 40 μm × 40 μm.

Fig. 9.

Cross-section of the doping (top) and electric field (bottom) profiles of the front-side of half of a micro-cell of a back-side readout SiPM with trenches to suppress optical crosstalk.

V. Conclusion

In this paper, we present the back-side readout SiPM, which read out the signal from each micro-cell on the back-side allowing a large fill factor for light detection on the front-side. We have performed extensive TCAD simulations to evaluate the electrical and optical properties of the back-side readout SiPM, and also to optimize the design of the device. The design allows for fill factor greater than 90% for micro-cell area larger than 40 μm × 40 μm without trenches. Another advantage of the back-side readout SiPM is that it allows passive and/or active circuitries to be implemented on the back side or on a separate ASIC for signal processing (analog and/or digital) without affecting the PDE. Each micro-cell can be bump-bonded to an ASIC with matching pads for signal processing.

The design has natural dark count rate and crosstalk suppression from carriers generated in the bulk. In addition, trenches can be added to further reduce the crosstalk in the avalanche region.