A Power-Efficient Wireless System With Adaptive Supply Control for Deep Brain Stimulation

Abstract

A power-efficient wireless stimulating system for a head-mounted deep brain stimulator (DBS) is presented. A new adaptive rectifier generates a variable DC supply voltage from a constant AC power carrier utilizing phase control feedback, while achieving high AC-DC power conversion efficiency (PCE) through active synchronous switching. A current-controlled stimulator adopts closed-loop supply control to automatically adjust the stimulation compliance voltage by detecting stimulation site potentials through a voltage readout channel, and improve the stimulation efficiency. The stimulator also utilizes closed-loop active charge balancing to maintain the residual charge at each site within a safe limit, while receiving the stimulation parameters wirelessly from the amplitude-shift-keyed power carrier. A 4-ch wireless stimulating system prototype was fabricated in a 0.5-μm 3M2P standard CMOS process, occupying 2.25 mm². With 5 V peak AC input at 2 MHz, the adaptive rectifier provides an adjustable DC output between 2.5 V and 4.6 V at 2.8 mA loading, resulting in measured PCE of 72 ~ 87%. The adaptive supply control increases the stimulation efficiency up to 30% higher than a fixed supply voltage to 58 ~ 68%. The prototype wireless stimulating system was verified in vitro.

I. Introduction

Implantable medical devices (IMDs) with stimulating function have been proven as effective therapies to alleviate neurological diseases or substitute sensory modalities lost due to diseases or injuries [1]–[3]. These implantable stimulators are capable of injecting a designated amount of charge into the human body (often the neuronal tissue) by providing a precise amount of output current or output voltage for a predefined period. Deep brain stimulation (DBS) is one of the most effective examples of such therapies to treat Parkinson's disease, tremor, and dystonia [4], [5]. Today's DBS devices use large primary batteries implanted in the chest area, where there is more space available, and their subcutaneous interconnects pass across the neck to reach the electrodes implanted deep in the brain [6]. Batteries need to be replaced every 2 ~ 5 years through surgery, and there is always risk of mechanical failure in interconnects due to head motion. A head-mounted DBS can eliminate hardship imposed by chest-implanted primary batteries and long interconnects across the neck, replacing them with transcutaneous inductive power transmission from a behind the ear (BTE) rechargeable energy source, similar to cochlear implants and hearing aids [7]–[10].

Fig. 1 shows the conceptual configuration of a head-mounted inductively-powered DBS system. The external processing unit, which includes a rechargeable battery, provides transcutaneous power and data through a pair of loosely coupled coils. The induced AC input across the implanted coil supplies the rest of the DBS implant through an efficient power management unit. The DBS system generates stimulus pulses, which are delivered to the stimulation sites via individual leads that are significantly shorter than those from the chest area, and therefore, less invasive and more suitable for high-density DBS [11]. Like other wirelessly-powered IMDs, high power efficiency is paramount in reducing the risk of tissue damage from overheating [12].

Fig. 1.

Conceptual configuration of a head-mounted inductively-powered DBS system in which power and data are transferred through the inductive link.

Typically, three types of stimulation mechanism have been utilized depending on the application: voltage-controlled stimulation (VCS), current-controlled stimulation (CCS), and switched-capacitor stimulation (SCS) [13]. While VCS enables power-efficient stimulation, tissue and electrodes impedance needs to be known accurately to control the stimulation charge [13]. Balancing the stimulation charge is quite complicated in VCS because the electrode impedance varies over time and position. If the residual charge, which accumulates in the tissue following stimulation pulses, exceeds a safety limit, electrolysis of extracellular fluid can lead to pH variations, causing both tissue and electrode damage [5]. Conversely, CCS has been widely used because of its precise charge control and safe operation [14]. However, traditional CCS has low power efficiency due to the dropout voltage across the current source, which can result in significant power loss depending on the stimulation site voltage. SCS takes advantages of both high efficiency and safety by using capacitor banks to store and transfer charge to the tissue [13], [15]. However, it requires several off-chip capacitors that may increase the IMD size. In addition, high efficiency capacitor charging circuits from an AC input are needed to improve the overall DBS efficiency.

In order to achieve both safe and power efficient stimulation, we chose CCS with adaptive supply control, i.e., the stimulator supply voltage is automatically adjusted near the required stimulation voltage by detecting the site potential and forming a closed control loop through a power-efficient adaptive rectifier. This mechanism minimizes the voltage drop across the current sources, resulting in high power efficiency in the CCS. Our proposed wireless stimulating system also adopts active charge balancing by sharing the closed-loop path of the adaptive supply control to inject small current pulses in the tissue to keep the residual charges within a safety limit. Section II presents the proposed inductively-powered wireless stimulating system and compares it to prior solutions. Section III describes the circuit details of the proposed adaptive rectifier with phase control feedback, and Section IV depicts the implementation of the wireless DBS with adaptive supply control and active charge balancing through voltage readout channels. Measurement results from bench-top and in vitro experiments are depicted in Section V, followed by concluding remarks in Section VI.

II. Inductively-Powered Wireless Stimulating System

Fig. 2 compares various inductively-powered stimulating structures including the proposed stimulator with adaptive supply control. All structures were assumed to provide bipolar and biphasic stimulation through a similar pair of electrodes. We have assumed that the inductive link can maintain its peak efficiency against reflected impedance variations as stimulator loading changes. This is possible via a multi-coil inductive link or an adaptive resonant load transformation [16], [17]. Here we focus on power efficiency of the stimulating IMD, which can be defined as the ratio of the AC input power from the secondary coil to the stimulator output power delivered to the tissue.

Fig. 2.

Various inductively-powered stimulating structures with (a) the conventional rectifier and regulator [3], (b) the fixed output rectifier [18], (c) the dynamic dc-dc converter [19], (d) the external closed-loop supply control [20], [21], and (e) the internal closed-loop supply control with the proposed adaptive rectifier.

The conventional inductively-powered CCS in Fig. 2(a) utilizes a rectifier to convert the AC input to a DC V_REC, followed by a low-dropout regulator (LDO) to generate a fixed supply voltage, V_DD [3]. This simple structure wastes a large portion of the input power across the LDO, which is needed to accommodate V_REC variations, and the current source, while the loss increases as V_STIM, the required voltage to maintain stimulation current constant, becomes smaller. Lee proposed the fixed output rectifier in Fig. 2(b) to generate a predefined constant V_REC without an LDO [18]. Eliminating the LDO reduced the loss, but the CCS loss was still dominant during stimulation, especially when $V_{STIM}\ll V_{REC}$.

The stimulator in [19] utilized a dynamic supply, V_IN, from a DC-DC converter as shown in Fig. 2(c). It achieved high efficiency from VCS as well as coarse current controllability. However, it still required constant DC input, V_REC, from the rectifier, which loss should be added to that of the DC-DC converter (η_DCDC). In Fig. 2(d), the inductive power delivered to the stimulator was adjusted through an external closed loop, changing V_REC to be near the peak voltage of V_STIM, and leading to small power loss in CCS current sources [20], [21]. However, the external control loop via load-shift-keying (LSK), which adjusts the inductive power transmission, is prone to interference and can even be interrupted in a loosely-coupled inductive link, while increasing the system complexity. The passive rectifier also induced large AC-DC loss, which decreased the overall power efficiency [22]. While individually they suffer from their limitations, the methods used in these inductively-powered stimulating structures may be used together to further improve the power efficiency.

In the proposed inductively-powered stimulator, the adaptive rectifier with active switching is capable of generating a multilevel DC voltage, V_REC, directly from the AC input voltage across L₂ through an internal closed-loop control mechanism, shown in Fig. 2(e). Adjusting V_REC changes the power consumption in the IMD, leading to Tx output power variation. Therefore, V_REC, which directly supplies the CCS without an LDO, is adaptively adjusted close to the peak of V_STIM, resulting in small loss while benefiting from the advantages of the CCS. Moreover, the adaptive rectifier achieves high AC-DC power conversion efficiency (PCE) by adopting the phase control feedback and active synchronous rectification to improve the overall power efficiency of the inductively-powered stimulator.

The overall architecture of the proposed inductively-powered head-mounted DBS system is shown in Fig. 3. The power management block receives AC input through the inductive link, and converts it to the adjustable V_REC depending on the rectifier phase control bits, which are defined by the peak voltage at the stimulation sites that sets V_REF through the 3-bit resistor DAC (RDAC). The LDO generates the digital supply voltage, V_DIG, for the low voltage digital blocks. The overvoltage protection (OVP) circuit monitors the peak of V_INP,N and connects a de-tuning capacitor across the AC input to suppress AC voltages larger than a certain limit.

Fig. 3.

Overall architecture of the proposed inductively-powered head-mounted DBS system equipped with the adaptive supply control and the active charge balancing for both power-efficient and safe current stimulation.

Two stimulus current drivers, CCS₁ and CCS₂, which are adaptively supplied from V_REC, drive four stimulating sites in a complementary fashion with high compliance voltage, increasing the stimulation power efficiency. The voltage readout channel reports the relative voltage difference between active sites to the off-chip microcontroller (MCU), closing the feedback loop that adjusts V_REC. The same loop also manages active charge balancing via on-chip controllers, which inject additional current pulses into the tissue to bring the voltage difference between sites within a certain limit to guarantee safe stimulation. Forward data from the external Tx coil is recovered via amplitude-shift-keying (ASK) demodulation, setting the stimulation parameters and active channels. The back telemetry link utilizes LSK modulation by closing the short-coil (SC) switches across L2.

III. Adaptive Rectifier With Phase Control Feedback

A. Rectifier Phase Control

In order for the adaptive rectifier to generate the desired multilevel V_REC, the rectifier turn-on time needs to be adjusted to limit the forward current, while achieving high PCE. Fig. 4 shows the simplified voltage waveforms of the rectifier depending on the turn-on time. Conventional rectifiers aim to generate the maximum V_REC from V_IN(AC) at high PCE. Thus they turn on as long as V_IN(AC) > V_REC, as shown in Fig. 4(a) [22]. Consequently, V_REC becomes dependent on the V_IN(AC) amplitude, and it is not internally adjustable. In Fig. 4(b), V_REC can be adjusted by controlling the turn-on time around the peak of V_IN(AC). If the turn-on period is reduced, the lower forward current reduces V_REC as well. However, the large voltage drop between V_IN(AC) and V_REC during the turn-on period results in large power loss across the rectifying transistors, resulting in low PCE. To adjust V_REC while maintaining high PCE, we controlled the rectifier turn-on phase as shown in Fig. 4(c). In this method, the rectifier turns on when V_IN(AC) > V_REC, similar to the conventional rectifiers. However, its turn-off timing is controlled to limit the forward current. Therefore, V_REC is adjustable depending on the rectifier turn-on phase, while the small dropout voltage between V_IN(AC) and V_REC during the on period provides high PCE.

Fig. 4.

Simplified voltage waveforms of the rectifier with (a) the maximum turn-on time, (b) the turn-on time control, and (c) the turn-on phase control.

Fig. 5 shows the adaptive rectifier feedback model with the phase control mechanism. The threshold crossing detector sends a turn-on signal at phase θ to the synchronous rectifier when V_IN(AC) > V_REC(DC) to initiate the forward conduction. The phase control feedback compares V_REC(DC)/3 with a reference voltage, V_REF, which indicates the desired V_REC level, and generates an error signal, e, that is amplified and converted to a time delay, T_D. T_D is then applied to the turn-on signal at phase θ to generate the delayed signal at phase θ_D using which the turn-off controller turns the rectifier off after T_D. In other words, the rectifier conducts for T_D from the onset of V_IN(AC) > V_REC(DC) at the turn-on phase of θ to adjust V_REC, as shown in Fig. 4(c).

Fig. 5.

Adaptive rectifier feedback model showing the phase control mechanism.

B. Implementation of the Adaptive Rectifier

Fig. 6 shows the schematic diagrams of the adaptive rectifier with active switches and one of its phase control comparators. In Fig. 6(a), a pair of comparators, CMP₁ and CMP₂, which are equipped with the phase control feedback, drives the rectifying switches, P₁ and P₂, respectively, for low dropout voltage and high PCE. The reference voltage, V_REF, which is provided through a 3-bit RDAC, controls the transition times of the comparator output voltages, V_O1 and V_O2, in a way that the rectifier turn-off timing can be adjusted to change the turn-on phase and consequently the V_REC level. P₁ and P₂ turn on alternatively depending on V_INP,N polarity, while a cross-coupled NMOS pair, N₁ and N₂, closes the rectifier current path. PMOS body terminals, V_B1 and V_B2, are connected to the highest potential among V_INP,N and V_REC with the dynamic body biasing circuit [23].

Fig. 6.

Schematic diagrams of (a) the proposed adaptive rectifier with active switches, and (b) one of its phase control comparators, CMP₁.

In the phase control comparator (CMP₁), shown in Fig. 6(b), P₄, P₅, N₆, N₇, P₈, and N₈ form a common-gate comparator with input voltages, V_REC and V_INP, while the current source, P₇, injects additional current when V_O1 is high and P₆ turns on, forcing V₁ to increase earlier and expedite the turn-on P₁ transition of [24]. The phase control feedback loop consists of inverter chains along with the current-starved inverter, INV₆ and N₁₀, which bias current is controlled through AMP₁ by comparing V_REC/3 and V_REF, to generate the corresponding time delay. INV₆ output is further delayed before affecting the turn-off control transistor, P₃, which forces the rectifier to turn off adaptively even before V_INP < V_REC to generate the desired V_REC. Therefore, unlike conventional rectifiers or the voltage doubler-rectifier in [24], which output levels are dependent on the V_INP,N amplitude, the adaptive rectifier is capable of generating variable supply voltages regardless of the V_INP,N amplitude, thanks to the phase control feedback.

Fig. 7 shows the timing diagram of the adaptive rectifier depending on the actual V_REC level vs. the target V_REC, which is 3 × V_REF. For example, when V_REC > 3V_REF in Fig. 7(a), AMP₁ increases V₂, decreasing the delay of INV₆. Once V_O1 drops to turn on the rectifier, P₃ also turns on by V_FB1 after a small delay, T_D, limiting the charging period of the load and decreasing V_REC. On the other hand, when V_REC < 3V_REF in Fig. 7(b), the delay of INV₆ increases as V₂ decreases, and P₃ turns on after a longer T_D or even remains off, allowing more forward current to increase V_REC. When V_REC = 3V_REF in Fig. 7(c), V₂ results in a T_D that can maintain V_REC at the desired value. Since the turn-off timing is controlled in every rectifier cycle, the ripple on V_REC can be reduced to that of conventional rectifiers once it is settled on the desired V_REC value.

Fig. 7.

Timing diagram of the adaptive rectifier when (a) V_REC > 3V_REF, (b) V_REC < 3V_REF, and (c) V_REC = 3V_REF.

In Fig. 6(b), a startup circuit with R₁ and N₅ driven by V_INN guarantees the rectifier operation before V_REC is charged up without additional startup circuits used in [24], and without affecting the normal rectifier operation after startup. The reset control circuit on the lower right resets the phase control feedback loop to turn off P₃ and P₆ after P₁ turns off and V_INP goes low. Here, the timing of the reset signal depends on V_INP, which unlike the process-dependent inverter delay in [24], is independent of process variations.

IV. Wireless Stimulator With Adaptive Supply Control and Active Charge Balancing

A. Current Stimulator With Adaptive Supply Control

Each current driver has been equipped with a pair of 5-bit current sources with low dropout voltages,while being supplied from the adaptive V_REC, as shown in Fig. 8. Feedback loops using AMP_2–5 set the drain-source voltages of P₁₄ ~ P₁₈ and N₁₅ ~ N₁₉ at ~ 60 mV in the triode region. Therefore, the voltage head-room of the output stage, V_Head, can drop down to V_DS,sat + 60 mV, which is smaller than 2V_DS,sat of a typical cascode output stage. The two current drivers source and sink at the same time through a pair of 4:1 site selectors, providing a bipolar stimulation compliance voltage of V_REC – 2V_Head. The 5-bit current sources with binary-weighted transistors are placed at the output stage directly to reduce the stimulator power loss compared to using current mirrors after a 5-bit current DAC in [20].

Fig. 8.

Schematic diagram of the proposed current driver with low dropout 5-bit current sources and the active charge balancing.

Active charge balancing circuits push or pull additional small current pulses to the load after stimulation until the residual site voltage settles within a ±50 mV safety window [25]. To prevent the accumulation of unrecoverable charge in the tissue and utilize the residual voltage as a reliable indicator of charge imbalance, the electrode potential needs to be kept within a safe potential window during stimulation as well. This is known as the water window, where irreversible Faradaic reactions do not occur [5]. The active charge balancing scheme, utilized here, is capable of providing the small balancing current pulses and also estimating the required balancing period. Passive charge balancing schemes which short electrodes after stimulation, on the other hand, have difficulty in defining the current and period needed for charge balancing [27].

In order to verify how the adaptive supply voltage, V_REC, in Fig. 8 increases the stimulation power efficiency compared to using the fixed supply voltage, V_DD, we analyzed the efficiency for both cases in Fig. 9. In Fig. 9(a), the electrodes and tissue model is simplified to a series R_S and C_DL, which represent the solution spreading resistance and the double-layer capacitance, respectively, while two current drivers across the two sites apply bipolar stimulation [26], [27]. Fig. 9(b) shows the stimulation current, I_STIM, and voltage, V_STIM, during the biphasic-bipolar stimulation with current amplitude, I_S, and pulse width, T_S. The power transferred to the load during cathodic and anodic stimulations can be expressed as the R_S power loss plus the power charging or discharging C_DL by simply multiplying the instantaneous I_STIM and V_STIM,

$$\begin{array}{cc}\hfill P_{Load\left(cath\right)}=& \frac{1}{T_S}{\int }_0^{T_S}-I_S\left(-I_S{R}_S-\frac{1}{C_{DL}}{1}_{S}t\right)dt\hfill \\ \hfill =& {I_S}^2{R}_S+\frac{1}{2C_{DL}}{I_S}^2{T}_S\hfill \end{array}$$ (1)

$$\begin{array}{cc}\hfill P_{Load\left(ano\right)}=& \frac{1}{T_S}{\int }_{2T_S}^{3T_S}{I}_S\left(-\frac{1}{C_{DL}}{I}_S{T}_S+I_S{R}_S+\frac{1}{C_{DL}}{I}_S(t-2T_S)\right)dt\hfill \\ \hfill =& {I_S}^2{R}_S-\frac{1}{2C_{DL}}{I_S}^2{T}_S.\hfill \end{array}$$ (2)

Fig. 9.

Stimulation efficiency analysis using (a) a simplified electrodes and tissue model (R_S and C_DL), and (b) stimulation current and voltage waveforms.

Negatively charged C_DL after cathodic phase decreases V_STIM, and results in smaller power delivered to the load during the anodic phase. The stimulation power efficiency with the fixed supply voltage, V_DD, can be defined as the ratio between the power transferred to the load and the power drained from the supply rails,

$${\eta }_{STIM\left(Fixed\right)}=\frac{P_{Load(cath+ano)}}{P_{Supply}}=\frac{2{I_S}^2{R}_S}{2(I_S+I_{Static})V_{DD}}\approx \frac{I_S{R}_S}{V_{DD}},\text{if}{I}_{Static}\ll I_S$$ (3)

where I_Static is the static current of the stimulator internal circuitry, which is ~ 14 μA in our design, and usually much smaller than the stimulation current.

In the proposed current stimulator, the adaptive supply voltage, V_REC, can be automatically adjusted as,

$$\begin{array}{cc}\hfill V_{REC}=& \mid V_{STIM,Peak}\mid +2V_{Head}\hfill \\ \hfill =& \mid V_{RS}+V_{CDL,peak}\mid +2V_{Head}<V_{DD}\hfill \end{array}$$ (4)

where V_STIM,peak and V_CDL,peak are the peak voltages across the electrode-tissue model and the C_DL, respectively, and V_RS is the voltage drop across R_S. By replacing V_DD in (3) with V_REC in (4), the stimulation power efficiency with the adaptive supply control can be expressed as,

$$\begin{array}{cc}\hfill {\eta }_{STIM\left(Adap\right)}=& \frac{I_S{R}_S}{V_{REC}}=\frac{I_S{R}_S}{\mid V_{RS}+V_{CDL,peak}\mid +2V_{Head}}\hfill \\ \hfill =& \frac{1}{1+\frac{T_S}{R_S{C}_{DL}}+\frac{2V_{Head}}{I_S{R}_S}}\hfill \end{array}$$ (5)

which is indeed higher than η_STIM(Fixed) in (3).

η_STIM(Adap) in (5) can be further simplified as,

$${\eta }_{STIM\left(Adap\right)}\approx \frac{1}{1+\frac{T_S}{R_S{C}_{DL}}},\text{if}2V_{Head}\ll V_{RS}.$$ (6)

If $V_{RS}\gg V_{Head}$ (~ 150 mV in our design), η_STIM(Adap) simplifies to a function of the electrode-tissue model parameters, R_S and C_DL, and stimulus pulse width, T_S. Large R_S results in more power transferred to the load, while large C_DL or small T_S decrease the required V_REC, leading to higher stimulation efficiency.

B. Voltage Readout Channel and Forward/Back Telemetry

Fig. 10 shows the schematic diagram of the voltage readout channel including a capacitive attenuator and a voltage detector. V_STIM1 and V_STIM2, from the active sites, which can be as high as 4.6 V depending on the V_REC, are capacitively attenuated by C₈/(C₈ + C₉) during stimulation and charge balancing periods when EN = 1. After the charge balancing period, the capacitive attenuators are deactivated by disconnecting them from V_STIM1,2 (EN = 0) and then discharging C₈ and C₉ (EN_B = 1) to attenuate V_STIM1,2 accurately in the next stimulation period. The attenuated stimulation voltages, V_S1 and V_S2, are applied to the voltage detector, which consists of a fixed-gain differential amplifier followed by a buffer, supplied at V_DIG = 1.8 V. As a result, the differential input signals are converted to a single-ended output voltage, V_DET, with a gain of R₃/2R₂, which is then provided to the MCU to close the loop on adaptive supply control and application of the active charge balancing function.

Fig. 10.

Schematic diagram of the voltage readout channel including the capacitive attenuator and voltage detector, which are used for both adaptive supply control and active charge balancing.

The proposed wireless stimulating system is capable of communicating with forward and back data telemetry through the inductive link. Fig. 11 shows the schematic diagrams of the clock and data recovery circuits, which are used for setting the stimulation parameters and active channels through the MCU. The clock recovery in Fig. 11(a) adopts the latch comparator with cross-coupled P₂₃ and P₂₄ followed by inverters to generate the clock signal from the power carrier, V_INP,N, with low power consumption. The data recovery consists of an envelope detector and an amplitude shift keying (ASK) demodulator, as shown in Fig. 11(b) and (c), respectively.

Fig. 11.

Schematic diagrams of (a) the clock recovery, (b) the envelope detector, and (c) the ASK demodulator for the forward data telemetry.

In Fig. 11(b), the diode-connected passive rectifiers, P₂₅ and P₂₆, extract the envelope voltage, V_ENV, from the amplitude shift keyed power carrier, V_INP,N. V_ENV is applied to the demodulator in Fig. 11(c), which includes a level shifter, a preamplifier, and a hysteresis comparator, to recover the data signal. The level shifter provides bias voltage to the rest of the circuit through P₂₇, while shifting V_ENV down through P₂₇-P₂₈ to the preamplifier input range. The preamplifier has unbalanced delays, via R₅ and C₁₁, at its inputs, V_IN1 and V_IN2, to detect and amplify the amplitude variations of V_ENV. Finally, the hysteresis comparator, which utilizes the size mismatch of its current mirror, converts the preamplifier outputs to the recovered serial data bit stream at V_DIG level through several inverters. The serial data is then oversampled by the clock signal in the MCU and saved in its registers. The back telemetry link utilizes the SC switches across L2, N₃ and N₄ in Fig. 6(a), to provide LSK modulation [22].

V. Measurement Results

The inductively-powered wireless stimulating system was fabricated in the ON-Semiconductor 0.5-μm 3M2P n-well standard CMOS process. Fig. 12 shows a chip micrograph and floor plan of the proposed wireless adaptive stimulating system, occupying 2.25 mm² including pads. In our test setup, a class-E power amplifier drives the inductive link, which specifications are shown in Table I, to provide the wireless stimulating system with a 2 MHz sinusoidal input. The off-chip MCU (MSP430) from Texas Instruments (Dallas, TX) was chosen for its versatility and ultra-low power consumption [28].

Fig. 12.

Chip micrograph of the wireless stimulating system.

TABLE I.

In Vitro Test Setup Specifications

Power transmitter	Class-E PA
Carrier frequency (fc)	2 MHz
Primary coil diameter / inductance (L1)	4.0 cm / 6.8 μH
Secondary coil diameter / inductance (L2)	1.0 cm/1.2 μH
Distance between L1 and L2	1.5 cm
Electrodes (4-channel)	Quartz-platinum/tungsten
Electrode length / diameter / tip	15 mm / 80 μm / 1 mm
Electrode spacing (pitch)	3 mm
Electrodes + saline impedance @ 2.5 kHz	3.8 kΩ + 80 nF in series

A. Adaptive Rectifier With Adjustable

Measured waveforms in Fig. 13 show how the adaptive rectifier controls its turn-on phase depending on the 3-bit phase control input, CTL, to adjust V_REC when V_INP,N peak is constant at 5 V, load current is set to 2 mA, and f_C = 2 MHz. When CTL = 000 and V_REF = 0.83 V, the adaptive rectifier turns on within 50 ns of the beginning of the carrier cycle (θ = 36°), once V_INP,N > V_REC, and turns off after only 20 ns because the amount of delivered power is sufficient to increase V_REC to the desired level of 2.5 V. When CTL = 011 and V_REF = 1.13 V, the onset of rectifier turn-on shifts to 66 ns from the beginning of the carrier cycle (θ = 47.5°) and the on period adaptively increases to 28 ns to generate a higher V_REC = 3.4 V. When CTL = 111 and V_REF = 1.53 V, the adaptive rectifier operates almost like a regular active synchronous rectifier with θ = 68.4° and the on-time of 65 ns until V_INP,N goes below V_REC, while delivering more power to achieve the highest possible V_REC = 4.6 V. In addition, when V_REC = 2.5 V with I_OUT = 2 mA, the adaptive rectifier results in a small ΔV_REC < 3 mV against V_IN,peak variations within 3 V to 5 V. This rapid line regulation capability is an additional benefit of the phase control feedback mechanism.

Fig. 13.

Measured waveforms of the adaptive rectifier generating the multilevel V_REC from 5 V peak constant V_INP,N depending on the 3-bit CTL input. In each case, I_OUT is set at 2 mA and f_C = 2 MHz.

Fig. 14 shows the adaptive rectifier PCE vs. V_REC with V_INP,N peak and load current kept constant at 5 V and 2.8 mA (the highest I_STIM = 2.48 mA for this stimulator), respectively. The adaptive rectifier achieves competitive PCEs of 78 ~ 94% and 72 ~ 87% in simulation and measurement, respectively, while providing unique multilevel adaptive V_REC output between 2.5 ~ 4.6 V, controlled by its 3-bit input. The PCE slightly decreases with lower V_REC because the rectifier dropout voltage becomes a larger percentage of V_REC, and the on-resistance of the rectifying switches increases at lower voltages. Nonetheless, the adaptive rectifier still achieves considerably higher PCE than using a conventional rectifier followed by an adjustable regulator to generate the desired DC voltage. The difference between simulated and measured PCEs may be the result of mismatches between rectifying switches and their phase control comparators, as well as the effects of parasitic inductance and capacitance of the measurement setup, as explained in [22].

Fig. 14.

Measured and simulated PCE vs. V_REC of the adaptive rectifier. Peak of V_INP = V_INN = 5 V, f_C = 2 MHz, and I_OUT = 2.8 mA.

B. Wireless Stimulator With Adaptive Supply Control and Active Charge Balancing

Measured waveforms of the stimulator outputs, V_STIM1,2, and the voltage detector output, V_DET, are shown in Fig. 15 when ±1.04 mA biphasic-bipolar stimulus currents at T_S = 400 μs flow between V_STIM1,2 through a series R_SC_DL load, which was chosen to be 2 kΩ and 500 nF for the DBS application [19], [29]. For closed-loop adaptive supply control, the MCU samples V_DET at the end of the cathodic phase to measure V_STIM,peak in Fig. 9. The adaptive rectifier receives the phase control signals and automatically adjusts V_REC to be 0.2 ~ 0.5 V higher than V_STIM,peak, to keep a small voltage drop across the stimulating current source, ΔV, for high stimulation efficiency. The MCU samples V_DET again at the end of stimulation (anodic phase) to check the residual voltage between electrodes. If the voltage falls outside a safe window, set to ±50 mV, the active charge balancing circuit injects either a small positive or a negative current pulse (adjustable ±20 μA for 20 μs), and repeats the sampling procedure via the MCU until the residual charge is neutralized.

Fig. 15.

Measured waveforms of the current stimulator with R_S = 2 kΩ and C_DL = 500 nF connected in series between two active sites, as shown in Fig. 8, demonstrating the adaptive V_REC control and active charge balancing operations through the voltage readout channel.

Fig. 16 compares the stimulator supply voltage and PCE vs. I_STIM graphs between adaptive, V_REC, and fixed, V_DD, supplies when R_S = 2 kΩ, C_DL = 500 nF, and T_S = 400 μs. In Fig. 16(a), the adaptive V_REC was measured with 0.3 V increments between 2.5 V and 4.6 V vs. I_STIM. In these measurements, V_REC – V_STIM,peak < 0.2 V, while the fixed V_DD was measured at 4.6 V. Fig. 16(b) compares the stimulation power efficiencies vs. I_STIM between the fixed and adaptive mechanisms, using the measured supply voltages in Fig. 16(a) as well as (3) and (5), respectively, while including the stimulator I_Static = 14 μA.

Fig. 16.

(a) Adaptive V_REC and fixed V_DD vs. I_STIM, (b) stimulation power efficiencies vs. I_STIM, and (c) overall power efficiencies, i.e., rectifier + stimulator, vs. I_STIM. Solid line: adaptive supply control, dashed line: fixed supply, electrode-tissue model: R_S = 2 kΩ and C_DL = 500 nF in series, and T_S = 400 μs.

As expected, with lower I_STIM, the large voltage difference between V_DD and V_STIM increases the power loss in the stimulator output stage (P₂₁ and N₂₂ in Fig. 8), degrading the fixed voltage stimulation power efficiency. On the other hand, the adaptive V_REC keeps the voltage difference across the stimulator output small to minimize the power loss regardless of the I_STIM variations. As a result, the stimulation power efficiency with the adaptive supply control (58 ~ 68%) is up to 30% higher than the fixed V_DD (31 ~ 63%). In Fig. 16(c), the overall power efficiencies from secondary coil, L₂, to the load were calculated by multiplying the measured PCE of the adaptive rectifier in Fig. 14 and the stimulation efficiency in Fig. 16(b). Since the adaptive rectifier achieves relatively high PCEs even with lower V_REC levels, adaptive supply control still leads to higher overall power efficiencies (41 ~ 58%) compared with using a fixed supply (27 ~ 55%).

The MCU consumes ~ 19 μA in the standby mode and ~ 400 μA for running the ADC and generating control signals at V_DIG = 1.8 V and CLK = 2 MHz. Power consumption for these functions can be significantly reduced by sampling the peak stimulation voltage periodically, e.g., once every 10 ~ 20 cycles, to occasionally adjust the CTL. Moreover, the MCU functions can be integrated on chip by a low-power 3-bit SAR-ADC for generating the 3-bit CTL signal and simple control logic, leading to much lower power consumption compared to the off-chip MCU in the current prototype.

INL and DNL of the 5-bit cathodic/anodic stimulus currents, I_STIM1 and I_STIM2, for bipolar stimulation were measured and presented in Fig. 17 along with the stimulation current mismatch, ΔI_STIM = I_STIM1 – I_STIM2. Both I_STIM1 and I_STIM2 show similar tendencies between 0.08 mA and 2.48 mA with 5-bit resolution, achieving the maximum INL and DNL of 0.43 and 0.17 LSB, respectively. The maximum ΔI_STIM between I_STIM1 and I_STIM2 was ~ 4 μA.

Fig. 17.

Measured INL and DNL of the 5-bit I_STIM1 for cathodic stimulation and I_STIM2 for anodic stimulation along with the stimulation current mismatch, ΔI_STIM, between I_STIM1 and I_STIM2.

Fig. 18 shows the measured waveforms of the clock recovery and the ASK-demodulated data recovery blocks for the forward data telemetry. In Fig. 18(a), a 2 MHz clock signal, CLK, has been recovered from the 2 MHz carrier signal. In Fig. 18(b), the amplitude variations of the primary coil voltage at 5.8% (= 3.8 V/65.2 V) modulation index, induced across L₂, have resulted in ~ 100 mV variations in V_ENV. The ASK demodulator has then recovered the serial data bit stream, DATA, at 50 kbps.

Fig. 18.

Measured waveforms of (a) the 2 MHz clock recovery, and (b) 50 kbps data recovery from the 2 MHz power carrier at 5.8% ASK modulation index.

C. In Vitro Experiments

The proposed wireless stimulating system was verified through in vitro experiments using quartz-platinum/tungsten electrodes (EF8025, Thomas Recording, Giessen, Germany) and saline solution, as shown in Fig. 19. To emulate the DBS stimulation, 4 electrodes were aligned in parallel with 3 mm pitch spacing and soaked in 0.9% NaCl solution, which represents the brain tissue conductivity [30], [31]. The measured average impedance between adjacent electrodes in the solution was ~ 3.8 kΩ and 80 nF in series at 2.5 kHz. Table I summarizes the specifications of the in vitro test setup.

Fig. 19.

Test setup for in vitro experiments using the wireless adaptive stimulator including an inductive link operating at 2 MHz and 4 platinum/tungsten electrodes soaked in saline solution to emulate the DBS application.

Fig. 20 shows the measured stimulation waveforms from the in vitro experiments, focusing on the stimulator's adaptive supply control, active charge balancing, and multi-channel stimulation capabilities. In Fig. 20(a), two different stimulation currents, ±240 μA and ±480 μA, were applied to the saline solution through electrodes, and the supply voltage, V_REC, was automatically set to 2.8 V and 3.4 V, respectively, which maximize the stimulation efficiency. At the same time, the active charge balancing mechanism ensured that the residual charge was neutralized following each biphasic stimulation. Fig. 20(b) shows the multi-channel stimulation waveforms among 4 electrodes. The selected channels sourced and sinked ±560 μA and 400 μs stimulus pulses at 250 Hz, while the other channels were floating.

Fig. 20.

Measured stimulation waveforms from the in vitro experiments showing (a) adaptive supply control with different stimulation currents, active charge balancing, and (b) multi-channel stimulation capability.

D. Performance Summary and Comparison

Table II benchmarks the proposed adaptive rectifier that was presented in Section III against several recently published active rectifiers. While being capable of generating multilevel output voltages between 2.5 V and 4.6 V from a constant 5 V peak AC input, the adaptive rectifier maintains high measured PCE of 72 ~ 87%, depending on the V_REC level, when delivering 2.8 mA to the load. The voltage conversion efficiency, VCE (=V_REC/V_IN,peak), reaches as high as 92% when V_REC = 4.6 V.

TABLE II.

Adaptive Rectifier Benchmarking.

Publication		[32]	[33]	[34]	[22]	This work
Technology		0.5μm	0.18μm	0.35μm	0.5μm	0.5μm CMOS
AC-DC Structure		Active Rec.	Active Rec.	Active Rec.	Active Rec.	Adaptive Output Active Rectifier
VIN, peak (V)		5	1.25	2.4	3.8	5
VREC(V)		4.36	0.96	2.08	3.12	2.5 ~ 4.6 (3-bit)
VCE (%)		87.2	76.8	86.7	82.1	50 ~ 92
RL (kΩ)		1	2	0.1	0.5	IL = 2.8 mA
fC (MHz)		1	10	1.5	13.56	2
Area (mm2)		0.4	0.86	0.4	0.18	0.3
PCE (%)	Sim.	90.4	N/A	87	87	78 ~ 94
	Meas.	84.8	76	N/A	80.2	72 ~ 87

Table III summarizes the overall specifications of the proposed wireless stimulating system. The current stimulator achieves 58 ~ 68% power efficiency regardless of the I_STIM and V_STIM variations thanks to the adaptive supply control mechanism. It should be noted that the stimulation efficiency may also vary depending on the electrode/tissue impedance and the stimulus pulse width, as shown in (6).

TABLE III.

Wireless Stimulating System Specifications.

Overall System		Current Stimulator
Process	0.5 μm CMOS	# output ch.	4-ch (DBS)
ASIC area	2.25 mm2	Stim. rate	15.6 ~ 500 Hz*
Power source	Inductive link	Pulse width	16 ~ 512 μs*
Power Management		Current range	0.08 ~ 2.48mA (5b)
Adjustable Vrec	2.5 ~ 4.6V (3b)	INL / DNL	0.43 / 0.17 LSB
Measured PCE	72 ~ 87%	Ch. max. ΔI	4 μA
Vdig	1.8 V	IStatic	14 μ**
OVP threshold	VIN,peak > 5.8V	VHead	150 mV
Back telemetry	short-coil LSK	Charge balan.	Active pulse inject.
Forward Telemetry		Stim. PCE	58 ~ 68%***
Clock freq.	2 MHz	Voltage Readout Channel
ASK data rate	50 kbps	In/out range	0 ~ 4.6 V/0.2 ~ 1.6 V
Modul. index	5.8%	IStatic	12 μA**

^*Adjustable in MCU

^**Simulation

^***Vary with load model and pulse width

In the case of stimulating through multiple electrodes with different peak voltages, the adaptive supply voltage needs to follow the highest site voltage to properly stimulate all sites, limiting the improvement achieved in stimulation efficiency. This is why we recommend this technique for applications, such as DBS, which involve a relatively small number of macro sites that have similar properties. In applications with a large number of sites, such as retinal implants, it is conceivable to divide the sites into smaller subsets and use multiple independent adaptive rectifiers and current drivers, one per subset, at the cost of larger chip area.

The proposed system dissipates a maximum power of ~ 15 mW, assuming constantly flowing stimulus current, resulting in temperature rise well below the safe 1 °C limit [35]. If the efficiency of the transcutaneous inductive link is 60% at 10 mm coil separation from [36], the necessary Tx power at 2 MHz can be estimated at ~ 25 mW. This is well below the FCC's 100 mW/cm² limit for maximum permissible exposure (MPE) within 0.3 ~ 3 MHz [37].

VI. Conclusion

Current-controlled stimulators (CCS) have been widely used in implantable electrical stimulators because of their precise current control and safe operation. However, CCS suffers from low power efficiency, which mainly results from the large voltage drop across the output current sources, especially when the necessary stimulation voltage is much smaller than the supply voltage. In order to improve the CCS power efficiency, we have proposed an internal closed-loop system for adaptive control of the stimulator supply voltage slightly above the peak of the stimulation voltage.

This mechanism significantly reduces the power loss in the CCS current sources, helping the CCS achieve high stimulation efficiency regardless of the stimulation voltage levels, while taking advantage of its safety features, completed by adopting the active charge balancing mechanism to neutralize the residual charge. The adaptive supply voltage has been generated directly from the inductive link using the proposed adaptive rectifier, which has high measured AC-DC PCE for the multilevel DC output thanks to the phase control feedback. The wireless stimulating system also includes a voltage readout channel to close the on-chip control feedback loop as well as an ASK demodulation block for forward data telemetry.

Stimulation power efficiencies with fixed and adaptive supplies have been derived and compared. Bench-top and in vitro measurement results of a fabricated prototype verified that the proposed inductively-powered wireless stimulating system with adaptive supply control was fully functional and improved the overall power efficiency of wireless stimulators for applications such as DBS and cochlear implants.

Biographies

Hyung-Min Lee (S’06) received the B.S. degree in electrical engineering (summa cum laude) from Korea University, Seoul, Korea, and the M.S. degree in electrical engineering from the Korea Advanced Institute of Science and Technology (KAIST), Daejeon, Korea, in 2006 and 2008, respectively. Since 2009, he has been with the GT-Bionics Lab in the Department of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA, where he is working toward the Ph.D. degree.

His research interests include analog/mixed-signal integrated circuits and power management integrated circuits for biomedical implantable systems.

Mr. Lee received Silver Prizes in the 16th and 18th Human-Tech Thesis Prize contest from Samsung Electronics, Korea, in 2010 and 2012, respectively, and the Commendation Award in the 4th Outstanding Student Research Award from TSMC, Taiwan, in 2010.

Hangue Park (S’11) was born in 1980. He received the B.S. and M.S. degrees from Seoul National University, Seoul, Korea, in 2006 and 2008, respectively.

From 2001 to 2004, he was with Bluebird-soft, where he designed circuit and system for industrial personal digital assistants (PDA). From 2008 to 2010, he worked for Samsung Electronics and designed SAW-less transceivers and PLLs for cellphone applications. He joined GT-Bionics Lab at the Georgia Institute of Technology, Atlanta, GA, USA, in 2010, where he is currently pursuing the Ph.D. degree. His research interest is in system and IC design for biomedical applications, especially in tongue-drive systems.

Mr. Park was a co-recipient of the Best Demonstration Award of the 2012 IEEE Biomedical Circuits and Systems Conference.

Maysam Ghovanloo (S’00–M’04–SM’10) was born in Tehran, Iran, in 1973. He received the B.S. degree in electrical engineering from the University of Tehran, Tehran, Iran, in 1994, the M.S. degree in biomedical engineering from the Amirkabir University of Technology, Tehran, Iran, in 1997, and the M.S. and Ph.D. degrees in electrical engineering from the University of Michigan, Ann Arbor, MI, USA, in 2003 and 2004, respectively.

From 2004 to 2007, he was an Assistant Professor in the Department of Electrical and Computer Engineering, North Carolina State University, Raleigh, NC, USA. He joined the faculty of the Georgia Institute of Technology, Atlanta, GA, USA, in 2007, where he is currently an Associate Professor and the Founding Director of the Georgia Tech Bionics Lab in the School of Electrical and Computer Engineering. He has authored or coauthored more than 100 conference and journal publications.

Dr. Ghovanloo is an Associate Editor of the IEEE Transactions on Biomedical Circuits and Systems and the IEEE Transactions on Biomedical Engineering. He has received awards in the 40th and 41st Design Automation Conference (DAC)/International Solid-State Circuits Conference (ISSCC) Student Design Contests. He has organized special sessions and was a member of Technical Review Committees for several major conferences, including ISSCC and ISCAS, in the areas of biomedical circuits, sensors, and systems. He is a member of Tau Beta Pi, Sigma Xi, the IEEE Solid-State Circuits Society, the IEEE Circuits and Systems Society, and the IEEE Engineering in Medicine and Biology Society.