Fabrication and characterization of sub-100/10 nm planar nanofluidic channels by triple thermal oxidation and silicon-glass anodic bonding

Abstract

We reported the fabrication and characterization of nanofluidic channels by Triple Thermal Oxidation and Silicon-Glass Anodic Bonding. Planar nanochannels with depths from sub-100 nm down to sub-10 nm were realized by this method. A theoretical model was developed to precisely predict the depth of nanochannels. The depth and uniformity of nanochannels showed good stability during anodic bonding. This method is promising for various nanofluidic studies, such as nanofluidic electrokinetics, biomolecule manipulation, and energy conversion.

I. INTRODUCTION

Nanofluidics, with its unique properties at dimensions less than 100 nm, has raised tremendous interest in various fields, such as energy conversion,¹ biomolecule manipulation,² and water desalination.³ In particular, increasing efforts have been devoted to the sub-10 nm regime for anomalous fluidic transport phenomena studies,^4,5 and novel applications such as DNA analysis^6,7 and biosensing.⁸ Undoubtedly, the advance of nanofluidics relies on the development of nanofabrication technology capable of realizing well-defined and highly reproducible nanopores/nanochannels.⁹ Although nanolithography provides precise patterning of nanoscale structures, microelectromechanical (MEMS) based techniques have been most widely adopted for nanofluidic device fabrication benefitting from their high reproducibility, high throughput, and low cost.⁹ Most MEMS based techniques were only able to realize nanostructures with one dimension at nano-scale (vertical nanochannels with nano-width and planar nanochannels with nano-depth). But these methods met the requirements of most nanofluidic studies, which only need one nano-confined dimension to realize electrical double layer overlapping. Xie et al.¹⁰ proposed edge lithography as a wafer-scale scheme of fabricating vertical nanochannels from 500 nm down to 50 nm. By controlling the process recipe, several groups adopted Reactive Ion Etching (RIE) to fabricate planar nanofluidic channels with depth down to 20 nm.^11–14 Several unconventional methods were developed to realize sub-10 nm nanochannels. Kim et al.¹⁵ produced ∼1 nm deep nanochannels by PDMS (Polydimethylsiloxane) molding and reversible plasma bonding. Song and Wang¹⁶ took advantage of silicon native oxide to fabricate sub-15 nm planar nanochannels by HF-dips. However, these methods are limited to the fabrication of either sub-10 nm or sub-100 nm to 10 nm nanochannels. Therefore, a more versatile fabrication technique capable of scaling from sub-100 nm to sub-10 nm is highly desirable for the nanofluidics society. In this paper, we proposed triple thermal oxidation and silicon-glass anodic bonding (TTO-SGAB) as a versatile method of sub-100/10 nm planar nanofluidic channel fabrication. Although Wu et al.¹⁷ and Persson et al.¹⁸ used Double Thermal Oxidation (DTO) process to fabricate nanochannels for capillary filling study, we extended this process by an etching step and third oxidation to obtain shallower nanochannels. Moreover, a detailed mathematical model on TTO was developed to precisely predict the depth of nanochannel fabricated by this method. Next, the stability of nanochannel depth and uniformity after SGAB was investigated by SEM. Finally, the collapsing of TTO-fabricated nanochannels during SGAB was scrutinized.

II. PRINCIPLE

A. Fabrication process

The fabrication process of the TTO-SGAB method is shown in Figure 1. (1) A SiO₂ layer (thickness: d₁) was thermally grown on the silicon substrate. (2) A lithography process was conducted to define the pattern of nanochannels. The pattern was transferred to the substrate by wet etching. (3) The second oxidation was conducted, with the thickness of the oxide layer in the nanochannel region being d₂. Due to diffusion of oxygen molecules through the oxide layer, the thickness of the oxide layer in the non-nanochannel region increased to d₃. (4) All oxide layers on the substrate were completely etched to obtain a shallower nanochannel.¹⁹ A nanochannel with depth of h was obtained on the silicon substrate. (5) The third oxidation was conducted to realize electrical insulation. Due to the uniformity of the thermal oxidation process, the nanochannel depth remained h. (6) SGAB was conducted to form enclosed nanofluidic channels.

FIG. 1.

Fabrication process of the TTO-SGAB scheme.

During the thermal oxidation process, silicon was consumed in the oxidation reaction. For a silicon dioxide layer with thickness of d, the depth of silicon consumed was 0.46d. Based on the analysis of the silicon consumption, the depth of the nanochannel could be calculated as

$$h=0.46d_2-0.46(d_3-d_1)=0.46(d_1+d_2-d_3).$$ (1)

Because of the growth of oxide layer in the non-nanochannel region during the second oxidation (d₃ > d₁), the nanochannel depth obtained was smaller than 0.46d₂. It can potentially be extremely small by tuning the thickness of the first oxide layer d₁. In Eq. (1), d₁ and d₂ are design parameters. d₃ is determined by d₁ and d₂, and can be precisely calculated by the Deal-Grove Model for silicon thermal oxidation.

B. Nanochannel depth prediction

The Deal-Grove Model²⁰ is widely used for modeling the silicon thermal oxidation process, according to which the relationship between oxide layer thickness X_ox and oxidation time t is

$$X_{\mathit{o}\mathit{x}}=\sqrt{\frac{A^2}{4}+B(t+\tau )}-\frac{A}{2},$$ (2.1)

where A and B are parameters determined by the oxidation conditions (temperature, pressure, oxygen concentration, etc.), τ is the effective time corresponding to the initial oxide layer thickness. The parameter τ was introduced to offset the effect of oxidation rate enhancement at thin regime (<30 nm) and native oxide layer growth before the oxidation process. During the TTO process, in the first oxidation

$$d_1=\sqrt{\frac{A^2}{4}+B(t_1+\tau )}-\frac{A}{2},$$ (2.2)

where t₁ is the time of the first oxidation process.

In the second oxidation, for the nanochannel region

$$d_2=\sqrt{\frac{A^2}{4}+B(t_2+\tau )}-\frac{A}{2},$$ (2.3)

where t₂ is the time of the second oxidation process. For the non-nanochannel region, the total oxidation time is t₁ + t₂, so we have the following relationship:

$$d_3=\sqrt{\frac{A^2}{4}+B(t_1+t_2+\tau )}-\frac{A}{2}.$$ (2.4)

By combining Eqs. (1) and (2.2)–(2.4), the depth of the nanochannel is

$$h=0.46\left\{d_1+d_2-\sqrt{\left[\left(d_1^2+d_2^2\right)+A\left(d_1+d_2\right)-B\tau \right]+\frac{A^2}{4}}+\frac{A}{2}\right\}.$$ (3)

According to Eq. (3), the depth of the nanochannel could be tuned to any specific value by controlling the design parameters d₁ and d₂. It is also to be noted that d₁ and d₂ are symmetric in Eq. (3), which means the thickness of the first two oxide layers are switchable during the fabrication process.

III. EXPERIMENTS

A. Chip design

The layout of the chip is shown in Fig. 2(a). Nanochannels of different widths were designed. There were three nanochannels in parallel for each width. For chips aiming for nanochannels with depths from ∼100 nm to 10 nm, nanochannel widths ranged from 10 μm to 200 μm. For chips aiming for nanochannels with depths of sub-10 nm, nanochannel widths ranged from 50 nm to 5 μm, which used Electron Beam Lithography (EBL) for nanochannel patterning. To realize further tests of the nanochannels, reservoirs were fabricated at the two ends of the nanochannels. Fig. 2(b) shows the cross-sectional view of the chip. Following the realization of the nanochannel by steps (1)–(4) in Fig. 1, reservoirs were fabricated from the backside by etching thorough the wafer using KOH etching. After that, the third oxidation was conducted to realize electrical insulation of the whole chip. Finally, the silicon chip was bonded to the glass wafer by SGAB.

FIG. 2.

Layout (a) and cross-sectional view (b) of the chip.

B. Fabrication of nanochannels

Both dry and wet oxidations are widely adopted in standard microfabrication technology. Typically, dry oxidation is used for thin oxide layer growth (<1000 Å) due to its relatively slow growth rate. Meanwhile, wet oxidation is often used for thick oxide layer growth (>1000 Å). In this work, wet oxidation was used to fabricate nanochannels from ∼100 nm to 10 nm, while dry oxidation was used to fabricate sub-10 nm nanochannels. The temperature of both dry and wet oxidation process in this work was 1000 °C. For wet oxidation, the flow rates of gases are O₂ 5.1 l/min, H₂ 7.6 l/min, N₂ 60 l/min; for dry oxidation, the flow rates of gases are O₂ 6.0 l/min, N₂ 6.0 l/min. (100) silicon wafers (4-inch, double sides polished) were used for all processes. The design parameters (d₁, d₂, wet/dry) of different experimental groups are shown in Table I. In both groups, the third oxidation was 2000 Å thick and realized by wet oxidation. Buffered Hydrofluoric Acid (BHF, 5:1 volume ratio mixture of 40% NH₄F in water to 40% HF in water) was used for all etching steps. All etching steps were conducted at 30 °C, with an etch rate of 23 Å/s. There was a 10% over-etching time to ensure that oxide was completely removed in the etching region.¹⁹ Pyrex 7740 glass wafers (4-inch, double sides polished) were used to bond with silicon wafers. The condition for SGAB was: EVG501 Wafer Bonding System, 3E-3 mbars, 330 °C, 500 V, 1000 N, 10 min.

TABLE I.

Design parameters of different experimental groups.

Group 1: wet oxidation			Group 2: dry oxidation
#	d1 (Å)	d2 (Å)	#	d1 (Å)	d2 (Å)
1-1	1000	8000	2-1	200	400
1-2	2000	8000	2-2	400	400
1-3	3000	8000	2-3	600	400
1-4	4000	8000	2-4	800	400
1-5	5000	8000	2-5	1000	400

C. Electrical characterization of nanochannels

As a proof of concept, electrical characterization was conducted to demonstrate the applicability of nanochannels by TTO-SGAB in nanofluidic studies. Potassium chloride (KCl) solution in deionized water was loaded into one reservoir. After 15 min when the nanochannels had been filled with KCl solution by capillary force, KCl solution was loaded into the other reservoir. Different concentrations of KCl solutions were tested: 10⁻⁶ M, 10⁻⁵ M, 10⁻⁴ M, 10⁻³ M, 10⁻² M, and 10⁻¹ M. A precision semiconductor analyser (HP 4156B) was used for electrical measurements. The voltage applied ranged from −1000 mV to 1000 mV with a step of 100 mV. A Faraday cage was used for electrical shielding. Ag/AgCl electrodes were used in this experiment. Nanochannels of three different depths (1–1#, 1–4#, 2–5#) were tested.

IV. RESULTS AND DISCUSSION

A. Determination of the deal-grove model parameters

In order to predict the depths of nanochannels fabricated by the TTO process, parameters (A, B, τ) in Eq. (3) need to be determined. First, we experimentally obtained the relationship between X_ox and t in wet and dry oxidations, respectively. Then, A, B, τ were determined by performing curve fitting according to Eq. (2.1). The parameters of wet and dry oxidations are shown in Fig. 3. With the fitted values of A, B, τ, the depth of nanochannels can be calculated by Eq. (3).

FIG. 3.

Determination of the Deal-Grove Model parameters for wet (a) and dry (b) oxidation.

B. Comparison of the experimental and model-predicted nanochannel depth

In the fabrication process, the oxidation time corresponding to designed thickness in Table I was calculated by the relationship fitted in Fig. 3. In our thermal oxidation facility, we are able to achieve the designed thickness within an error of ±3% for thickness between 200 Å and 1000 Å and ±1.5% for that between 1000 Å and 10000 Å. The expected nanochannel depths were calculated by substituting the design parameters d₁ and d₂ in Table I to Eq. (3). The errors of the depths were also calculated by the error propagation formula.¹⁹ A surface profiler (KLA-Tencor AS-500 Stylus Based Surface Profiler) was used to measure nanochannel depths of group 1 shown in Table I. Atomic Force Microscopy (AFM) was used to characterize nanochannels of group 2 shown in Table I. AFM images indicate that nanochannels fabricated by TTO have smooth surfaces with mean roughness of 0.229 nm (Fig. 4).

FIG. 4.

AFM image of 7.9 nm deep nanochannels (a) and surface roughness analysis of a 2.5 μm × 2.5 μm area at the nanochannel bottom (b) showing mean surface roughness being 0.229 nm (R_a).

By comparing the measured and calculated values in Table II, we can conclude that Eq. (3) provides precise prediction of the depth of nanochannel fabricated by the TTO process.¹⁹ It is also important to note the error-reducing effect of the TTO scheme. Although the state-of-the-art semiconductor technology is capable of fabricating ultra-thin (<2 nm) gate oxides, it remains a challenge for research facilities to grow oxide layers thinner than 10 nm. It is very difficult to precisely obtain sub-10 nm nanochannels by single oxidation process (step 1 → step 2 → step 6 in Fig. 1). However, as indicated by our error propagation analysis,¹⁹ the TTO scheme is able to obtain sub-10 nm nanochannels within an error of 0.2 nm. For sub-100 nm nanochannel fabrication, the error produced by the TTO process was also smaller than that fabricated directly from single oxidation process (±3% for nanochannel depth between 200 Å and 1000 Å).

TABLE II.

Comparison of the experimental and model-predicted nanochannel depths.

Group 1: wet oxidation			Group 2: dry oxidation
#	Measured (nm)	Calculated (nm)	#	Measured (nm)	Calculated (nm)
1-1	38.4 ± 0.6	35.9 ± 0.6	2-1	7.9 ± 0.0	7.9 ± 0.0
1-2	66.2 ± 1.3	65.3 ± 1.1	2-2	8.7 ± 0.0	8.7 ± 0.1
1-3	92.0 ± 2.1	91.3 ± 1.5	2-3	9.1 ± 0.0	9.2 ± 0.1
1-4	114.8 ± 2.1	114.1 ± 2.0	2-4	9.6 ± 0.1	9.8 ± 0.2
1-5	136.0 ± 2.3	134.2 ± 2.3	2-5	10.6 ± 0.2	10.3 ± 0.2

C. Stability of nanochannel depth and uniformity

During SGAB, the applied voltage (500 V in our case) exerted a strong attractive force between nanochannel surfaces (glass and silicon dioxide), which resulted in the deformation of nanochannel surfaces. If the deformation was large enough to bring the nanochannel surfaces into contact, the nanochannel would collapse (which will be discussed in Sec. IV D). One may expect that, due to the deformation of nanochannel surfaces during bonding, the nanochannel depth and uniformity would be affected. In fact, the cross-sectional SEM images (Fig. 5) of sub-100 nm nanochannels proved that nanochannel depths were consistent with values measured before bonding (Table II), considering the possible errors due to the resolution of SEM imaging. It could also be observed that the nanochannel depths were of good uniformity along the nanochannel cross section. This indicates that the deformation of nanochannel surfaces (if surfaces were not pulled into contact) could be neglected after removing the bonding voltage and pressure, which conformed to the previous conclusions of Mao and Han¹¹ and Song and Wang.¹⁶

FIG. 5.

Cross-sectional SEM images and magnified view of nanochannels. (a) 1–1#, (b) 1–2#, (c) 1–3#, (d) 1–4#, and (e) 1–5#.

Due to the resolution limit of SEM imaging, we were unable to obtain cross-sectional SEM images of sub-10 nm nanochannels. Therefore, we lacked experimental evidence to prove that sub-10 nm nanochannels also maintained their heights and uniformity after SGAB. However, we could reasonably support this by a careful examination of all possible factors that might affect the nanochannel height and uniformity. During SGAB, silicon could be taken as elastic, which returned to original state after removing external forces; Although the Pyrex glass is viscoelastic, the deformation due to viscous flow is very small compared with elastic deformation at the bonding temperature 330 °C,²¹ so the glass wafer also returned to original state. Therefore, plastic deformation of wafers was negligible in SGAB. The thickness uniformity of silicon and glass wafers was also not a concern, since nanochannels were narrow (<5 μm for sub-10 nm nanochannels). Surface roughness of the bonding side of Pyrex 7740 glass wafer was measured to be 0.188 nm (R_a) in a 2.5 μm × 2.5 μm area by AFM. So the non-uniformity of the nanochannels after SGAB could be estimated to <0.4 nm by taking roughness of silicon (Fig. 4(b)) into account. Based on the discussion above, it could be concluded that Eq. (3) remained applicable for the prediction of nanochannel depth after SGAB.

D. Collapse of nanochannels

As mentioned in Sec. IV C, the pulling force induced by electric field caused the deformation of nanochannel surfaces during SGAB. If the aspect ratio (the ratio of channel depth to width) is smaller than a critical value, the nanochannel surfaces would be pulled into contact and bonded together, which led to the collapsing of the nanochannel. Mao and Han.¹¹ studied the collapsing law of nanochannels obtained by SGAB at the bonding condition of 350 °C, 800 V, 2000 N and with a 400 nm thick silicon dioxide layer. They found that once a small-area contact of nanochannel surfaces was formed, it would quickly lead to the contact and bonding of the whole nanochannel. They also found a constant value (0.004) of Critical Aspect Ratio (CAR) for nanochannels of different depths.

For nanochannels of the same depth, those of larger widths more easily collapsed due to larger displacement of nanochannel surfaces during SGAB. Fig. 6 shows the survival or collapse of 114.8 nm deep nanochannels of different widths. Narrow nanochannels survived the bonding (Fig. 6(a)). When the width increased to a critical value, the nanochannel surfaces came into contact (Fig. 6(b)). The contact area increased gradually with the nanochannel width, and finally reached a completely collapsed state (Fig. 6(c)). As Fig. 6(d) indicates, the contact areas were bonded together. The survival or collapse of sub-10 nm nanochannels was also observed by optical microscopy as shown in Fig. 7. The contrast of the images was adjusted to show the difference. For nanochannels of the same width, with the depth decreasing, the nanochannel went from survival to partially collapsed, and finally reached a completely collapsed state. Our observation is different from that of Mao's,¹¹ which could probably attributed to the lower bonding voltage in our experiment.

FIG. 6.

The survival or collapse of 114.8 nm deep (1–4#) nanochannels. (a) Survived nanochannels, (b) partially collapsed nanochannels, (c) completely collapsed (except for the small areas along the edges) nanochannels, and (d) cross-sectional SEM image of a partially collapsed nanochannel.

FIG. 7.

The survival or collapse of sub-10 nm nanochannels. (a) Survived nanochannels (10.6 nm, 2–5#), (b) partially collapsed nanochannels (9.6 nm, 2–4#), and (c) completely collapsed nanochannels (8.7 nm, 2–2#).

The maximum survival widths (w_max) and corresponding CARs of nanochannels were summarized in Table III. CAR varied with the nanochannel depth. The smallest CAR we achieved is 0.0012, which probably resulted from the lower bonding voltage in our experiment. By a curve fitting of h and w_max, we found that h is proportional to w^1.4_max, which does not conform to previous theories and experimental results.¹⁹ A more detailed model might be needed to better understand the relationship of h and w_max.

TABLE III.

Maximum survival widths and corresponding CARs of nanochannels of different depths.

Group 1: wet oxidation			Group 2: dry oxidation
#	wmax (μm)	CAR	#	wmax (μm)	CAR
1-1	18	0.0021	2-1	1.5	0.0053
1-2	40	0.0017	2-2	2.0	0.0044
1-3	65	0.0014	2-3	2.0	0.0046
1-4	90	0.0013	2-4	2.5	0.0039
1-5	110	0.0012	2-5	5.0	0.0021

E. Electrical property of nanochannels

In recent years, there have been plenty of interesting electrical phenomena reported in nanofluidic channels.^12,22–24 To demonstrate the potential of our platform for these studies, we conducted a preliminary electrical characterization of the nanochannels. The conductance of the nanochannel as a function of ion concentration was studied, which was a basic nanofluidics property.²⁵ For chips with different nanochannel depths, the total nanochannel widths were also different due to different collapse/survival conditions of nanochannels during SGAB. In order to make comparison between different measurements, the conductances of nanochannels of different depths were unified by being divided by corresponding total nanochannel widths. As shown in Fig. 8, at low concentrations where the electrical double layers overlapped, the conductance was independent of the ion concentration; at high concentrations where the electrical double layers did not overlap, the conductance increased with the ion concentration, which showed good agreement with previous theories and experiments.^4,26,27 This proof-of-concept experiment indicates that nanochannel by TTO-SGAB could be a good platform for various nanofluidic studies.

FIG. 8.

Conductance of nanochannels as a function of ion concentration. The Debye lengths corresponding to different concentrations were 304.5 nm (10⁻⁶ M), 96.3 nm (10⁻⁵ M), 30.5 nm (10⁻⁴ M), 9.6 nm (10⁻³ M), 3.1 nm (10⁻² M), and 1.0 nm (10⁻¹ M).

V. CONCLUSION

In this work, we proposed TTO-SGAB as a versatile method of sub-100/10 nm nanochannel fabrication. Sub-100 and sub-10 nm nanochannels of different depths were realized by wet/dry oxidation and tuning thickness of oxide layers. Based on the Deal-Grove Model, we developed a precise model for nanochannel depth calculation, which had an error below 0.2 nm for sub-10 nm nanochannels. Cross-sectional SEM images demonstrated that the nanochannels remained their original depths and were uniform after SGAB. Enclosed nanochannels with CAR down to 0.0012 were obtained. A new law of nanochannel collapsing during SGAB was observed, which needs a more detailed model for explanation. This versatile fabrication method is promising for various nanofluidic applications.