Crossover from band-like to thermally activated charge transport in organic transistors due to strain-induced traps

Significance

The operation of organic field-effect transistors is governed by the processes taking place at the device interfaces. The mismatch in the coefficients of thermal expansion of the consecutive layers can induce inhomogeneous strain in the organic semiconductor layer and reduce performance by increasing the electronic trap density. We show that a high-quality organic semiconductor layer is necessary, but not sufficient, to obtain efficient charge-carrier transport, and we propose a device design strategy that allows us to achieve the intrinsic performance limits of a given organic semiconductor regardless of the relative thermal expansions of the constituent layers.

Abstract

The temperature dependence of the charge-carrier mobility provides essential insight into the charge transport mechanisms in organic semiconductors. Such knowledge imparts critical understanding of the electrical properties of these materials, leading to better design of high-performance materials for consumer applications. Here, we present experimental results that suggest that the inhomogeneous strain induced in organic semiconductor layers by the mismatch between the coefficients of thermal expansion (CTE) of the consecutive device layers of field-effect transistors generates trapping states that localize charge carriers. We observe a universal scaling between the activation energy of the transistors and the interfacial thermal expansion mismatch, in which band-like transport is observed for similar CTEs, and activated transport otherwise. Our results provide evidence that a high-quality semiconductor layer is necessary, but not sufficient, to obtain efficient charge-carrier transport in devices, and underline the importance of holistic device design to achieve the intrinsic performance limits of a given organic semiconductor. We go on to show that insertion of an ultrathin CTE buffer layer mitigates this problem and can help achieve band-like transport on a wide range of substrate platforms.

The exceptional chemical versatility of π-conjugated organic materials, coupled with their facile processing and malleability to any substrate shape, size, and type, make them excellent candidates for a broad range of (opto)electronic applications addressing the fields of energy, environment, health, information, communication, robotics, and sensing. Despite the vast improvements recorded for emerging organic electronic materials, these organic-based active layers often demonstrate insufficient performance for implementation in many technologies. The modest performance of organic devices, however, is not necessarily an intrinsic property of the organic semiconductor layer, as these limitations may originate from extrinsic effects, such as the presence of impurities, variations in thin-film microstructure, traps at the organic semiconductor–dielectric interface, or contact effects. The weak van der Waals interactions between organic molecules result in narrow electronic bandwidths (compared with inorganic semiconductors), strong interactions between the charge carriers and the lattice, and high susceptibility to defect formation (1, 2). These effects diminish the electrical performance, and prevent access to the intrinsic properties of these materials. As a consequence, many groups have focused their efforts on determining the charge carrier transport characteristics of single crystals, which offer an experimental platform to investigate organic semiconductors in a nearly perfect form, with minimal defects.

Variable-temperature mobility (µ) measurements are typically carried out to evaluate the mechanism of charge carrier transport in organic semiconductors. An increase in mobility with decreasing temperature that obeys a power-law relation, µ α T^-n, with 0.5 ≤ n ≤ 3, typically suggests a band-like transport (3–5). Although the band-like transport proposed for high-mobility organic semiconductors has many common features with the classical band transport found in many inorganic semiconductors, it is fundamentally different due to the fact that, in organic crystals, the charge carriers are delocalized only over a few molecules (unit cells). The transient localization (dynamic disorder) model, which relates charge localization with the lattice vibrations, captures a more accurate picture of charge transport in high-mobility organic crystals (6). A thermally activated mobility, described by an Arrhenius-like relation, µ ≈ exp[-E_A/k_BT], where E_A stands for the activation energy and $k_B$ is the Boltzmann constant, is generally a signature of disorder, and is described in terms of the multiple trapping and release model (7, 8) or variable range hopping (9, 10). These models agree well with measurements carried out on polymeric and polycrystalline small-molecule devices, where charges are localized and higher temperatures provide energy to overcome these barriers. Band-like transport is expected for high-quality single-crystal devices; indeed, band-like transport was reported in several different materials from time-of-flight (11–13), time-resolved terahertz pulse spectroscopy (14, 15), and space-charge-limited current measurements (16). In an organic field-effect transistor (OFET) configuration, however, this type of behavior was observed in a very limited number of samples and only with specific dielectrics (17–23). The differences arise from the fact that, while the first techniques probe the bulk properties of the organic semiconductor, in OFETs, the charges accumulate at the functional interface of the device, i.e., between the organic semiconductor and the gate dielectric. Here charge motion is not only related to the intrinsic properties of the semiconductor layer but also to processes taking place at the organic–dielectric interface. For example, Fröhlich polarons form in devices fabricated on high-k inorganic dielectrics (strong coupling regime) (19, 24), and broadening of the density of states occurs due to static dipolar disorder in devices with polymeric dielectrics (weak coupling) (25, 26). As a consequence, the charges become localized, their mobility is reduced, and, in some cases, depending on the strength of the coupling, the transport becomes thermally activated. The conformation of the organic semiconductor molecule was also shown to affect the charge transport via the coupling of the charge carriers to the polarizability of the organic semiconductor (21). For systems in which two or more molecular conformers can coexist, orientational disorder was recognized to yield tunneling transport when the interconversion is prohibited and a thermodynamic nonequilibrium occurs (27).

In this article, we show that the inhomogeneous strain induced in the semiconductor film by virtue of a mismatch in the coefficients of thermal expansion (CTE) between the consecutive layers in a device increases the interfacial trap density, lowers the effective device mobility, and can induce a crossover from band-like to activated transport irrespective of the nature and quality of the organic semiconductor. A signature of new phenomena arising from strain effects was recently recognized by Frisbie and coworkers (28), who discovered a change in the work function of the organic semiconductor rubrene as a result of compressive and tensile strains. Takeya’s group (29) reported on an increase in charge-carrier mobility upon the application of compressive strain, which they assigned to the reduction in the dynamic disorder as a result of minimizing molecular vibrations. Nickel and coworkers (30) found that pentacene crystals transition between two polymorphs to reduce the mechanical strain created in the lattice due to differences in contraction/expansion behavior of the film and the substrate. Nanoscale confinement effects during solution processing have also been shown to tune the polymorphism by altering the lattice constants of 6,13-b(triisopropylsilylethynyl)pentacene (TIPS) pentacene films (31). In other studies, the crystals in contact with different surfaces were reported to crack upon cooling, due to strain formation, an effect that was greatly reduced or eliminated with slow cooling (32–34). In the present work, we focus exclusively on devices for which the cooling/heating is performed sufficiently slowly that no irreversible change (i.e., cracking) is induced. This was confirmed by the recovery of the electrical properties upon a heat/cool cycle. We tune the thin-film morphology and structure by varying processing parameters and use these films in combination with different dielectrics, including “vacuum gap” and SiO₂, as well as SiO₂ modified with an ultrathin layer of polystyrene. In doing so, we assess ratios between the CTEs of the organic semiconductor and the gate dielectric varying between 1 and 30. By combining our results with data extracted from the literature, we discover a universal dependence between the activation energies of charge transport in OFETs and the relative thermal expansion of the organic semiconductor and dielectric layer. Our analysis indicates that observations of band-like transport in OFETs are only possible if the thermal expansions of the dielectric and semiconductor layers are similar, and that a transition to an activated transport occurs when CTE ratio is greater than ∼3, irrespective of materials used. We hypothesize that this transition is a result of the electronic traps induced by the strain arising in the organic semiconductor film. We propose that thermal expansion mismatch, a widely overlooked parameter despite its ubiquitous presence in layered devices, may be the key missing link to help achieve consistently high performance and band-like transport across a wide range of organic semiconductors.

Results and Discussion

Temperature Dependence of the Electrical Properties at Model Dielectric Interfaces.

All devices included in this study are bottom-gate, bottom-contact OFETs; see the schematic structure included in Fig. 1A. We first focused on two model dielectrics, namely the vacuum gap and thermally grown SiO₂, to evaluate the effect of a “free” interface with that of the most commonly used inorganic dielectric. For this comparison, we used the small-molecule organic semiconductor 2,8-difluoro-5,11-bis(triethylgermyl-ethynyl) anthradithiophene (diF-TEG ADT), a material that exhibits charge carrier mobilities greater than 5 cm²⋅V⁻¹⋅s⁻¹ and is compatible with large-area spray deposition (35). We first focused on crystals obtained by slow evaporation of the solvent using the solvent-assisted crystallization (SAC) technique (36). Typical transfer and transport characteristics are presented in Fig. 1 B and C, respectively. Fig. 1D shows, in black squares, the evolution of mobility with temperature for a vacuum-gap OFET. The monotonic increase in mobility with lowering temperature is a signature of band-like transport at the diF-TEG ADT–vacuum interface, similar to results obtained in other molecular crystals (20, 37, 38). In contrast, OFETs fabricated with the same material, but on SiO₂ dielectric, exhibit an activated behavior with a small activation energy E_A = 19.7 ± 6.6 meV (Fig. 1D, blue circles). The activated thermal behavior is generally assigned to electronic states present in the semiconductor band gap, i.e., traps. To understand the effect of the traps on the temperature dependence of mobility, we estimated the interfacial trap density N_T as a function of temperature T from the subthreshold swing S, using the following expression (39):

$$N_T=\frac{C_i}{e^2}\left(\frac{eS}{ln10\cdot k_{B}T}-1\right).$$ [1]

Here, $C_i$ denotes the capacitance per unit area across gate dielectric, and $e$ is the elementary charge. More details on the evolution of the current–voltage characteristics with temperature are included in SI Appendix, Fig. S1 and Tables S1–S3. In the vacuum-gap device, N_T increases only slightly upon cooling (ΔN_T < 20%), and this is simply the result of the fact that trap occupancy increases with decreasing temperature, following Fermi–Dirac statistics (2) (Fig. 1E, black squares). A much more drastic change in N_T (ΔN_T ≈ 160%) is observed at the organic semiconductor–SiO₂ interface (Fig. 1E, blue circles). These results are also supported by the observed shifts in the threshold voltage, which became more negative in both cases, with a larger increase being recorded for the device on SiO₂ dielectric (ΔV_t = 11 V) compared with the air-gap dielectric (ΔV_t = 6 V). As the values of room-temperature N_T are similar for the vacuum-gap (2 × 10¹⁶ m⁻²⋅eV⁻¹) and SiO₂ devices (3 × 10¹⁶ m⁻²⋅eV⁻¹, slightly higher for the latter due to dielectric polarizability), we argue that the additional trapping states are extrinsic in nature and introduced during cooling of the sample through the strain arising in the organic film due to CTE mismatch between the semiconductor and SiO₂ layers. This effect is absent in vacuum–dielectric devices, where the free-standing surface of the crystal is not affected by the cooling cycle.

Fig. 1.

(A) Schematic illustration of the OFET structure used in this study. (B and C) The electrical properties of OFET with vacuum-gap dielectric. (D) Charge-carrier mobility and (E) interfacial trap density as a function of temperature in OFETs with vacuum-gap (black squares) and SiO₂ (blue circles) dielectrics.

Evaluation of the CTE Mismatch at the Semiconductor–Dielectric Interface.

To quantify the effects of strain in organic semiconductors, we investigated the CTE quantitatively. CTE, α, is defined as the change in the dimensions (L) of a material as a function of temperature (T),

$$\alpha =\frac{1}{L}\frac{dL}{dT}.$$ [2]

As organic semiconductors tend to be highly anisotropic, CTE must be evaluated for each crystallographic direction. To do so, we performed variable temperature powder X-ray diffraction measurements.

Fig. 2A, Top shows the diffraction patterns at 153 K (blue) and 233 K (red), respectively, for a diF-TEG ADT film deposited by SAC, then delaminated from the substrate, cut using a laboratory blade, and dispersed on a rotating cryoloop with paratone oil to minimize the preferential orientation. As previously shown, this material adopts a triclinic structure, with a 2D π-stacking motif (35). The film obtained by this method exhibits a strong (001) lamellar stacking texture and molecules oriented edge-on with respect to the substrate plane, which is parallel to the ab plane of the unit cell (Fig. 2B) (35). The monotonic shift in the peak positions with increasing temperature can be ascribed to thermal expansion, with no significant change in the diffraction pattern indicating that the crystals do not undergo a phase change within the temperature window investigated. We analyzed the unit cell parameters and obtained thermal expansions typical for organic molecular crystals: Δa = 0.23%, Δb = 0.29%, and Δc = 1.0%. The estimated in-plane CTE is therefore α_SAC = 32 ppm/K by taking the average of the expansions along the a and b axes (see SI Appendix, Methods 1 for details on calculations). We now define the interfacial thermal expansion mismatch (ITEM) simply as the ratio between the in-plane CTE of the organic semiconductor film and that of the dielectric layer (ITEM = α_OS/α_D), and we will use this parameter as the figure of merit for a quantitative evaluation of the CTE mismatch. With an α_D = α_SiO2 = 4.1 ppm/K characteristic to SiO₂ (40), the ITEM corresponding to the devices on SiO₂ dielectric presented in Fig. 1 is 7.9. Such a mismatch is not present at the interface between the crystal and vacuum/air, and thus the equivalent ITEM for the vacuum gap can be approximated to be unity.

Fig. 2.

(A) X-ray diffraction powder pattern of (Top) SAC (solvent-assisted crystallized), (Middle) LG, and (Bottom) SG diF-TEG ADT spin-coated films at 153 K (blue) and 233 K (red). (B) The (001) preferred orientation characteristic to SAC and LG films. (C) Mix of (001) and (111) molecular orientations present in SG films.

Temperature-Dependent Transport Properties in Systems Exhibiting Tunable CTE.

The coexistence of several polymorphs or textures is a common occurrence in small-molecule organic semiconductors; hence the expectation that associated polycrystalline films should exhibit different in-plane CTEs is well founded. The chemical and crystal structures of diF-TEG ADT further allow us to tune the CTE, and therefore the ITEM value, by thin-film processing. We have shown recently that the microstructure of such molecules can be controlled via the manipulation of interactions at chemically tailored interfaces (41, 42). Large grains (LG) of molecules preferentially oriented along the (001) crystallographic direction form on surfaces treated with fluorinated self-assembled monolayers (SAMs) as a result of noncovalent interactions between the SAM and the organic semiconductor (Fig. 2B). In contrast, the regions where this interaction is absent or prohibited consist of small grains (SG) comprising a mixture of (001) and (111) textured crystals (Fig. 2C) (43–46). In Fig. 2A, Middle, we show the X-ray diffraction spectra at 153 K (blue) and 233 K (red), for the LG films obtained by spin-coating the solution over pentafluororobenzene thiol (PFBT) treated Au, removed from the substrate, and dispersed similarly to the SAC sample. We estimated α_LG = 39 ppm/K for this film using the same algorithm described earlier for the SAC films. A similar procedure was adopted for the SG films (Fig. 2A, Bottom), considering 50% content of each of the two molecular orientations (43) and averaging over the (001) and (111) planes, respectively (see SI Appendix, Methods 1). The resulting CTE value was estimated as α_SG = 115 ppm/K. We can thus vary the CTE of films of the same organic semiconductor by more than a factor of 3, from 32 ppm/K to 115 ppm/K, by modifying the deposition procedure and substrate chemistry.

We fabricated organic thin-film transistors of diF-TEG ADT with mixed texture by spin-coating the semiconductor over a substrate with SiO₂ dielectric and Ti/Au source and drain electrodes treated with PFBT. The film exhibited LG microstructure on and near the contacts and SG away from the contacts, mainly in the middle of the channel. By varying the transistor channel length, L, we thus monotonously varied the fractions of LG and SG textures in the channel and therefore their contribution to the overall device performance. Fig. 3A depicts the evolution of the mobility versus L for such devices. This figure was obtained by averaging the results over five devices for each channel length.

Fig. 3.

Spin-coated diF-TEG ADT transistors. (A) Evolution of the mobility with channel length. (B) Optical micrograph of a short channel device (L = 20 µm) completely covered with large grains. (C) Optical micrograph of a long channel device (L = 80 µm) showing the differential microstructure.

At short channel lengths, the mobility is high (µ = 3.0 ± 1.0 cm²⋅V⁻¹⋅s⁻¹ at L = 5 µm), and its value decreases as the channel length increases. This behavior, as well as the mechanism responsible for the microstructure formation, was described in detail in our earlier work (45). The high mobility is a result of the fact that, in these narrow channel-length devices, the LG that form on the treated contacts bridge the channel and connect source–drain electrodes to provide an effective path for the charge carrier transport (Fig. 3B). Similar film microstructure was also observed by Kymissis and coworkers (47) for the same material. As the channel length increases, the presence of the fine-grain regions of mixed molecular orientations in the middle of the channel diminishes the charge transport (Fig. 3C). This microstructure change is captured as a change in slope in the mobility versus channel length plot at the transition point (L = 25 µm), followed by a more abrupt decrease in mobility values as a function of channel length after this point, reaching µ = (6.7 ± 1.1)·10⁻⁴ cm²⋅V⁻¹⋅s⁻¹ at L = 100 µm. At channel lengths exceeding 25 µm, the film consists of high-mobility LG of (001) textured crystals in the vicinity of the contacts and low-mobility mixed texture of (001) and (111) SG crystals in the middle of the channel. The relative fraction of the SG in the channel increases with channel length (45). We therefore estimated the average CTE of films consisting of both LG and SG microstructures by a weighted sum including the contribution of the CTEs of the two microstructure types.

The ability to tune their relative areal fraction as a function of channel length provides us with access to films of different global CTE on the same dielectric. To relate this parameter to the electrical properties, we measured the evolution of mobility with temperature for devices of various channel lengths, for which the results are shown in Fig. 4A. The transport is activated for all samples, and the activation energy, E_A, is proportional to the channel length (Fig. 4B). For high-mobility devices, consisting of LG (5 µm < L < 25 µm), E_A is constant and small (E_A = 22.4 ± 2.9 meV). The increase in SG content for longer L is accompanied by a gradual decrease in µ and increase in E_A, which becomes E_A = 76.6 ± 7.3 meV for the largest channel investigated in this study (L = 100 µm). This relation between E_A, µ, and L results from the fact that, with increasing L, there are more grain boundaries and possibly more disorder in the texturing of the film, as suggested by Fig. 3A, and in agreement with other reports (48, 49). Our results strongly indicate now that, in addition to microstructure effects, there is a second reason for increased trapping with increasing channel length, and that is the introduction of inhomogeneous thermal strain during heating and cooling cycles. To test this idea, we evaluated the change in the interfacial trap density $N_T$ as a function of channel length and temperature in Fig. 5A. It can be observed that, at 300 K, a low $N_T$ accompanies the high mobility recorded in short channel length devices. $N_T$ increases gradually as the channel length increases and mobility decreases. Although this would suggest that the interfacial trap density determines the mobility value, note that the estimation of $N_T$ from S does not allow access to the energy distribution of these traps, as we have shown in our earlier work using other methods (50–52), and it is likely that traps located at different energy levels will impact the mobility and its temperature dependence in a distinct way (53). Devices with channel lengths between 5 µm and 25 µm, consisting entirely of LG, showed similar changes in $N_T$ within the accuracy of our measurements. The increase in $N_T$ with cooling ranges from $\mathrm{\Delta }{N}_T$ = 20% for devices with L = 10 µm to $\mathrm{\Delta }{N}_T$ = 110% for L = 100 µm; therefore, the additional contribution to the trap generation, due to the inhomogeneous thermal strain, should be considered. The dependence of $\mathrm{\Delta }{N}_T$ on channel length (Fig. 5B, black, left) mirrors the changes in CTE (Fig. 5B, blue, right), where the CTE was calculated as a weighted sum of the values corresponding to the LG and SG, respectively, by taking into account both the crystal lattice constant and the texture information (see SI Appendix, Methods 1). This observation supports our hypothesis that the additional traps are of extrinsic origin and result from the local strain induced during device cooling due to the CTE mismatch between the organic semiconductor and dielectric layer.

Fig. 4.

(A) Charge-carrier mobility as a function of temperature for OFETs of different channel lengths. (B) Activation energy as a function of channel length for the same devices. (Inset) The molecular structure of diF-TEG ADT.

Fig. 5.

(A) Points show interfacial trap density measured at different temperatures. Lines show fitting from trap generation model. (B) The increase in interfacial trap density between 210 K and 300 K as a function of channel length (black). The coefficient of thermal expansion, CTE, of the same films (blue) shows a similar trend. (C) The increase in interfacial trap densities with respect to 300 K value as a function of the coefficient of thermal expansion of thin films (black). In red is the dependence of the activation energy on the coefficient of thermal expansion of thin films.

Mechanism of Trap Formation Due to Thermal Strain: Modeling and Simulations.

The total trap density $N_T$ in Fig. 5A originates from the intrinsic trap densities present in the film before cooling ($N_{T,i})$ and the extrinsic traps generated due to thermal strain ($N_{T,th})$, such that $N_T=N_{T,i}+N_{T,th}$. The first term coincides with the trap densities estimated at room temperature, namely NT values estimated using Eq. 1, which result from the energetic and structural disorder at the semiconductor–dielectric interface (18, 50, 52, 54); we obtain $N_{T,i}\cong 3\times {10}^{16}{\text{m}}^{-2}\cdot {\text{eV}}^{-1}$ for SAC devices, $N_{T,i}\cong 2\times {10}^{16}{\text{m}}^{-2}\cdot {\text{eV}}^{-1}$ for devices consisting entirely of LG, and $N_{T,i}\cong 20\times {10}^{16}{\text{m}}^{-2}\cdot {\text{eV}}^{-1}$ for SG devices. The thermal trap density is proportional to the thermal strain, $N_{T,th}\propto {\epsilon }_{th}$, which, in turn, is proportional to the CTE mismatch, ε_th ≈ ITEM. Thus, a large increase in $N_T$ is expected for large CTE mismatch, i.e., large ITEMs. We further modeled the experimental points in Fig. 5A with the following expression:

$$N_T=N_{T,i}+x\cdot C_{LG}{N}_{T,i}\cdot {\left({\text{ITEM}}_{LG}\cdot \mathrm{\Delta }T\right)}^n+\left(1-x\right)\cdot C_{SG}{N}_{T,i}\cdot {\left({\text{ITEM}}_{SG}\cdot \mathrm{\Delta }T\right)}^n,$$ [3]

where x represents the areal fraction of LG, and C_LG and C_SG denote constants reflecting the effect of strain normalized per areal unit within the LG and SG, respectively. ITEM_LG = α_LG/α_SiO2 = 9.5, and ITEM_SG = α_SG/α_SiO2 = 28 reflect the mismatch in CTE for films consisting of entirely LG or SG on SiO₂, and ΔT is the temperature interval over which the measurements were taken. Indeed, we were able to model the data in all four different measurements in Fig. 5A simply by varying the content of LG and SG (i.e., the value of $x$ corresponding to the values extracted from the optical micrographs). We obtained $C_{LG}=6.7\cdot {10}^{-6}$ and $C_{SG}=7.6\cdot {10}^{-6}$, and $n$ varied between 1.51 and 1.54. The lines in this graph resulted from our modeling, and a good agreement with the experimental points can be observed. The dependence of the interfacial trap density on ITEM (SI Appendix, Fig. S2), as well as the dependence of the trap densities and activation energies on CTE of the thin films (Fig. 5C), denote clear correlations, thus further supporting our assumption that the inhomogeneous strains generated upon varying the temperature of the device induce additional trapping sites due to the thermal expansion mismatch.

To probe the physical basis of interface trap formation as a function of tensile strain, we make use of periodic density functional theory (DFT) calculations that model the materials interface. Specifically, the diF-TEG ADT crystal models consist of 1 × 4 × 1 supercells, each with eight molecules stacked along the b axis (Fig. 6A), oriented such that the a and b axes lie on the substrate surface; we note that the substrate is not explicitly included in the model, as we want to understand the impact of tensile strain in a general way (see SI Appendix for full model details). At 300 K, the diF-TEG ADT layer in both the vacuum-gap and SiO₂ dielectric devices are considered to be identical, i.e., perfect crystals with no defects. Evaluating the valence band charge density, for the unit cell parameters determined from the powder X-ray studies at 300 K, leads to the expected result that the charge density is completely delocalized (Fig. 6B) within the supercell. At 210 K, the crystal structure of the vacuum-gap device is compressed in all three directions to the unit cell parameters obtained from the powder X-ray measurements, as crystal relaxation is considered not to be impeded by contact with the Au electrodes. Here, the charge density also remains delocalized (Fig. 6B), as the intermolecular spacing is constant (although decreased compared with the structure at 300 K). We note that the evaluation of the electronic characteristics of each crystal structure obtained from the temperature-dependent powder X-ray studies shows very similar electronic band structures across the series, with the bands narrowing with increasing temperature. The result of the consistent band narrowing with increasing temperature is a bulk feature, and highlights the fact that there is more going on at the interface than a simple full contraction of the lattice. Hence, there is a need to explicitly account for tensile strain. To account for tensile strain in the SiO₂ device at 210 K, the supercell is derived from the cell parameters and molecular positions used for the vacuum-gap device at 210 K, with the b axis elongated to the value experimentally determined at 300 K. This process leads to an increased molecular spacing (by 0.16 Å) for those molecules close to the supercell boundary. This positional rearrangement arising from the thermal expansion-induced tensile strain localizes the valence band charge density to areas where the molecular density is greatest, i.e., where there appears a hole trap. These variations in the valence band charge density, along with the variations in the band structures reported in SI Appendix, provide the physical understanding of how the substrate interactions, and in particular the CTE mismatch, can induce charge carrier traps.

Fig. 6.

(A) Representation of the 1 × 4 × 1 supercell of the diF-TEG ADT crystal. (B) Valence band charge density evaluated at the X point at 210 and 300 K.

Toward a Universal Model.

Our experimental and theoretical results suggest that inhomogeneous strain, which arises from CTE mismatch between the dielectric and organic semiconductor, yields local distortions in the positions of the organic semiconductor molecules that lead to deviations from the molecular equilibrium positions found in the bulk crystal, which in turn induce variations in the charge density distributions and distinct modifications to the band structures at the dielectric–organic semiconductor interface. These effects represent a form of cumulative lattice disorder, which results in the formation of trap states of depth and density correlating with the structural imperfections (55, 56). Indeed, we find that, in the temperature range investigated here, the trap density at the interface between the diF-TEG ADT films and SiO₂ dielectric increases by 22% for the LG devices, and by 5 times more for the SG devices, where the difference in thermal behavior is significantly larger. In the vacuum-gap devices, on the other hand, the ${\epsilon }_{th}$ → 0, and therefore the total number of traps is given only by the quality of the crystal before cooling, in agreement with the results shown in Fig. 1E.

In Fig. 7, we summarize the results obtained in this work (red stars), and we also review results on 23 other types of OFETs, consisting of different dielectrics and/or organic semiconductors. In Table 1, we outline the values obtained from literature, along with the corresponding references. We plot the activation energy E_A as a function of the ratio between the coefficient of thermal expansion of the organic semiconductor and dielectric, which we labeled ITEM. The measurements where band-like transport was observed are included as E_A = 0 meV. We find a crossover from band-like to activated transport when ITEM ≈ 3, followed by an increase in E_A with increasing the thermal expansion mismatch, ITEM. The spread in the data may originate from several factors. First, the CTE values were estimated based on existing reports on the structures at different temperatures, and, in most cases, they correspond to a free-standing crystal. It was shown, however, that the CTE itself can vary depending on the substrate over which the crystal is placed during the cooling/heating cycle (28). Rubrene, for example, exhibits a CTE of 28 ppm/K when free standing (57), 46 ppm/K on PDMS (polydimethylsiloxane), and 17 ppm/K on Si (28). Second, in addition to the thermal strain, there is also a mechanical strain induced simply by the mismatch of the lattice constants between the dielectric and semiconductor. Third, the dielectrics summarized here (vacuum, Cytop, PEO [poly(ethylene oxide)], parylene, Al₂O₃, SiO₂, Si₃N₄, and Ta₂O₅) have different dielectric constants, which implies that the Fröhlich polaron landscape is different. Note that the dielectric constant of the gate dielectric, ε_r, also correlates positively with E_A: High dielectric constant dielectrics tend to polarize and thus trap slow-moving charges, a phenomena referred to as the Fröhlich polaron effect (19). A plot of the activation energy as a function of the dielectric constant of the gate dielectric (SI Appendix, Fig. S7) indicates no correlation between the two parameters when different sets of organic semiconductors and dielectrics are probed, suggesting that the polaronic effects alone are not responsible for the experimental observations. Although these effects are important, our results suggest that there is another important mechanism by which the dielectric can influence trapping and transport activation energies, namely the introduction of inhomogeneous microstrains upon varying the temperature of the device due to the CTE mismatch described above.

Fig. 7.

Activation energy (E_A) versus the ITEM coefficient, defined as the ratio between the coefficient of thermal expansion of the organic semiconductor and that of the dielectric. The red stars represent data obtained in this study, and the black squares are data taken from literature.

Table 1.

Activation energy (E_A), coefficient of thermal expansion of the organic semiconductor (α_OS), and that of the dielectric (α_D)

Number	Organic semiconductor	Dielectric	EA, meV (Ref.)	αOS, ppm (Ref.)	αD, ppm (Ref.)
1	Rubrene	Parylene	0 (19)	28 (57)	69 (69)
2	TIPS pentacene	Cytop	0 (23)	90 (70)	120 (71)
3	Rubrene	Air	0 (19)	28 (57)	/
4	P3HT	PEO	4 (72)	470 (73)	117 (74)
5	Naphthalene	Al2O3	8.3 (75)	55 (76, 77)	5.4 (78)
6	Rubrene	SiO2	10 (19)	28 (57)	4.1 (40)
7	Rubrene	Al2O3	25 (19)	28 (57)	5.4 (78)
8	Rubrene	Ta2O5	43 (19)	28 (57)	3.6 (79)
9	Rubrene	Si3N4	51 (19)	28 (57)	3.9 (80)
10	Anthracene	SiO2	40 (81)	43 (77)	4.1 (40)
11	TIPS-Pentacene	SiO2	30 (82)	90 (72)	4.1 (40)
12	Sexithiophene	SiO2	40 (83)	108 (84, 85)	4.1 (40)
13	diF-TES ADT	SiO2	50 (58)	162 (59, 86)	4.1 (40)
14	Pentacene	Al2O3	54 (87, 88)	140 (89, 90)	5.4 (78)
15	Tetracene	SiO2	70 (91)	72 (92)	4.1 (40)
16	TIPS pentacene	SiO2	60–80 (93)	90 (72)	4.1 (40)
17	Pentacene	Ta2O5	80 (94)	140 (89, 90)	3.6 (79)
18	Pentacene	SiO2	100 (94)	140 (89, 90)	4.1 (40)
19	Dihexyl-ADT	SiO2	79 (95)	243.7 (95)	4.1 (40)
20	pBTTT-C14	SiO2	86 (96)	238 (97)	4.1 (40)
21	P3HT	Al2O3	90.5 (87, 88)	470 (73)	5.4 (78)
22	P3HT	SiO2	110 (98)	470 (73)	4.1 (40)
23	F8T2	SiO2	122 (99)	400–500 (100)	4.1 (40)

Values taken from literature.

Fig. 7 suggests that band-like transport can be obtained in OFET measurements only if there is a minimal mismatch between the thermal expansion of the organic semiconductor and dielectric layers. This affirmation assumes that the intrinsic trap density, N_T,i in Eq. 3, is low. A low intrinsic defect density, however, although necessary, is not sufficient for attaining band-like transport. In diF-TES ADT single-crystal transistors on SiO₂ dielectric, for example (point 13), an activated transport was measured (58) despite a very low interfacial trap density obtained in these devices (59).

We further tested our hypothesis by inserting an ultrathin layer (∼10 nm) of polystyrene between the organic semiconductor film and the SiO₂ dielectric by blending the semiconductor with polystyrene, which can spontaneously stratify into bilayer structures during solution processing with the polystyrene layer buried between the semiconductor and SiO₂ (46, 60, 61). The polystyrene layer has a CTE of 72 ppm/K (62), which is very similar to the CTE of the organic semiconductor incorporated in these devices (diF-TES ADT, CTE =162 ppm/K), yielding an ITEM of 2.3. This layer contributes to the overall dielectric capacitance, as was discussed in detail elsewhere (46); it improves the morphology of the organic semiconductor film; and it forms a “buffer layer” protecting the semiconductor from the thermally induced strain from the SiO₂ surface.

In Fig. 8 A and B, we show transfer and transport curves, respectively, for an OFET of this structure, with channel length L = 80 µm and width W = 1,000 µm. The room temperature mobility for this device was 1.85 cm²/V⋅s, and the average mobility determined on 5 devices was 1.57 cm²/V⋅s. The high mobility and good consistency in the electrical properties are a result of the enhanced film morphology achieved at the surface of the polystyrene layer, as we have shown in our earlier work (46). In Fig. 8C, we plot the evolution of the interfacial trap density as a function of temperature; this value is roughly constant, as expected, because, in this case, the thermal strain is negligible. Consequently, the inverse dependence of mobility with temperature is observed (Fig. 8D). This last example demonstrates that, although technological applications might require transistors to be fabricated on substrates with significant CTE mismatch with the organic semiconductor, insertion of ultrathin dielectric layers exhibiting lower CTE mismatch can mitigate this problem, ensuring band-like transport is operant on a wide range of substrates, an important technological implication of this work.

Fig. 8.

(A and B) The electrical properties of organic transistors with polystyrene between diF-TES ADT organic semiconductor and SiO₂ dielectric. (C) Interfacial trap density as a function of temperature. (D) Charge-carrier mobility as a function of temperature.

Conclusions

The development of organic electronic devices relying on efficient charge transport will require materials whose near-intrinsic charge transport properties can be measured in a device-relevant configuration, such as in a transistor. To date, very few materials have proven amenable to characterization in such a configuration. We present here experimental results pointing toward a universal dependence of the transport activation energy on the relative mismatch of the CTE between the semiconductor and dielectric layers in OFETs, and find that band-like transport can be achieved for transistors characterized by low intrinsic interfacial defect density at the semiconductor–dielectric interface, and for which the two adjacent layers exhibit similar thermal expansion. Otherwise, the strain induced in the organic semiconductor layer results in trap generation and localization of the charges. The crossover from a band-like to an activated transport occurs for ITEM coefficients around 3. Further studies are necessary to understand the mechanism of trap generation through the inhomogeneous strain created at device interfaces due to thermal expansion. Nevertheless, our results suggest that a high-quality organic semiconductor layer is necessary, but not sufficient, to access the intrinsic charge transport properties of a material, and thus careful design of the device interfaces, not only in terms of roughness and chemistry, as previously shown, but also with respect to the thermal properties of consecutive layers, is critical for the construction of high-performance organic devices. Because organic semiconductors typically exhibit very low thermal conductivities, the heat generated during device operation cannot be easily dissipated, and thus the thermal properties of the consecutive layers become important. The insertion of an ultrathin insulating polymer layer between highly CTE mismatched dielectric and semiconductor layers is shown to mitigate the strain problem and lead to consistent observation of band-like transport in organic semiconductors on any substrate.

Materials and Methods

Field-Effect Transistor Fabrication.

To fabricate OFETs on SiO₂ dielectric, we started with highly doped silicon wafers, with a 200-nm SiO₂ layer. The source and drain electrodes were Ti/Au deposited by e-beam evaporation and patterned by photolithography and liftoff with channel lengths between 5 µm and 100 µm and channel width of 1,000 µm. Substrates were cleaned in hot acetone, isopropanol, and UV ozone before use. For contact treatment, the substrates were soaked in a 50-mM room-temperature PFBT (Sigma Aldrich) solution in high-purity ethanol (Sigma Aldrich) for 30 min followed by 5 min of sonication in ethanol. The SAC samples were deposited from a 0.25% wt solution of organic semiconductor in chlorobenzene (Sigma Aldrich), and additional solvent was placed around the substrates in a Petri dish with a closed lid to ensure a slow evaporation rate. The spin-coated samples were deposited from a 2% wt solution in chlorobenzene at 1,000 rpm spinning speed. The vacuum-gap devices were fabricated by placing thick SAC-grown crystals over Au contacts of short channel length, such that the crystals bridge the contacts without touching the underneath layer. Through atomic force microscopy measurements, we found that the crystal was not bent, which confirmed the presence of the vacuum gap. The polystyrene/SiO₂ dielectric devices were fabricated from a diF-TES ADT/polystyrene blend, following the procedures described in ref. 60.

Field-Effect Transistor Characterization.

The devices were measured in a vacuum probe station, under dark. At least five samples were measured for each type of device structure. The cooling rate was 1 K/min, and measurements were taken every 10 degrees, during the cooling cycle. The mobility was determined from the saturation regime, using the equation: $I_D=\left(W/2L\right)\mu C_i{\left(V_{GS}-V_T\right)}^2$, where $I_D$ denotes the current from source to drain, W and L are channel width and length, $\mu$ is the field-effect mobility, $C_i$ is the dielectric capacitance per unit area, $V_{GS}$ is the voltage between gate and source, and $V_T$ is the threshold voltage.

Temperature-Dependent Structural Studies.

Powder diffraction patterns were recorded on a Bruker diffractometer (MoK_α radiation; λ = 0.71073 Å) operated at 50 kV and 30 mA. Frame data were collected using Bruker SMART software while the powder sample was bathed in a Kryoflex-controlled nitrogen stream operated at 153 K and 233 K. Beam coordinates and detector distance were calibrated using a corundum standard sample. Single data frames were collected in 240-s exposures; area integration was performed using GADDS software, and data were merged using Merge software to produce the conventional 1D trace.

DFT Calculations.

All calculations were carried out via DFT. We used the Vienna ab initio simulation (VASP) package (63) with PAW (projector augmented-wave) potentials (v.52) (64, 65) and the Perdew–Burke–Ernzerhof functional (66). The kinetic energy cutoff was set to 400 eV. Gaussian smearing with a width of 0.05 eV was used. van der Waals interactions were taken into account with the DFT-D2 method of Grimme (67). Atoms were relaxed with the conjugated gradient method until forces were smaller than 0.01 eV/Å.

The Brillouin zone was sampled with a 2 × 2 × 1 Gamma-centered mesh during calculations on the diF-TEG ADT unit cell. We used the automatic flow software to order the unit cell vectors and to obtain a standardized path in the reciprocal space (68). Calculations on the benzene toy model used a Gamma-centered 1 × 10 × 1 mesh. During calculations on the diF-TEG ADT supercell, the k-point mesh was reduced to 2 × 1 × 1.