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Scientific Reports logoLink to Scientific Reports
. 2018 Mar 19;8:4811. doi: 10.1038/s41598-018-22974-7

Photoresponse of graphene field-effect-transistor with n-type Si depletion layer gate

Shiho Kobayashi 1, Yuki Anno 1, Kuniharu Takei 1, Takayuki Arie 1, Seiji Akita 1,
PMCID: PMC5859296  PMID: 29556066

Abstract

Graphene/semiconductor Schottky junctions are an emerging field for high-performance optoelectronic devices. This study investigates not only the steady state but also the transient photoresponse of graphene field-effect transistor (G-FET) of which gate bias is applied through the Schottky barrier formed at an n-type Si/graphene interface with a thin oxide layer, where the oxide thickness is sufficiently thin for tunneling of the charge carrier. To analyze the photoresponse, we formulate the charge accumulation process at the n-Si/graphene interface, where the tunneling process through the SiOx layer to graphene occurs along with recombination of the accumulated holes and the electrons in the graphene at the surface states on the SiOx layer. Numerical calculations show good qualitative agreement with the experimentally obtained results for the photoresponse of G-FET.

Introduction

Graphene is anticipated for use in high-performance electronic devices because of its extraordinary carrier transport property with single-atomic-layer thickness1. A graphene/semiconductor heterojunction is an emerging field of recent optoelectronic devices because of their low light absorption of graphene of 2.3%2, which is appropriate for high-performance transparent electrodes of optoelectronic devices such as photosensors and photovoltaic applications313. In such applications, the charge carrier transport through the graphene/semiconductor heterojunction is crucially important to assess the device performance. Generally, a graphene contact to the doped semiconductor substrates is described as a Schottky contact, which is useful in high-performance optoelectronics and photovoltaic devices4,10,1321. In addition, the presence of the thin tunnel barrier at graphene/semiconductor interface modifies the current-voltage characteristics of the junction. In the case of a metal/Si Schottky junction with a 2–10-nm-thick oxide layer at the interface, which is sufficiently thin for tunneling of charge carriers, the open circuit voltage and short circuit current under light irradiation are strongly suppressed because the photogenerated carriers recombine at the interface states in the thin oxide followed by tunneling22,23. Photoresponse similar to the ideal Schottky diode is observed only in a reverse bias regime. Similar characteristics were observed for a graphene-Si Schottky contact11,1315,18,20. In this case, both the trap state at the interface and the unique density of states of graphene should be considered for detailed analyses, where the energy position of Fermi level of graphene can be modulated by the field effect through the oxide layer.

The transfer characteristics of graphene field-effect transistor (G-FET) are governed by the induced charge carrier density by application of the gate voltage. For a graphene/doped Si junction with thin oxide layer at reverse bias, the induced charge carrier in graphene should be balanced to that of Si depletion layer induced by the reverse bias corresponding to the gate bias. Under light irradiation, the excess charge carrier generated in the depletion layer by light irradiation is accumulated at the Si/oxide interface because of the presence of the thin oxide layer, which increases the charge carrier density in the graphene and which consequently increases the drain current of the G-FET. This effect can be used to amplify the photoresponse of the graphene/Si Schottky junction, where the photoresponse appears on the drain current of G-FET11. Although detailed analysis of current–voltage characteristics of the graphene/Si Schottky junction with thin oxide layer has been conducted14, detailed analysis of the G-FET with the Si Schottky junction with the thin oxide gate remains an open subject.

This study investigates not only the steady state but also the transient photoresponse of G-FET of which gate bias is applied through the Schottky barrier formed at the n-type Si/graphene interface with a thin oxide layer, where the oxide thickness is sufficiently thin to tunnel the charge carrier. To analyze the photoresponse, we formulate the charge accumulation process at n-Si/graphene Schottky interface, where the tunneling process through the SiOx layer is considered in addition to the recombination of the accumulated holes and the electrons in the graphene at the surface states on SiOx layer.

Results and Discussion

Figure 1a presents a schematic illustration of the G-FET, where the depletion layer formed at the n-Si/graphene Schottky contact with thin SiOx layer acts as the insulating layer of the gate. All processes were performed in air, so that the channel part of the graphene is contacted to the Si surface through a 2–5 nm thick native oxide layer, which is sufficiently thin to tunnel the charge carrier22,23. As depicted schematically in Fig. 1b, the Schottky junction is formed at the interface between the Si and graphene, where the depletion layer at Si is developed at the positive gate bias (VGS) corresponding to the reverse bias of the Si/graphene Schottky junction.

Figure 1.

Figure 1

Model of G-FET with Si depletion layer gate. (a) Schematic of G-FET with Si depletion layer gate with thin SiOx layer at the interface and energy band profiles at Graphene/n-Si contact under reverse bias (b) in a dark condition and (c) under light irradiation.

At VGS > 0, the photoinduced hole–electron pair at the depletion layer is separated by the build-in potential, as presented schematically in Fig. 1c. For the light source used in this study, we used a light emitting diode (LED) with 623 nm wavelength. The absorption coefficient of Si to 623 nm light is ~3000 cm−1, so that the penetration depth of the 623 nm light is ~3 μm, which is much greater than the depletion layer thickness. Consequently, the hole–electron pair is generated throughout the depletion layer. The photo-excited electrons at the depletion region drift to the back gate electrode that is positively biased. The holes at the depletion region also drift toward the graphene channel. Thus, the either direct or trap controlled recombination of photogenerated hole and electron in the depletion region is suppressed. For an ideal Schottky junction, the holes are swept out to the graphene without restriction. However, under the presence of the thin SiOx, the holes are accumulated at the interface, followed by tunneling to the graphene, which closely resembles the inversion layer at MOS interface for n-type semiconductor. In this case, the electrons are induced in the graphene as the counter charge of the accumulated holes at the interface, which engenders the Fermi level shift of graphene. Additionally, one must consider recombination of the photogenerated holes and electrons in the graphene through the recombination center at SiOx. Consequently, the output current (IDS) of the G-FET is increased by light irradiation depending on the accumulated holes at the Si/SiO2 interface. Similar concept of the trap controlled band modification for the enhancement of photosensitivity has been reported in organic photodiodes2428.

Based on the model described above, we will formulate the light-intensity dependence of IDS, which is determined by the carrier density of graphene nG. For simplicity, we assume that the recombination life-times of both of electrons and holes are the same to match τR of the Shockley–Read–Hall (SRH) recombination model29. Furthermore, we assume that the intrinsic carrier density is negligibly small. Therefore, the resultant rate equation of accumulated holes, pSi, at the Si/SiO2 interface can be expressed as

dpSidt=pSiτT1τRnGpSinG+pSi+g, 1

where the first and second terms at right respectively correspond to the direct tunneling of the accumulated holes into graphene through the thin SiOx and the SRH recombination of the accumulated holes and the electrons in graphene at SiOx. Also, τT−1 stands for the tunneling probability of the accumulated holes, τR−1 expresses the recombination rate of the accumulated holes and the electrons in graphene at SiOx, and g denotes the photo-generation rate of holes in the depletion layer. The density of electrons in graphene at Fermi level EFG is known to be1,3032.

nG=(EFGEDP)2/π2vF2, 2

where EDP is the energy position of the charge neutral point, the Dirac point, is Planck’s constant, and vF represents the Fermi velocity of charge carriers in graphene (~108 cm/s). The tunneling probability τT−1 of holes into graphene is proportional to the graphene density DG(ETG) as final states for tunneling, where ETG is the energy position for hole tunneling. The graphene density at energy E is

DG(EEDP)=2(EEDP)/π2vF2, 3

which is also crucially important for ascertaining EFGEDP . At VGS higher than that at the gate voltage corresponding to the Dirac point (VDirac) under the dark condition, the excess VGS (=VGSVDirac) is applied for development of the depletion layer, so that one can assume EFG ~ EDP . At this condition, the energy state for tunneling of accumulated holes into graphene, which corresponds to the energy position of valence band top of Si at the SiO2/Si interface, is defined as Ev0. To clarify the tunneling process under light irradiation, we investigate the relation between ETG and Ev0, where we consider the Fermi level shift of graphene ΔEFG = EFGEDP and the additional potential drop at the thin SiOx, ΔVOX, because of nG as the counter charge of accumulated holes induced by photoexcitation, pSi. The relation between ETG and Ev0 under the light irradiation is given as

ETGEDP=Ev0+qΔVOXΔEFGEv0+qΔVOXπ2vF2nG. 4

Using the combination of Eqs (3) and (4), one can ascertain the density of states of graphene at energy of tunneling hole expressed as

DG(ETGEDP)=2(π2vF2)1(Ev0+qΔVOXΔEFG)2(π2vF2)1(Ev0+q2nG/COXπ2vF2nG), 5

where we assume that nG at dark is negligible. In this case, one can expect nG ~ pSi. As described above, tunneling probability τΤ−1 is proportional to the final density of states as

τT1αDG(ETG)=2α(π2vF2)1(Ev0+q2nG/COXπ2vF2nG),2α(π2vF2)1(Ev0+q2p/SiCOXπ2vF2pSi) 6

where α is the constant for proportional factor including the transmittance of tunneling electrons through the thin SiO2. Inserting this equation to Eq. (1) with nG ~ pSi and grouping pSi terms, one obtains

dpSidt2α(π2vF2)1pSi(Ev0+q2pSi/COXπ2vF2pSi)pSiτR+g=β1pSiβ2pSi2+β3pSi3/2+g, 7

where β1=2α(π2vF2)1Ev0+τR1, β2=2α(π2vF2)1q2/COX and β3=2α(πvF)1. At weak light intensity, the contribution of β1 term is dominant, where the tunneling process and the recombination at SiOx are the main causes. The light intensity (corresponding to g) dependence of pSi should be expressed as gθ with θ = 1 at the steady state, i.e., dpSi/dt = 0. For the case in which β2 originating from the voltage across the thin oxide layer is dominant at stronger light intensity, θ is approx. 0.5. As presented in Fig. S1 in Supplementary Information, the numerically calculated light-intensity dependence of pSi shows power law dependence with two slopes. It is noteworthy that nG ~ pSi. Thereby, one can expect that the light-intensity dependence of IDS shows power law dependence of gθ with θ < 1.

To investigate the depletion layer at the junction, the capacitance–voltage (CGVGS) characteristics of the Schottky junction were investigated with or without light irradiation, where the measured capacitance CG is a series capacitance consisting of a quantum capacitance of graphene CQ, the thin native oxide layer COX, and the depletion layer at the Si/SiOx interface, CD. As presented in Fig. 2a and b, at VGS < −0.5 V corresponding to the accumulation condition for MOS junction, the gate capacitance CG decreases with increasing VGS because of the decrease of CQ33,34. The maximum capacitance of CG−1 = Cox−1 + CQ−1 at VGS < −1 V is greater than 0.65 μF/cm2. The SiOx layer thickness is estimated as 5 nm or less. The corresponding band diagram is portrayed in Fig. S2 in Supplementary Information. To clarify the light irradiation effect on CG, the CG difference between the dark and the light conditions, ΔCG, is shown against VGS in Fig. 2c. At VGS < −0.5 V, ΔCG shows no marked light-intensity dependence.

Figure 2.

Figure 2

C-V characteristics under light irradiation. (a) VGS dependence of CG under various light intensities, (b) VGS dependence of CG−1 under various light intensities, and (c) VGS dependence of ΔCG under various light intensities. VDirac in the figure corresponds to the charge neutral point.

At VGS ~ −0.5 V, the VGS dependence of CG becomes weaker; CG depends slightly on the light intensity. This slight dependence implies that this bias region corresponds to the transition from accumulation to weak depletion of Si29 (Fig. S2b to S2c), which results in the appearance of CD. This CD induces the decrease of the applied voltage dependence of the Fermi level shift of the graphene, which gives rise to the weaker VG dependence of CQ. Under light irradiation, the depletion layer thickness decreases because of the photogenerated charge in Si (Fig. S2g), which causes the increase of CD and the accumulation of photogenerated holes at the SiOx/Si interface, resulting in the increase of voltage applied to SiOX: VOX. Further application of VGS increases the depletion region thickness at Si and therefore decreases CG in the dark condition in addition to the decrease of CQ. Under light irradiation, CG at −0.5 < VGS < 0.5 V increases concomitantly with increasing light intensity, which indicates a decrease of the depletion region by light irradiation. At VGS > 0.5 V, CG decreases to capacitance originated from the stray capacitance because the electrode pads were connected in parallel.

Figure 3a presents the gate bias voltage VGS dependence of the current passing through the Schottky junction IG equivalent to the gate leak current of G-FET under conditions of various light intensities from dark condition to 641 μW/cm2, where both the source and drain of the G-FET were connected to ground. At VGS > 0, corresponding to reverse bias for the Schottky junction, IG in the dark is well blocked (<0.1 nA) by the Schottky barrier. Under the light irradiation, IG increases concomitantly with increasing light intensity to 63 nA at 641 μW/cm2. In this region, the photo-excited electrons are swept out through the depletion layer of n-Si, whereas the photo-excited holes are tunneled to the graphene through SiOx layer or recombined at the graphene-Si interface at the thin SiOx layer, as presented in Fig. 1c. IG at −0.5 V < VGS < 0.2 V under light illumination is suppressed, unlike the common Schottky junction behavior. This behavior is commonly observed at the Schottky junction of lightly doped n-Si with thin SiOx layer22,23. It originated mainly from the presence of thin SiOx layer at the interface, resulting in the increase of the direct carrier recombination of the photogenerated carriers at the depletion layer of n-Si14.

Figure 3.

Figure 3

Steady state electrical characteristics under light irradiation. (a) VGS dependence of IG corresponding to the current passing through the graphene/n-Si junction under various light intensities. (b) VGS dependence of IDS under various light intensities measured at VDS = 50 mV. (c) Light-intensity dependence of ΔIG and ΔIDS at VDS = 50 mV and VG = 1 V. The solid curve shown in the figure is the numerically calculated curve ΔIDS shown in Fig. S1.

The transfer characteristics of the G-FET under an illumination condition are presented in Fig. 3b, which is very similar to the case for conventional G-FETs1 at VG < VDirac. The drain current IDS at VG > VDirac in a dark condition remains almost constant, which implies that EFG ~ EDP, as assumed in the numerical calculations. Under light irradiation, IDS increases concomitantly with increasing light intensity of 8–11 μA with saturation behavior at higher VGS, where VDirac (VGS ~ 0.15 V) is the bias voltage for the charge neutrality point of G-FET determined at minimum IDS. The IDS difference between the dark-current and photo-current, ΔIDS, is 3 μA at 641 μW/cm2, which is 2–3 orders of magnitude larger than that of ΔIG depicted in Fig. 3a, indicating that the direct contribution of gate leak current to IDS is negligible.

Based on the band model depicted in Fig. 1b and c, IDS is governed by the accumulated holes at SiOx/Si interface, even under light irradiation, as described earlier. The ionized donor (positively charged) in the depletion layer gives limited impact to IDS at VGS > VDirac under light irradiation because of the slight increase of IDS in dark conditions. The light-intensity dependence of the saturated IDS under light irradiation at VG > VDirac indicates that the charge carrier density in graphene is determined by the accumulated photo-excited excess hole at the interface, where the density of the accumulated photo-excited excess hole is regulated by the recombination rate of excess holes through the thin SiOx barrier, as described above. The field effect mobility of hole in graphene was estimated as 800 cm2V−1s−1 from CG of around VGS = −0.5 V.

Figure 3c presents the light-intensity dependences of ΔIG and ΔIDS, both showing power law dependence of the light intensity. The light-intensity dependence of ΔIG can be fitted by one slope of 0.73. By contrast, the light-intensity dependence of ΔIDS comprises two slopes as predicted theoretically earlier. The experimental data are well fitted to the numerically calculated result shown in Fig. S1, as indicated by the solid curve in Fig. 3c. For the numerical calculations, vF = 0.8 × 106 m/s, τR = 18 ms, Evo = 0.05 eV, α = 2 × 10−34, SiOx thickness = 5 nm are used. The actual psi, which is proportional to ΔIDS, is unknown. For that reason, the vertical axis was adjusted with an arbitrary ratio of ΔIDS/psi. From a practical perspective for the photosensor, the ΔIDS is 2–3 orders of magnitude larger than ΔIG. This photocurrent amplification of G-FET with the Si Schottky gate gives rise to easier measurement of the light intensity than the simple graphene/Si Schottky diode, where the noise equivalent power (NEP) of the G-FET obtained at 8.9 μW/cm2 is 7 × 10−14 W/Hz1/2 (corresponding specific detectivity: 1 × 1011 Jones).

Transient response of G-FET is important for practical applications. The photoresponse time of the Schottky diode is usually explained by the simplified model with junction capacitance CD, internal series resistance RT, and load resistance RL, as portrayed schematically in Fig. 4a, where the photo-generated current IL is a current source determined by the light intensity. In our device structure, RL and RT consist of contact resistance, tunnel resistance, and resistance of the Si substrate. Based on the simplified model presented here, the time constant for rise time, τ0, is defined simply by CDRT, expressed as IL[1exp(t/τ0)]. In addition to this time constant, one must consider the time for hole accumulation at the Si/SiO2 interface, which induces the time dependence of IL determined by Eq. 7. Figure S3 presents the transient response of numerically calculated pSi corresponding to IL under various light intensities, where the used parameters are the same for those of light-intensity dependence in a steady state. The calculated data are well fitted by 1exp(t/τrise) with a different time constant, τrise, which depends on the light intensity. Consequently, one can expect that the transient photoresponse at light-on is given as the product of [1exp(t/τrise)][1exp(t/τ0)].

Figure 4.

Figure 4

Transient photoresponse. (a) Equivalent circuit of the Schottky photodiode. (b) Typical transient photoresponse ΔIDS of G-FET with n-type Si depletion layer gate under various light intensities at VDS = 50 mV and VG = 1 V. (c) Transient response of ΔIDS at light-on under various light intensities. Solid lines are fitting curves. (d) Light-intensity dependence of the time constant τrise obtained from the fitting for light-on. (e) Semi-log plot of transient response of ΔIDS at light-off with various light intensities. (f) Light-intensity dependence of the time constant τ1 for light-off.

Figure 4b presents the transient photoresponse of IDS on the G-FET, where the light intensity was varied from 0.91 to 257 μW/cm2. As might be readily apparent, the response time at light-on τrise decreases concomitantly with increasing light intensity, which is consistent with the calculated results based on the proposed model shown in Fig. S3, where the higher light intensity causes the faster charge accumulation at the interface. To investigate the transience time, we fitted the transient response at light-on with the function expressed as [1exp(t/τrise)] [1exp(t/τ0)]. As portrayed in Fig. 4c, the experimental data are well fitted as we expected, where τ0 determined from CDRT was fixed. Note that the lowest photoresponse obtained at 0.91 μW/cm2 is quite noisy and close to the dark signal, so that we could not obtain the reliable fitting curve. The experimentally obtained results were not fitted well by the simple exponential function. The time constant τrise obtained from the fitting clearly depends on the light intensity: it decreases from 12.5 to 1.6 ms with increasing light intensity, as portrayed in Fig. 4d. The solid line represents τrise obtained from the numerically calculated results presented in Fig. S3b, which well reproduces the experimentally obtained results indicating that the hole accumulation process at the interface accelerates the photoresponse time at higher light intensity, as we proposed. Note that the low power region around 3.3 μW/cm2 could not be well reproduced based on our simplified model. This is most likely that the contribution of recombination process becomes more dominant at low carrier density. This is a subject for further study.

The transient responses for the light-off condition were described by a double exponential function, as portrayed in Fig. 4e. At t > 3 ms, the decay can be expressed by τf = 17.8 ms for all light intensities, mainly because of the recombination time constant τR (see Eqs 1 and 7) for excess holes at the interface. For the numerical calculations presented above, τR = 18 ms was used. At t < 3 ms, the time constant τ1 at this region depends on the light intensity, as depicted in Fig. 4f. Time constant τ1 closely resembles τrise, as portrayed in Fig. 4d, which implies that the tunneling process of accumulated holes at the interface mainly contributes to the high decay rate. Results show that the proposed analysis can explain the experimentally obtained results qualitatively.

Conclusions

We demonstrated a photosensor consisting of G-FET with gate bias applied through the Schottky barrier formed at an n-Si/graphene interface, where a thin SiOx barrier of ~5 nm is present at the interface. The photocurrent amplification of G-FET with the Si Schottky gate gives rise to easier measurement of light intensity than the simple graphene/Si Schottky diode, where the noise equivalent power (NEP) of the G-FET obtained at 8.9 μW/cm2 is 7 × 10−14 W/Hz1/2. This amplification function is useful for practical applications. To analyze the photoresponse, we formulated the charge accumulation process at the n-Si/graphene interface, where the tunneling process through the SiOx layer was considered in addition to the recombination of the accumulated holes and the electrons in the graphene at the surface states on SiOx layer. The accumulated holes induce the Fermi level shift of graphene, which produces variation of the tunneling probability. The analytical framework proposed here is well described by the experimentally obtained results for both steady states and transient states. Moreover, it provides an effective means of analyzing charge carrier transport through the grapheme-based heterostructure through a thin tunneling barrier, which represents one path to achieving ultrathin opto-electronic devices in the future.

Methods

The device fabrication process was the following. First, metal electrodes consisting of Cr/Au (5 nm/30 nm) as a source and drain electrodes were fabricated on a Si substrate with a 300 nm-thick SiO2 layer using conventional photolithography processing. The resistivity of the n-type Si substrate used in this experiment is 8 Ωcm. Unlike common back-gate G-FETs, we removed the SiO2 layer (300 nm thick) between the electrodes using buffered HF. All processes were performed in air, so that the channel part of the graphene is contacted to the Si surface through a 2–5 nm thick native oxide layer. Subsequently, after a monolayer graphene was transferred onto the substrate using polymethyl methacrylate, it was trimmed using oxygen plasma etching to form the G-FET channel, where the graphene was synthesized using low-pressure chemical vapor deposition at 1000 °C using Cu foil as catalyst35,36. The channel length and width are, respectively, 70 and 100 μm.

Electronic supplementary material

Supplementary Information (280.1KB, pdf)

Acknowledgements

This work was partially supported by KAKENHI Grant Number 16H00920, 16K14259, 16H06504, and 17H01040.

Author Contributions

S.K. and S.A. conceived and designed the experiments, led the research, and wrote the paper. K.T. and T.A. contributed to analysis of the data. All authors discussed the results and assisted in manuscript preparation.

Competing Interests

The authors declare no competing interests.

Footnotes

Electronic supplementary material

Supplementary information accompanies this paper at 10.1038/s41598-018-22974-7.

Publisher's note: Springer Nature remains neutral with regard to jurisdictional claims in published maps and institutional affiliations.

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