Skip to main content
ACS Omega logoLink to ACS Omega
. 2018 Nov 1;3(11):14567–14574. doi: 10.1021/acsomega.8b02314

In Situ SiO2 Passivation of Epitaxial (100) and (110)InGaAs by Exploiting TaSiOx Atomic Layer Deposition Process

Mantu K Hudait 1,*, Michael B Clavel 1, Jheng-Sin Liu 1, Shuvodip Bhattacharya 1
PMCID: PMC6643752  PMID: 31458140

Abstract

graphic file with name ao-2018-02314r_0012.jpg

In this work, an in situ SiO2 passivation technique using atomic layer deposition (ALD) during the growth of gate dielectric TaSiOx on solid-source molecular beam epitaxy grown (100)InxGa1–xAs and (110)InxGa1–xAs on InP substrates is reported. X-ray reciprocal space mapping demonstrated quasi-lattice matched InxGa1–xAs epitaxy on crystallographically oriented InP substrates. Cross-sectional transmission electron microscopy revealed sharp heterointerfaces between ALD TaSiOx and (100) and (110)InxGa1–xAs epilayers, wherein the presence of a consistent growth of an ∼0.8 nm intentionally formed SiO2 interfacial passivating layer (IPL) is also observed on each of (100) and (110)InxGa1–xAs. X-ray photoelectron spectroscopy (XPS) revealed the incorporation of SiO2 in the composite TaSiOx, and valence band offset (ΔEV) values for TaSiOx relative to (100) and (110)InxGa1–xAs orientations of 2.52 ± 0.05 and 2.65 ± 0.05 eV, respectively, were extracted. The conduction band offset (ΔEC) was calculated to be 1.3 ± 0.1 eV for (100)InxGa1–xAs and 1.43 ± 0.1 eV for (110)InxGa1–xAs, using TaSiOx band gap values of 4.60 and 4.82 eV, respectively, determined from the fitted O 1s XPS loss spectra, and the literature-reported composition-dependent InxGa1–xAs band gap. The in situ passivation of InxGa1–xAs using SiO2 IPL during ALD of TaSiOx and the relatively large ΔEV and ΔEC values reported in this work are expected to aid in the future development of thermodynamically stable high-κ gate dielectrics on InxGa1–xAs with reduced gate leakage, particularly under low-power device operation.

Introduction

High mobility channel materials, e.g., InxGa1–xAs and Ge, coupled with metal-gate/high-κ dielectric gate structures and multigate transistor architectures were considered as an option for continued transistor scaling and the enhanced performance for high-speed electronics.1 The rationale for using low band gap InxGa1–xAs (0.53 ≤ x ≤ 1.0) is its superior electron mobility (μn), allowing for higher transistor drive current (ION) at lower operating voltages during n-channel field-effect transistors (FETs) operation.26 Furthermore, the μn of InxGa1–xAs epilayers has been demonstrated to be dependent on the epilayer’s crystallographic orientation.7,8 Additionally, high-κ gate dielectric/semiconductor heterointerface engineering approaches have been adopted to passivate surface dangling bonds at the dielectric/semiconductor heterointerface by forming an in situ or ex situ interface passivating layer (IPL) to achieve high interfacial quality and superior gate electrostatics with interface defect densities, Dit, as low as ∼4 × 1011 cm–2 eV–1. This approach has been successfully demonstrated using atomic layer deposited amorphous TaSiOx on (i) InP/InGaAs/InAlAs quantum well FETs,3 (ii) InGaAs FinFETs,4,5 and (iii) GaAsSb/InGaAs tunnel FETs.9,10 Moreover, successful integration of high-κ dielectrics, for example., Al2O3,1113 HfO214 and TaSiOx35,1518 on crystallographically oriented (100)InxGa1–xAs and (110)InxGa1–xAs would aid in paving the way for InxGa1–xAs FinFET adoption, of which a representative device architecture is shown in Figure 1.

Figure 1.

Figure 1

Cross-sectional schematic of a TaSiOx/InxGa1–xAs gate stack and its implementation in a FinFET device architecture.

Although atomic layer deposited TaSiOx high-κ dielectric layers have been investigated on the (100)InxGa1–xAs/InP system,35 the majority of the reported work has utilized chlorine (Cl)-based precursors, namely TaCl5 and SiCl41519 wherein the reaction byproducts formed during the process can have a detrimental impact on the dielectric quality, including but not limited to thickness nonuniformity and nonideal oxide stoichiometry (i.e., oxide charge).18 To circumvent these issues, we propose the adoption of Cl-free precursors, such as tantalum(V) ethoxide (Ta2(OC2H5)10) and tris(tert-butoxy)silanol (Si(OH)(OC(CH3)3)3), for the atomic layer deposition (ALD) of TaSiOx. These two precursors were used by Kukli et al.20 and Gordon et al.21 for the deposition of tantalum oxide and metal silicates/oxides for gate dielectrics, respectively. During the hafnium silicate ALD process using tris(tert-butoxy)silanol precursor, Gordon et al.21 demonstrated an abrupt and smooth 1 nm SiO2 layer at the interface of silicon substrate and the hafnium silicate. In addition, tunable thicknesses of metal silicate and metal oxide films in the range of 0.1–0.15 nm and 0.3–0.7 nm, respectively, per cycle were demonstrated.21 In this work, the in situ formation of an SiO2 passivating layer at the amorphous TaSiOx and crystallographically oriented InGaAs heterointerfaces can be achieved, using the experimental methodologies outlined in refs,20,21 because the 1 nm SiO2 layer was demonstrated per cycle21 during the deposition of hafnium silicate using the tris(tert-butoxy)silanol precursor on Si. The adoption of Cl-free precursors will avoid the detrimental formation of HCl during deposition, thereby negating both Cl contamination and incidental oxide etch during TaSiOx film growth. For this work, crystallographically oriented epitaxial (100)InGaAs and (110)InGaAs layers were achieved via the solid source molecular beam epitaxy (MBE) growth process, and the detailed material analysis was evaluated through X-ray diffraction (XRD) measurements, atomic force microscopy (AFM), and transmission electron microscopy (TEM). The growth of interfacial SiO2 and TaSiOx was achieved using ALD, and X-ray photoelectron spectroscopy (XPS) was employed to study the chemical nature, as well as the band alignment properties at the dielectric/InGaAs heterointerface. As revealed by TEM micrographs, a consistent thickness of ∼0.8 nm intentionally formed SiO2 IPL was successfully achieved on each of (100)InxGa1–xAs and (110)InxGa1–xAs. Demonstrated experimental results of ALD amorphous TaSiOx on (100)InxGa1–xAs and (110)InxGa1–xAs films with the in situ SiO2 passivating layer are important for achieving low gate leakage metal–oxide–semiconductor (MOS) devices.

Results and Discussion

Materials Analysis

Figure 2 shows the crystallographically oriented, beryllium (Be)-doped p-type (100)InGaAs and (110)InGaAs epitaxial structures used in this work. During growth, in situ reflection high-energy electron diffraction (RHEED) images were recorded in order to determine the surface reconstruction and qualitatively assess surface morphology at the growth front. Figure 3 shows the RHEED images from the surface of the (100)InxGa1–xAs and (110)InxGa1–xAs epilayers, revealing (2 × diffused-4)-fold and (1 × diffused-4)-fold surface reconstructions, respectively. Typically, a 4-fold surface reconstruction is not well-defined under arsenic-stabilized growth conditions,22 whereas sharp and luminous 4-fold surface reconstructions are readily apparent under metal-stabilized growth conditions (i.e., utilizing an excessively high growth temperature or insufficient As2 flux). It has been reported that (110)InxGa1–xAs epilayers exhibit streaky (1 × 1)-fold RHEED patterns when grown at a lower growth temperature of 280 °C,8 qualitatively different to the results observed here. We note that (1 × 1) surfaces, e.g., (100)Si, are ideal reconstructions typically unobserved on (100)-oriented III–V materials because of a nonuniform surface charge distribution (i.e., a polar surface); however, due to the nonpolar nature of (110)-oriented III–V surfaces, one could reasonably expect a lower-order, e.g., (1 × 1), surface reconstruction. Consequently, we attribute the observed difference in (110)InxGa1–xAs surface reconstruction to the increased growth temperature, which entails increased surface energy and a resulting change in the dimerization processes underlying surface reconstruction.23 That said, the distinctly sharp and luminous RHEED patterns observed from the surface of the InxGa1–xAs epilayers investigated herein demonstrate coherent two-dimensional epitaxy, which will be further evaluated by way of AFM and TEM in subsequent sections.

Figure 2.

Figure 2

Schematic diagram of MBE-grown crystallographically oriented epitaxial p-type InxGa1–xAs layers on InP substrates. The (100)InxGa1–xAs and (110)InxGa1–xAs layers were grown at 530 and 450 °C, respectively. In addition, 1.5 and 5 nm amorphous TaSiOx layers were deposited to characterize the interface and band alignment properties.

Figure 3.

Figure 3

RHEED patterns from the surface of the (100)InxGa1–xAs and (110)InxGa1–xAs epilayers were recorded during growth, exhibiting (2 × diffused-4) and (1 × diffused-4) surface reconstructions, respectively.

Surface Morphology via AFM

Demonstration of smooth surface morphology provides a key indicator for the quality of the as-grown materials, particularly so for (110)InxGa1–xAs epilayers because of their tendency to exhibit crystallographically faceted surfaces during and after growth.8,2426 It has been reported that lower growth temperatures (e.g., 280 °C) are needed to achieve smooth surface morphologies for (110)InxGa1–xAs epitaxially grown on (110)InP substrates.8 However, a balance must be maintained between the growth temperature, V/III ratio, and growth rate during growth of (110)InxGa1–xAs in order to achieve smooth surface morphologies and superior electrical transport and optical properties.8Figure 4a,b shows the 20 μm × 20 μm AFM micrographs of the (100)InxGa1–xAs and (110)InxGa1–xAs surfaces, respectively. The smooth surface morphology of the (100)InxGa1–xAs/InP structure indicates lattice-matched or closely lattice-matched growth having a root mean square (rms) roughness of 0.28 nm, in contrast to the 7.34 nm rms roughness of the (110)InxGa1–xAs structure. This can be attributed to the high growth temperature employed for the (110)InxGa1–xAs/InP structure, relative to the crystallographic orientation. As reported by Yerino et al.,8 reduced growth temperatures would limit the surface mobility of adatoms, thereby reducing the likelihood of hillock formation and lowering overall surface roughness. Moreover, Yerino et al. established a complex interdependence between the morphological and optical properties and Hall mobility as a function of growth temperature and the V/III ratio.8 Although a lower growth temperature and higher V/III ratio are needed to achieve a smooth surface morphology, the lower growth temperature promotes point defects.8 Thus, a higher growth temperature is desirable in order to mitigate the point defects at the cost of the formation of hillocks and roughness. In this work, no attempt has been made to optimize the surface morphology as a function of growth parameters.

Figure 4.

Figure 4

Surface morphology of the crystallographically oriented InxGa1–xAs layers grown on InP substrates. The measured surface roughnesses were 0.28 nm and 7.34 nm for the (100) and (110)InxGa1–xAs surfaces, respectively.

Compositional and Crystallinity Analysis via X-ray

Symmetric (004) and asymmetric (115) reciprocal space maps (RSMs) were recorded from the (100)InxGa1–xAs and (110)InxGa1–xAs epilayers in order to determine their degree of relaxation and In composition. Figure 5a,b shows the (115) RSMs from the (100)InxGa1–xAs/InP and (110)InxGa1–xAs/InP heterostructures, respectively. The reciprocal lattice points (RLP) of the InxGa1–xAs epilayer and the InP substrate are noted in each figure. Examination of Figure 5a reveals that the In composition of the (100)InxGa1–xAs epilayer was less than 53%, as indicated by the elevated (100)InxGa1–xAs Qz position with respect to the (100)InP substrate. We note that the peak separation between InxGa1–xAs and InP RLP centroids is a rapid qualitative assessment of the degree of lattice mismatch (and thus In composition), wherein higher Qz corresponds to a lower lattice constant epilayer (lower In composition) and vice versa. Using both the (004) (not shown here) and (115) RSMs, the In compositions of the (100)InxGa1–xAs and (110)InxGa1–xAs epilayers were found to be ∼49 and ∼53%, respectively. Additional cross-sectional TEM analysis will aid in identifying the effect on the structural properties, if any, of the lattice-mismatch in the (100)InxGa1–xAs/InP structure, and if there was any quantifiable crystallographic faceting during (110)InxGa1–xAs growth.

Figure 5.

Figure 5

Asymmetric (115) RSMs of the (a) (100)InxGa1–xAs/InP and (b) (110)InxGa1–xAs/InP structures, respectively, revealing their closely lattice-matched nature.

Surface Treatment of (100)InGaAs via NH4OH and (NH4)2S

Surface precleaning is necessary to remove deleterious native oxides from the InGaAs surface prior to the deposition of ALD TaSiOx. In order to confirm this, we have studied the impact of (i) NH4OH and (ii) (NH4)2S precleaning procedures and compared the results with Ar+-sputtered (100)InGaAs surfaces prepared in vacuo. Figure 6a–c shows the binding energy (BE) peak evolution of the In 3d, Ga 2p, and As 3d core levels (CLs) from the surface of a (100)InGaAs epilayer with the above stated surface treatments, as recorded via XPS. The as-grown (100)InGaAs surface was sputtered using low-energy Ar+ ions for 2 min under vacuum to remove residual native oxides and thus, it can be directly compared to the surfaces following the precleaning procedures defined earlier. We note that 1.5 nm Al2O3 was subsequently deposited after each surface treatment in order to encapsulate the treated InGaAs surface and prevent reoxidation while transporting the samples to the XPS analysis chamber. From Figure 6c, one can find that (NH4)2S effectively removed all native oxide species from the In0.49Ga0.51As surface without additional native oxide regrowth during the subsequent ALD of Al2O3. Likewise, the NH4OH surface treatment was similarly observed to remove all Ga, As, and In native oxide species from the In0.49Ga0.51As surface without additional native oxide regrowth during subsequent ALD Al2O3. On the basis of our previous (NH4)2S surface passivation results on GaAsSb,27 the additional small peak observed in the Ga 2p CL spectra is likely asymmetry introduced by low signal and high noise levels. Consequently, all investigated surface treatments (i.e., NH4OH and (NH4)2S) show promise for the removal of native oxides prior to the deposition of the intended TaSiOx dielectric.

Figure 6.

Figure 6

XPS spectra of (100)InGaAs surface: (a) postsputtered surface, (b) after 1.5 nm Al2O3 deposition with 10 min NH4OH surface treatment, and (c) 1.5 nm Al2O3 deposition with 10 min (NH4)2S surface treatment, showing the effective removal of arsenic and gallium oxides.

Si Incorporation in Ta2O5 via Si/Ta Super-Cycles for TaSiOx

Prior to the deposition of TaSiOx dielectric layer, Si and Ta pulse switching sequence was established during the thermal ALD process, in order to achieve targeted Si composition of approximately 20% in TaSiOx. Figure 7a shows the Si/Ta super-cycle sequence used during the thermal ALD of TaSiOx (∼20% Si, as determined via variable angle spectroscopic ellipsometry and XPS) on (100)InGaAs and (110)InGaAs. Prepulsing of ((CH3)3CO)3SiOH was implemented prior to the first Ta2(OC2H5)10 subcycle in order to intentionally form a thermodynamically stable interfacial SiOx region that would prevent reoxidation of the InGaAs surface. In this work, a 1:6 Si/Ta super-cycle was used in order to incorporate approximately 20% Si into the (Ta2O5)1–x(SiO2)x layer. To verify the incorporation of Si into the composite dielectric, XPS measurements were performed, wherein Figure 7b shows representative the TaSiOx surface survey spectra as a function of InGaAs surface orientation. One can find that the Si 2s and 2p BE peaks, located between 100 and 200 eV, correspond to the Si–O bonding environment, indicating the successful incorporation of SiO2 into the composite (Ta2O5)1–x(SiO2)x dielectric. Cross-sectional TEM analysis would then further confirm the formation of an SiO2 IPL, the heterointerface abruptness between TaSiOx and InGaAs as well as between TaSiOx and the IPL, and the thickness of the TaSiOx dielectric.

Figure 7.

Figure 7

(a) Representative ALD super cycle during TaSiOx deposition, and (b) XPS surface spectra from TaSiOx on (100) and (110)InxGa1–xAs. The positions of the Si 2s and 2p peaks indicate the incorporation of SiO2 within the composite dielectric.

TaSiOx/InGaAs Heterointerface Abruptness via TEM

Figures 8a–d and 9a–d show cross-sectional TEM micrographs of TaSiOx deposited on (100)InxGa1–xAs and (110)InxGa1–xAs, respectively, showing the entire heterostructure and each heterointerface of interest. One can find from Figure 8a that a dislocated region extending ∼150 nm in the growth direction exists because of the unintentional lattice mismatch at the (100)InxGa1–xAs/InP heterointerface, supporting the reduced In composition (and thus lattice constant) identified via XRD analysis (see Figure 5). Figure 8b–d shows the heterointerface between the TaSiOx and (100)InxGa1–xAs epilayer, including the intentionally formed SiO2 interface layer, with increasing magnification. Similarly, Figure 9a–d shows the heterointerface between TaSiOx and (110)InxGa1–xAs under increasing magnification. In both cases, we note that target TaSiOx thickness was approximately 5 nm. From Figures 8d and 9d, one can find a sharp interface between the intentionally formed SiO2 interlayer (and overlying TaSiOx dielectric) and the crystallographically oriented InxGa1–xAs epilayers. The previously discussed single SiO2 full-cycle (see Figure 7a) was found to contribute to the growth of an approximately 8 Å interfacial SiO2 layer, which is in agreement with the work reported in ref (21). Given the unusually high single-cycle growth rate observed, particularly given the low deposition rate of tris(tert-butoxy)silanol (TBOS)/H2O-based ALD reactions, the potential for a catalytic growth reaction between the Ta and Si precursors cannot be excluded. Nevertheless, the presence of such a thin SiO2 would be expected to aid in the passivation of electrically active defect states at the III/V oxide interface and provide a thermodynamically stable barrier layer.

Figure 8.

Figure 8

Cross-sectional TEM micrographs of the (a) TaSiOx/(100)InxGa1–xAs structure, and (b–d) oxide/InxGa1–xAs heterointerface with expanded views of the oxide/IPL/InxGa1–xAs heterointerfaces, respectively.

Figure 9.

Figure 9

Cross-sectional TEM micrographs showing the (a) TaSiOx/(110)InxGa1–xAs structure, (b) at the InxGa1–xAs/InP interface (c) expanded view of the InxGa1–xAs epilayer, wherein faceting can be observed, and (d) oxide/IPL/InxGa1–xAs heterointerface, respectively.

TaSiOx/InGaAs Heterointerface Band Alignment via XPS

In order to determine the electronic band structure at the TaSiOx/InxGa1–xAs heterointerface, XPS spectra were recorded for each orientation utilizing three distinct sample types: (i) 1.5 nm TaSiOx/1 μm InxGa1–xAs; (ii) 5 nm TaSiOx/1 μm InGaAs; and (iii) 1 μm InGaAs without the overlying TaSiOx. The valence band offset (ΔEv) can then be defined as28

graphic file with name ao-2018-02314r_m001.jpg 1

where, Inline graphic and Inline graphic are the Ta 4f7/2 and As 3d5/2 CL binding energies from the 5 nm, bulk-like TaSiOx (sample (ii)) and 1 μm InxGa1–xAs without the overlying TaSiOx (sample (iii)), respectively. EVBM is the valence band maxima (VBM) of the respective bulk-like materials (samples (ii) and (iii)), and is determined by the linear extrapolation of the leading edge of the valence band spectra to the spectral base line.29 We note that an accurate determination of the VBM value of each material is critical for the measurement of valence band offsets. According to Kraut’s method,28 the VBM can be determined by fitting an instrumentally broadened valence band density of states (DOS), for which the VBM is uniquely identified as the energy at which the DOS goes to zero, thereby allowing the extraction by linear extrapolation of the VBM from the experimental onset of photoemission.2830 ΔECL = Inline graphic is extracted from the XPS spectra at the TaSiOx/InxGa1–xAs interface, i.e., sample (i). Similarly, the TaSiOx band gap can be extracted via the linear extrapolation of the onset (threshold) of the energy loss spectrum, relative in this case to the O 1s spectrum, corresponding to electronic excitations because of inelastic losses during band-to-band transitions in thin oxide films. This has been demonstrated to be quantifiable from photoemission spectra, appearing in the higher kinetic energy range of primary CLs (i.e., O 1s photoelectrons).31,32 Having determined the interfacial ΔEV and bulk-like TaSiOx band gap, the conduction band offset (ΔEc) can be estimated using eq 2 to obtain the complete band alignment at the TaSiOx/InxGa1–xAs heterointerface

graphic file with name ao-2018-02314r_m005.jpg 2

Figure 10a–c show the CL and valence band spectra from each of the aforementioned samples for the epitaxially grown (100)InxGa1–xAs orientation. Figure 10a shows the BE information for the (i) Ta 4f CL and VBM spectra of bulk-like TaSiOx, where the Ta 4f7/2 CL is fitted to the 5+ oxidation state, which is its most stable form.33,34Figure 10a also depicts the BE information of the (ii) As 3d CL and VBM spectra for bulk InxGa1–xAs, and (iii) the BE information of the Ta 4f and As 3d CLs at the interface between TaSiOx and (100)InxGa1–xAs. All measured binding energies are summarized in Table 1. The values for Inline graphic, Inline graphic and ΔECL were determined to be 24.39, 40.82, and −13.91, respectively. Thus, the resulting ΔEv between TaSiOx and (100)InxGa1–xAs was determined to be −2.52 ± 0.05 eV using eq 1. An uncertainty of 0.05 eV arises from the selection of data points over the linear region when fitting the VBM data. Figure 10b shows the O 1s spectra used to fit the band gap of the TaSiOx thin film. The resulting band gap, extracted as the onset of the energy loss spectrum relative to the O 1s peak, was determined to be ∼4.60 eV. ΔEC was then calculated to be 1.3 ± 0.1 eV using eq 2 and taking into consideration the alloy composition of InxGa1–xAs to determine its corresponding band gap energy. Figure 10c schematically represents the resulting band alignment at the TaSiOx/(100)InxGa1–xAs heterointerface in accordance with the values summarized in Table 1.

Figure 10.

Figure 10

XPS spectra of the (a(i)) Ta 4f7/2 CL and VBM of bulk-like (5 nm) TaSiOx; (a(ii)) As 3d5/2 CL and VBM of bulk-like (100)InxGa1–xAs; (a(iii)) Ta 4f7/2 CL and As 3d5/2 CLs at the oxide/semiconductor interface taken from the 1.5 nm TaSiOx/(100)InxGa1–xAs sample; and (b) O 1s loss spectra used to extract the TaSiOx band gap. (c) Resulting band alignment at the TaSiOx/(100)InxGa1–xAs oxide/semiconductor interface.

Table 1. XPS CL-to-VBM Binding-Energy Difference and Band Offset Parameters for ALD Amorphous TaSiOx on Epitaxial (100)InxGa1–xAs and (110)InxGa1–xAs Epilayers.

BE difference (100)InxGa1xAs (110)InxGa1xAs
graphic file with name ao-2018-02314r_m010.jpg
40.82 ± 0.05 40.88 ± 0.05
  24.39 ± 0.05 24.16 ± 0.05
  –13.91 ± 0.05 –14.06 ± 0.05
ΔEV (eV) –2.52 ± 0.05 –2.65 ± 0.05
Eg of TaSiOx (eV) 4.6 4.82
ΔEC (eV) 1.3 ± 0.1 1.43 ± 0.1

Lastly, Figure 11a–c shows the CL and the valence band spectra from each of the aforementioned samples for the epitaxially grown (110)InxGa1–xAs orientation. Figure 11a shows the BE information of the (i) Ta 4f CL and VBM spectra of bulk-like TaSiOx. Also shown are the BE information for the (ii) As 3d CL and VBM spectra for (110)InxGa1–xAs, and (iii) Ta 4f and As 3d CLs at the TaSiOx/(110)InxGa1–xAs interface. As before, all measured binding energies are also summarized in Table 1. Following the XPS measurements for the (110)InxGa1–xAs/InP orientation, the values for Inline graphic, Inline graphic and ΔECL were determined to be 24.16, 40.88, and −14.06 eV, respectively. Thus, the resulting ΔEv of TaSiOx relative to (110)InxGa1–xAs was determined to be −2.65 ± 0.05 eV using eq 1, which was larger than the observed ΔEv for the (100)InxGa1–xAs orientation. Figure 11b depicts the O 1s spectra used to fit the band gap of the TaSiOx film, found to be ∼4.82 eV, which was also larger than the observed TaSiOx band gap for the (100)InxGa1–xAs orientation, potentially implying an increase in Si (SiO2, χ = 0.9 eV)35 incorporation within Ta2O5 for (110) oriented films. ΔEc was determined to be 1.43 ± 0.1 eV using eq 2 taking into consideration the compositionally dependent and measured InxGa1–xAs and TaSiOx band gaps, respectively. At a glance, SiO2, with its band gap of ∼9 eV, enhances the band gap of the resulting (Ta2O5)1–x(SiO2)x composite dielectric as a function of incorporation, thereby allowing for higher energy band discontinuities and increased carrier confinement.15,16,36Figure 11c illustrates the resulting band alignment of the TaSiOx/(110)InxGa1–xAs heterointerface in accordance with the values summarized in Table 1.

Figure 11.

Figure 11

XPS spectra of the (a(i)) Ta 4f7/2 CL and VBM of bulk-like (5 nm) TaSiOx; (a(ii)) As 3d5/2 CL and VBM of bulk-like (110)InxGa1–xAs; (a(iii)) Ta 4f7/2 and As 3d5/2 CLs at the oxide/semiconductor interface taken from the 1.5 nm TaSiOx/(110)InxGa1–xAs sample; and (b) O 1s loss spectra used to extract the TaSiOx band gap. (c) Resulting band alignment at the TaSiOx/(110)InxGa1–xAs heterointerface.

Conclusions

Crystallographically oriented epitaxial (100)InxGa1–xAs and (110)InxGa1–xAs layers were grown on InP substrates using MBE and evaluated for their structural and band alignment properties. X-ray analysis revealed the quasi-lattice-matched composition of the InxGa1–xAs epilayers, as further corroborated by TEM analysis. Cross-sectional TEM micrographs revealed abrupt heterointerfaces between the atomic layer deposited TaSiOx and InxGa1–xAs epilayers, essential for reducing interface scattering and increasing carrier mobility in InxGa1–xAs transistors. Moreover, TEM analysis identified the presence of an (intentionally grown) SiO2 interlayer at the TaSiOx/InxGa1–xAs interface, which could aid in the passivation of electrically active interface defect states. Valence and conduction band offsets between TaSiOx and InxGa1–xAs were determined to be greater than 1.0 eV, a necessary component of gate leakage suppression in TaSiOx/InxGa1–xAs MOS structures. Thus, these results provide guidance for the integration of TaSiOx-based high-κ gate dielectrics with InxGa1–xAs MOS devices in future FET applications.

Experimental Section

Material Synthesis

Crystallographically oriented p-type Be-doped 1 μm thick InxGa1–xAs (0.49 ≤ x ≤ 0.53) layers were grown on epi-ready (100)InP and (110)InP substrates via solid source MBE. InP oxide desorption was performed using an arsenic over pressure of ∼10–5 Torr at 575 and 550 °C for (100)InP and (110)InP, respectively, noting that the temperatures referred to throughout this work are the thermocouple temperatures. During oxide desorption and each InxGa1–xAs epilayer growth, in situ RHEED was used to monitor the sample surface. The growth temperature and the As2/(In + Ga) flux ratios were 530 °C/450 °C and 30/32 for the (100)InxGa1–xAs/(110)InxGa1–xAs samples, respectively. The reduction in growth temperature between (100) and (110) orientations was a necessary step in order to reduce the magnitude of crystallographic faceting on the sample surface during growth. Following each growth, the substrate temperature was reduced to 275 °C under a gradually reducing As2 over pressure, then further decreased to 150 °C for sample retrieval.

Materials Characterization

Each sample was characterized using AFM for surface morphology, high-resolution XRD for In composition and epilayer crystallinity, and cross-sectional TEM to elucidate the interfacial properties at the oxide/InxGa1–xAs interface. Cross-sectional TEM samples were prepared using conventional sample preparation methods, i.e.: mechanical polishing, dimpling, and Ar+ ion milling at low temperature. Band offsets between the ALD TaSiOx and each crystallographically oriented InxGa1–xAs epilayer were determined using a Phi Quantera scanning XPS microprobe instrument with a monochromatic Al Kα (beam energy of 1486.7 eV) X-ray source. During XPS measurements, a constant flow of electrons were maintained in order to neutralize positive charge accumulation on the oxide surface. In addition, the band gap of TaSiOx on each crystallographically oriented InxGa1–xAs surface was determined using O 1s loss spectra fitting. 1.5 nm TaSiOx/1 μm (100)InxGa1–xAs and (110)InxGa1–xAs samples were used for the measurement of binding energies at the oxide/semiconductor interface. Additionally, (i) 5 nm TaSiOx/1 μm InxGa1–xAs, and (ii) 1 μm InGaAs (i.e., without TaSiOx) were used to acquire BE data for bulk TaSiOx and InxGa1–xAs, respectively. The Ta 4f and As 3d CL BE spectra, as well as the TaSiOx and InGaAs valence band BE spectra, were collected with a pass energy of 26.0 eV and an exit angle of 45°. The binding energies were corrected by adjusting the C 1s CL peak position to 285.0 eV for each sample surface. Curve fitting was performed using CasaXPS v2.3.14 employing a Lorentzian convolution with a Shirley-type background.

During sample preparation, each InxGa1–xAs surface was degreased using acetone, isopropanol, and deionized (DI) water in 60 s sequential increments. After degreasing, samples were treated with 20% (NH4)2S for 10 min prior to TaSiOx ALD, wherein the sulfur passivation timing was selected based on our previously-reported work on GaAsSb.27 5 and 1.5 nm TaSiOx thin films were then deposited at 250 °C using a Cambridge NanoTech ALD system with tantalum(V) ethoxide, TBOS, and DI water as precursors. An initial TBOS/H2O full-cycle was used to prime the sample surface, followed by 16/3 (Ta/Si) super-cycles for the 5 nm/1.5 nm TaSiOx, respectively, wherein each super-cycle consisted of one SiO2 cycle for every six Ta2O5 cycles. The approximate growth rate used was 0.5 Å/cycle.

Acknowledgments

M.B.C. acknowledge partial support from the NSF under grant number ECCS-1507950. Authors would like to acknowledge S. Saluru and A. Ghosh for technical discussion. The authors would like to acknowledge the NCFL-Institute for Critical Technology and Applied Science as well as Virginia Tech Nanofabrication facilities for assistance during materials characterization and fabrication.

The authors declare no competing financial interest.

References

  1. Chau R.; Datta S.; Doczy M.; Doyle B.; Jin B.; Kavalieros J.; Majumdar A.; Metz M.; Radosavljevic M. Benchmarking Nanotechnology for High-performance and Low-power Logic Transistor Applications. IEEE Trans. Nanotechnol. 2005, 4, 153–158. 10.1109/tnano.2004.842073. [DOI] [Google Scholar]
  2. Takagi S.; Iisawa T.; Tezuka T.; Numata T.; Nakaharai S.; Hirashita N.; Moriyama Y.; Usuda K.; Toyoda E.; Dissanayake S. Carrier-Transport-Enhanced Channel CMOS for Improved Power Consumption and Performance. IEEE Trans. Electron Devices 2008, 55, 21–39. 10.1109/ted.2007.911034. [DOI] [Google Scholar]
  3. Radosavljevic M.; Chu-Kung B.; Corcoran S.; Hudait M. K.; Dewey G.; Fastenau J. M.; Kavalieros J.; Liu W. K.; Lubyshev D.; Metz M.; Millard K.; Rachmady W.; Shah U.; Chau R.. Advanced High-K Gate Dielectric for High-Performance Short-Channel In0.7Ga0.3As Quantum Well Field Effect Transistors on Silicon Substrate for Low Power Logic Applications. IEDM Technical Digest, 2009; pp 319–322.
  4. Radosavljevic M.; Dewey G.; Fastenau J. M.; Kavalieros J.; Kotlyar R.; Chu-Kung B.; Liu W. K.; Lubyshev D.; Metz M.; Millard K.; Mukherjee N.; Pan L.; Pillarisetty R.; Rachmady W.; Shah U.; Chau R.. Non-planar, Multi-gate InGaAs Quantum Well Field Effect Transistors With High-k Gate Dielectric and Ultra-scaled Gate-to-drain/Gate-to-source Separation for Low Power Logic Applications. IEDM Technical Digest, 2010; pp 126–129.
  5. Radosavljevic M.; Dewey G.; Basu D.; Boardman J.; Chu-Kung B.; Fastenau J. M.; Kabehie S.; Kavalieros J.; Le V.; Liu W. K.; Lubyshev D.; Metz M.; Millard K.; Mukherjee N.; Pan L.; Pillarisetty R.; Rachmady W.; Shah U.; Then H. W.; Chau R.. Electrostatics Improvement in 3-D Tri-gate Over Ultra-Thin Body Planar InGaAs Quantum Well Field Effect Transistors with High-K Gate Dielectric and Scaled Gate-to-Drain/Gate-to-Source Separation. IEDM Technical Digest, 2011; pp 765–768.
  6. Hudait M. K.; Dewey G.; Datta S.; Fastenau J. M.; Kavalieros J.; Liu W. K.; Lubyshev D.; Pillarisetty R.; Rachmady W.; Radosavljevic M.; Rakshit T.; Chau R.. Heterogeneous Integration of Enhancement Mode In0.7Ga0.3As Quantum Well Transistor on Silicon Substrate Using Thin (<2μm)Composite Buffer Architecture for High-speed and Low-voltage (0.5V) Logic Applications. IEDM Technical Digest, 2007; pp 625–628.
  7. Krivec S.; Poljak M.; Suligoj T. Electron Mobility in Ultra-thin InGaAs Channels: Impact of Surface Orientation and Different Gate oxide Materials. Solid-State Electron. 2016, 115, 109–119. 10.1016/j.sse.2015.08.009. [DOI] [Google Scholar]
  8. Yerino C. D.; Liang B.; Huffaker D. L.; Simmonds P. J.; Lee M. L. Review Article: Molecular beam epitaxy of lattice-matched InAlAs and InGaAs layers on InP (111)A, (111)B, and (110). J. Vac. Sci. Technol. B 2017, 35, 010801. 10.1116/1.4972049. [DOI] [Google Scholar]
  9. Dewey G.; Chu-Kung B.; Boardman J.; Fastenau J. M.; Kavalieros J.; Kotlyar R.; Liu W. K.; Lubyshev D.; Metz M.; Mukherjee N.; Oakey P.; Pillarisetty R.; Radosavljevic M.; Then H. W.; Chau R.. Fabrication, Characterization, and Physics of III-V Heterojunction Tunneling Field Effect Transistors (H-TFET) for Steep Sub-Threshold Swing. IEDM Technical Digest, 2011; pp 785–788.
  10. Dewey G.; Chu-Kung B.; Kotlyar R.; Metz M.; Mukherkjee N.; Radosavljevic M.. III-V Field Effect transistors for Future Ultra-low Power Applications. VLSI Technology Technical Digest, 2012; pp 45–46.
  11. Trinh H. D.; Chang E. Y.; Wu P. W.; Wong Y. Y.; Chang C. T.; Hsieh Y. F.; Yu C. C.; Nguyen H. Q.; Lin Y. C.; Lin K. L.; Hudait M. K. The Influences of Surface Treatment and Gas Annealing Conditions on the Inversion Behaviors of the ALD Al2O3/n-In0.53Ga0.47As MOSCAPs. Appl. Phys. Lett. 2010, 97, 042903. 10.1063/1.3467813. [DOI] [Google Scholar]
  12. Fu Y.-C.; Peralagu U.; Millar D. A. J.; Lin J.; Povey I.; Li X.; Monaghan S.; Droopad R.; Hurley P. K.; Thayne I. G. The Impact of Forming Gas Annealing on the Electrical Characteristics of Sulfur Passivated Al2O3/In0.53Ga0.47As (110) Metal-Oxide-Semiconductor Capacitors. Appl. Phys. Lett. 2017, 110, 142905. 10.1063/1.4980012. [DOI] [Google Scholar]
  13. Yokoyama M.; Suzuki R.; Taoka N.; Takenaka M.; Takagi S. Impact of Surface Orientation on (100), (111)A, and (111)B InGaAs Surfaces with In Content of 0.53 and 0.70 and on Their Al2O3/InGaAs Metal-Oxide-Semiconductor Interface Properties. Appl. Phys. Lett. 2016, 109, 182111. 10.1063/1.4966284. [DOI] [Google Scholar]
  14. Kent T.; Tang K.; Chobpattana V.; Negara M. A.; Edmonds M.; Mitchell W.; Sahu B.; Galatage R.; Droopad R.; McIntyre P.; Kummel A. C. The Influence of Surface Preparation on Low Temperature HfO2 ALD on InGaAs (001) and (110) Surfaces. J. Chem. Phys. 2015, 143, 164711. 10.1063/1.4934656. [DOI] [PubMed] [Google Scholar]
  15. Adelmann C.; Lin D.; Nyns L.; Schepers B.; Delabie A.; Van Elshocht S.; Caymax M. Atomic-Layer-deposited Tantalum Silicate as a Gate Dielectric for III-V MOS Devices. Microelectron. Eng. 2011, 88, 1098–1100. 10.1016/j.mee.2011.03.135. [DOI] [Google Scholar]
  16. Adelmann C.; Delabie A.; Schepers B.; Rodriguez L. N. J.; Franquet A.; Conard T.; Opsomer K.; Vaesen I.; Moussa A.; Pourtois G.; Pierloot K.; Caymax M.; Van Elshocht S. Atomic Layer Deposition of Tantalum Oxide and Tantalum Silicate from Chloride Precursors. Chem. Vap. Deposition 2012, 18, 225–238. 10.1002/cvde.201106967. [DOI] [Google Scholar]
  17. Chou H. Y.; Afanas’ev V. V.; Thoan N. H.; Adelmann C.; Lin H. C.; Houssa M.; Stesmans A. Internal Photoemission at Interfaces of ALD TaSiOx Insulating Layers Deposited on Si, InP and In0.53Ga0.47As. IOP Conf. Ser.: Mater. Sci. Eng. 2012, 41, 012019. 10.1088/1757-899x/41/1/012019. [DOI] [Google Scholar]
  18. Afanas’ev V. V.; Chou H.-Y.; Thoan N. H.; Adelmann C.; Lin H. C.; Houssa M.; Stesmans A. Charge Instability of Atomic-layer Deposited TaSiOx Insulators on Si, InP, and In0.53Ga0.47As. Appl. Phys. Lett. 2012, 100, 202104. 10.1063/1.4710553. [DOI] [Google Scholar]
  19. Han J. H.; Ungur E.; Franquet A.; Opsomer K.; Conard T.; Moussa A.; De Gendt S.; Van Elshocht S.; Adelmann C. Atomic Layer Deposition of Tantalum Oxide and Tantalum Silicate from TaCl5, SiCl4, and O3: Growth Behavior and Film Characteristics. J. Mater. Chem. C 2013, 1, 5981–5989. 10.1039/c3tc31172d. [DOI] [Google Scholar]
  20. Kukli K.; Ritala M.; Leskela M. Atomic Layer Epitaxy Growth of Tantalum Oxide thin Films from Ta(OC2H5)5 and H2O. J. Electrochem. Soc. 1995, 142, 1670–1675. 10.1149/1.2048637. [DOI] [Google Scholar]
  21. Gordon R. G.; Becker J.; Hausmann D.; Suh S. Alternating Layer Chemical Vapor Deposition (ALD) of Metal Silicates and Oxides for Gate Insulators. Mat. Res. Soc. Symp. Proc. 2001, 670, K2.4.1–K2.4.6. 10.1557/proc-670-k2.4. [DOI] [Google Scholar]
  22. Sears L. E.Investigations of Surface Reconstructions and Inverse Stranski Krastanov Growth in InGaAs Films. Ph. D. Thesis, The University of Michigan, 2009. [Google Scholar]
  23. Brillson L. J.Surfaces and Interfaces of Electronic Materials; Wiley-VCH: Weinheim, Germany, 2010. [Google Scholar]
  24. Bhat R.; Koza M. A.; Hwang D. M.; Brasil M. J. S. P.; Nahory R. E.; Oe K. OMCVD Growth of InP, InGaAs, and InGaAsP on (110) InP Substrates. J. Cryst. Growth 1992, 124, 311–317. 10.1016/0022-0248(92)90477-z. [DOI] [Google Scholar]
  25. Vardya R.; Mahajan S.; Bhat R. Microstructural Characteristics of (110) InGaAs Layers Grown by OMVPE. Mater. Sci. Eng. B 1995, 33, 148–155. 10.1016/0921-5107(94)01178-8. [DOI] [Google Scholar]
  26. Ueda O.; Nakata Y.; Nakamura T.; Fujii T. TEM Investigation of CuAu-I Type Ordered Structures in MBE-Grown InGaAs Crystals on (110) InP Substrates. J. Cryst. Growth 1991, 115, 375–380. 10.1016/0022-0248(91)90771-v. [DOI] [Google Scholar]
  27. Liu J.-S.; Clavel M.; Hudait M. K. Tailoring the Valence Band Offset of Al2O3 on Epitaxial GaAs1-ySby with Tunable Antimony Composition. ACS Appl. Mater. Interfaces 2015, 7, 28624–28631. 10.1021/acsami.5b10176. [DOI] [PubMed] [Google Scholar]
  28. Kraut E. A.; Grant R. W.; Waldrop J. R.; Kowalczyk S. P. Semiconductor Core-Level to Valence-Band Maximum Binding-Energy Differences: Precise Determination by X-ray Photoelectron Spectroscopy. Phys. Rev. B: Condens. Matter Mater. Phys. 1983, 28, 1965–1977. 10.1103/physrevb.28.1965. [DOI] [Google Scholar]
  29. Zhu Y.; Jain N.; Hudait M. K.; Maurya D.; Varghese R.; Priya S. X-ray Photoelectron Spectroscopy Analysis and Band offset Determination of CeO2 Deposited on Epitaxial (100), (110) and (111)Ge. J. Vac. Sci. Technol. B 2014, 32, 011217. 10.1116/1.4862160. [DOI] [Google Scholar]
  30. Zhu Y.; Jain N.; Mohata D. K.; Datta S.; Lubyshev D.; Fastenau J. M.; Liu A. K.; Hudait M. K. Band Offset Determination of Mixed As/Sb type-II Staggered Gap Heterostructure for n-Channel Tunnel Field Effect Transistor Application. J. Appl. Phys. 2013, 113, 024319. 10.1063/1.4775606. [DOI] [Google Scholar]
  31. Miyazaki S. Photoemission Study of Energy-band Alignments and Gap-state Density Distributions for High-k Gate Dielectrics. J. Vac. Sci. Technol. B 2001, 19, 2212–2216. 10.1116/1.1418405. [DOI] [Google Scholar]
  32. Miyazaki S. Characterization of High-k Gate Dielectric/Silicon Interfaces. Appl. Surf. Sci. 2002, 190, 66–74. 10.1016/s0169-4332(01)00841-8. [DOI] [Google Scholar]
  33. Atanassova E.; Spasov D. Thermal Ta2O5-Alternative to SiO2 for Storage Capacitor Application. Microelectron. Reliab. 2002, 42, 1171–1177. 10.1016/s0026-2714(02)00088-4. [DOI] [Google Scholar]
  34. Atanassova E.; Dimitrova T.; Koprinarova J. AES and XPS study of thin RF-sputtered Ta2O5 layers. Appl. Surf. Sci. 1995, 84, 193–202. 10.1016/0169-4332(94)00538-9. [DOI] [Google Scholar]
  35. Fujimura N.; Ohta A.; Makihara K.; Miyazaki S. Evaluation of Valence Band Top and Electron Affinity of SiO2 and Si-based Semiconductors Using X-ray Photoelectron Spectroscopy. J. Appl. Phys. 2016, 55, 08PC06. 10.7567/jjap.55.08pc06. [DOI] [Google Scholar]
  36. Cevro M. Ion-beam Sputtering of (Ta2O5)x-(SiO2)1-x Composite Thin Films. Thin Solid Films 1995, 258, 91–103. 10.1016/0040-6090(94)06356-7. [DOI] [Google Scholar]

Articles from ACS Omega are provided here courtesy of American Chemical Society

RESOURCES