Electronic Characteristics of MoSe₂ and MoTe₂ for Nanoelectronic Applications

Abstract

Single-crystalline MoSe₂ and MoTe₂ platelets were grown by Chemical Vapor Transport (CVT), followed by exfoliation, device fabrication, optical and electrical characterization. We observed that for the field-effect-transistor (FET) channel thickness in range of 5.5 nm to 8.5 nm, MoTe₂ shows p-type, whereas MoSe₂ with channel thickness range of 1.6 nm to 10.5 nm, shows n-type conductivity behavior. At room temperature, both MoSe₂ and MoTe₂ FETs have high ON/OFF current ratio and low contact resistance. Controlling charge carrier type and mobility in MoSe₂ and MoTe₂ layers can pave a way for utilizing these materials for heterojunction nanoelctronic devices with superior performance.

I. Introduction

Molybdenum diselenide (MoSe₂) and molybdenum ditelluride (MoTe₂) belong to a vast family of transition metal dichalcogenides (TMDs), which have attracted a great interest due to the potential benefits for variety of device applications. These layered materials have a common formula MX₂, where M is a transition metal from group IV-VII (Mo, W, Nb, etc.) and X is a chalcogen (S, Se or Te). One layer of MX₂ consists of a ‘three-layer” structure with hexagonally packed sheet of M atoms sandwiched between two sheets of X atoms. Weak van der Waals bonding between the layers enables thinning of TMDs crystals down to a single layer by mechanical or chemical exfoliation.

Electronic properties of TMDs depend on crystal structure, composition and the number of layers. For example, bulk MoSe₂ has an indirect bandgap of 0.85 eV while monolayer has a direct bandgap of 1.57 eV [1]. Similarly, bulk 2H-MoTe₂ is an indirect-gap semiconductor with a bandgap of 0.81 eV and a monolayer MoTe₂ exhibits a direct gap of 1.13 eV [2–3]. Due to its band-gap similar to Si (~1.1 eV) and a reversible metal-semiconductor phase transition, 2H-MoTe₂ is a promising candidate for advanced electronic applications, including flexible and transparent electronics [4].

Here, we fabricated the field-effect transistors (FET) to study the semiconducting properties of the exfoliated MoTe₂ and MoSe₂ ultra-thin layers. The MoTe₂ FETs with channel thickness in range of 5.5 nm to 8.5 nm showed p-type conductivity, whereas MoSe₂ FETs, with channel thickness less in range of 1.6 nm to 10.5 nm, showed n-type behavior. Additional annealing of the devices at 350 °C in vacuum for 3 min improved their performance, in particular the field-effect mobility.

II. Experimental

A. Crystal Growth:

MoSe₂ and MoTe₂ single crystals were grown by chemical vapor transport (CVT) using SeBr₄ and I₂ transport agents, respectively. The quartz ampoules with a pre-synthesized polycrystalline MoSe₂ and MoTe₂ powders were placed in a horizontal tube furnace with a temperature gradient so that the charge was kept at 1000 °C and temperature at the opposite end of the ampoule was at about 940 °C. Slow cooling (20 °C /h) of the ampoules was implemented after 7 days of growth to obtain single crystals of MoSe₂ and MoTe₂ as shown in fig.1 (a,b).

Figure 1.

(a) MoTe₂ crystals growing inside a quartz ampoule. (b) Representative pictures of individual MoTe₂ crystals

B. Exfoliation method:

MoTe₂ and MoSe₂ layers were mechanically exfoliated onto SiO₂/Si substrate. Prior to exfoliation, substrate was ultrasonically cleaned in acetone, 2-propanol and deionized (DI) water followed by oxygen plasma cleaning to remove the surface adsorbates [5]. MoTe₂ layers were exfoliated using standard Scotch tape technique, while MoSe₂ layers were exfoliated with a gold assisted method, adopted from [6]. The latter approach resulted in large-area (up to 150 μm in diameter), uniform few- to mono-layer thick MoSe₂ layers as confirmed by AFM. To determine crystal structure of both materials, Raman spectra were collected on exfoliated layers at room temperature using a 532 nm laser with a ~1 μm spot size and 0.3 mW power.

C. Device Fabrication:

For FET design and fabrication, the p++ Si substrate was utilized as a back-gate electrode, with the 300 nm thick SiO₂ layer acting as a gate dielectric. After exfoliation, optical lithography was conducted to create pattern of source/drain contacts for electrical measurements. Bi-layer Ti (15 nm)/ Au (150 nm) metal contacts were deposited using electron-beam evaporation followed by the lift-off process. Finally, the TMD channel was etched with RIE to obtain accurate channel length and width. Fig. 2 shows the optical image of a fabricated MoSe₂ device. Electrically conducting silver paste was applied to the Si side of the wafer for back-gated FET measurements.

Figure 2.

(a) Optical image of MoSe₂ fabricated device. (b) Etched channel of the material.

III. Results and Discussion

A. Raman Spectroscopy:

Raman spectroscopy is a non-destructive technique to analyze the crystal orientation. The lattice vibrational modes of MoTe₂ and MoSe₂ flakes were identified using Raman spectroscopy with laser of 532nm wavelength. Fig. 3a presents Raman spectra for MoTe₂ with the E¹_2g mode at 240 cm⁻¹ and the B¹_2g mode at about 290 cm⁻¹, in agreement with other reports [2, 7]. The spectra for the MoSe₂ flakes, Fig. 3b, exhibit an out-of-plane A_1g mode around 242 cm⁻¹, and an in-plane E_2g mode at 289 cm⁻¹. All lines are in excellent agreement with Raman studies on hexagonal MoTe₂ reported in the literature [7–10], which confirms the phase and quality of the flakes.

Figure 3.

Raman spectra of (a) MoTe₂ and (b) MoSe₂ flakes, exfoliated onto SiO₂/Si substrates.

D. Electrical Measurements:

Fig.4 shows schematic circuit measurement setup used to study the field-effect behavior of the devices. The current-voltage (I_ds-V_ds) characteristics of 5.6 nm thick MoTe₂ and 2.4 nm thick MoSe₂ devices at Vg = 0 V are shown in fig. 5(a) and fig. 5(b), respectively. After annealing the devices at 350 °C in vacuum for 3 min, the device performance improved as can be seen from the current-voltage characteristics in fig. 5.

Figure 4.

Schematic view of back-gated MoTe₂ FET.

Figure 5.

I_ds-V_ds curves of (a) MoTe₂ FETs with channel thickness 5.6 nm at V_gs= 0V. (b) MoSe₂ FETs with channel thickness 2.4 nm at V_gs = 0V, before and after thermal annealing.

The corresponding transfer characteristics of MoTe₂ and MoSe₂ FET devices are shown in fig. 6(a) and fig. 6(b), respectively. The gate leakage currents (I_gs) of the measured devices were negligible in a range of few picoamperes (pA).

Figure 6.

Transfer characteristics of back-gated (a) MoTe₂ (b) MoSe₂ of varying channel thickness FETs. The drain voltage (V_ds) was set to 2V and source was grounded.

A p-type channel conductivity is observed in MoTe₂ FET device as V_bg is varied from −60 V to 60 V as shown in fig.6 (a). MoTe₂ FET shows p-type conducting behavior with varying back-gate voltage (V_bg) which is also seen in earlier literatures [11]. On the other hand, thin channel MoSe₂ FET shows n-type transport behavior at varying gate voltage as shown in fig.6 (b) in agreement with early reports. [12] The ON/OFF current ratio is greater than 10⁶ for MoSe₂ transistors at V_ds = 2 V, which matches most of the other 2D materials such as MoS2 and WSe2 [13, 14].

Field-effect mobility (μ_FE) of the devices is calculated using the following formula:

$${\mu }_{FE}=\frac{d{I}_{ds}}{d{V}_{gs}}\left(\frac{L}{W{C}_{ox}{V}_{ds}}\right)$$ (1)

where L/W is the channel length-to-width ratio, C_ox = (ε₀ ε_r) /d is capacitance per unit area (F/cm²) of SiO₂ dielectric (where, ε₀ is the permittivity in vacuum, ε_r is 3.9 for SiO₂, and d is the thickness of SiO₂ which is 300 nm for devices used in this study). The calculated field-effect mobility from equation (1) is shown in fig.8 for MoTe₂ and MoSe₂ devices. Lower mobility value implies larger contact resistance and/or the presence of midgap trap states [13] in the TMD channel. At lower channel thickness, a significant increase in μFE is observed. This behavior of mobility, can be attributed to the presence of charge impurities at the interface [14].

Figure 8:

Mobility (cm²/V-s) versus channel thickness of (a) MoTe₂ and (b) MoSe₂ TFTs.

It was recently suggested that increase in mobility with thickness can be related to the reduced scattering of carriers by the Coulomb interaction [15]. Field-effect mobility saturates in MoTe₂, which may be due to finite thickness channel conduction near the gate dielectric/MoTe₂ junction [16]. As for the mobility decrease in thick channel, the interlayer coupling effect forms an inactive layer between metal contact and active layer. The stack of layers acting as series resistors and thus increases the contact resistance. [17] From fig. 8, it is observed that highest mobility obtained is ~ 0.9 cm²/ V·s and ~ 110 cm²/ V·s for MoTe₂ and MoSe₂ devices, respectively. Higher mobility of MoSe₂ compared to MoTe₂ transistors implies lower contact resistance in the MoSe₂ case.

IV. conclusions

In conclusion, we reported the electrical characteristics of MoSe₂ and MoTe₂ FETs. The fabricated MoTe₂ devices showed p-type conductivity for layer thickness less than 10 nm whereas, MoSe₂ transistors showed n-type transfer behavior for thin 1.6nm – 10.5nm flakes. At room temperature, MoSe₂ has very high ON/OFF current (~10⁶) compared to MoTe₂ transistors indicating very low contact resistance. From the study of both MoSe₂ and MoTe₂, different 2D materials can exhibit both n- and p-type behavior, which can pave way to utilize these materials for next generation MoTe₂ and MoSe₂ based nanoelectronic devices with improved performance.

Figure 7.

Output characteristics of the (a) MoTe₂ TFT for channel thickness 5.6nm showing p-type conductivity. (b) MoSe₂ TFT for channel thickness 2.4nm showing n-type conductivity.