2D materials for future heterogeneous electronics

Graphene and two-dimensional materials (2DM) remain an active field of research in science and engineering over 15 years after the first reports of 2DM. The vast amount of available data and the high performance of device demonstrators leave little doubt about the potential of 2DM for applications in electronics, photonics and sensing. So where are the integrated chips and enabled products? We try to answer this by summarizing the main challenges and opportunities that have thus far prevented 2DM applications.

Graphene and related two-dimensional (2D) materials have remained an active field of research in science and engineering for over fifteen years. Here, the authors investigate why the transition from laboratories to fabrication plants appears to lag behind expectations, and summarize the main challenges and opportunities that have thus far prevented the commercialisation of these materials.

Manufacturing technology

The key answer to this question, in our opinion, can be found by comparing the manufacturing readiness level of 2DM with standard semiconductor technology. What is needed, but not available yet, are turnkey manufacturing solutions that bring 2DM into silicon (Si) semiconductor factories. These “unit processes” then serve to integrate 2DMs with Si complementary metal oxide semiconductor (CMOS) chips in the back-end or front-end of the line^1,2. Deposition and growth technology of 2DMs is generally available at the wafer scale, but defects and contaminations are not yet compliant with specifications defined for production³. In addition, high process temperatures are typically required for high quality materials, which complicates direct growth on wafers and makes transfer technologies desirable. In principle, wafer bonding techniques could solve this, but have not reached full manufacturing levels⁴. At the device level, challenges are linked to the control of the dielectric- and contact interfaces to the 2DMs. The self-passivated nature of 2DM surfaces requires seeding to achieve the deposition of dielectrics with manufacturable methods, e.g. through atomic layer deposition. The resulting non-ideal interfaces limit device performance compared to the best laboratory demonstrators that use crystalline 2D insulators such as hexagonal boron nitride⁵. The same is true for electrical contacts to 2DMs, which only partly meet industry specifications⁶, and have not reached manufacturing readiness. The removal or etching of materials with high selectivity towards underlying layers is particularly challenging for 2DMs, because it requires atomic precision that can only be achieved with specific chemistry and dedicated atomic layer etching tools. Developing suitable processes will be tedious, because of the wide range of potential 2DMs and their combinations. As a result, etching chemistry and other, physical process parameters depend strongly on the specific situation which each require individual solutions. Doping, or the replacement of atoms in the crystal lattice, is a standard but crucial technology for silicon that relies on statistical distributions. In the 2DM field, the term doping is often used to describe charge transfer to the 2D layer from defects or molecular adsorbates in its vicinity. Controlling this “effective-doping” with precision and long-term stability remains a challenge, but so would classic doping, which would ideally require replacing 2D crystal atoms in a deterministic way, as shown for silicon technology⁷. Solving these crucial manufacturing bottlenecks is the explicit goal of the European Experimental Pilot Line for 2D Materials⁸. Co-integration of 2DMs with silicon CMOS technology will lead to a vast increase in chip functionality and enable the arrival of 2DM applications in the order of their device complexity, as illustrated in Fig. 1 and presented in the following.

Fig. 1. The era of geometrical or Dennard⁹ scaling of silicon technology ended around the turn of the century (green lines, “happy scaling”).

Since then, material and architecture innovations like copper interconnects¹⁰, high-k dielectrics with metal gates¹¹ and FinFETs¹² continued to drive Moore’s law (yellow lines, “less happy scaling”). Future scaling, or “More Moore”, may require thin nanosheet transistors, where 2D materials are considered ideal candidates (magenta, inset a and transmission electron micrograph)^13,14. Substantial performance and functionality gains are expected through “CMOS + X” integration, for example through sensors or high frequency electronics integrated on CMOS chips in the “More Than Moore” domain (inset c). Photonic integrated circuits may boost overall system performance and data handling capabilities, as well as unlock spectroscopic sensing applications, enabled by the optoelectronic performance of 2DMs. Computing-In-Memory or memristors will enable future neuromorphic computing applications and 2DMs may be ideally suited to be integrated with silicon CMOS (inset b). 2D quantum technologies are the least mature even at the laboratory level, but will benefit from all expected achievements as 2DMs enter semiconductor processing lines. 2D materials hold great promise to become the X-Factor for CMOS. This may be described as the era of heterogenous scaling, where new and additional materials provide unprecedented performance in three-dimensional chip stacks. Note that the Y-axis had a unit of “log2(#transistors/$)“ during the classic “Moore’s law” period. This has to be replaced in the era of heterogeneous scaling, and we suggest labeling it “Performance (a.u.)”, because the increase in performance will become application specific. It will be determined by (combined) factors like power consumption and efficiency, capability to perform pattern recognition, sensor fusion, etc., which results in somewhat arbitrary units due to the diverse functionalities and underlying technologies. (Insets: BEOL Introduction of Cu: Reproduced with permission from the AAAS, reference;¹⁰ High-k/Metal Gate: © 2007 IEEE. Reprinted, with permission, from Mistry, K. et al. A 45 nm Logic technology with high-k+metal gate transistors, strained silicon, 9 Cu interconnect layers, 193 nm dry patterning, and 100% Pb-free packaging. In 2007 IEEE International Electron Devices Meeting 247–250 (2007);¹¹ FinFET/New architectures: Republished with permission of IEEE, from Jan, C. -H. et al. A 22 nm SoC platform technology featuring 3-D tri-gate and high-k/metal gate, optimized for ultra low power, high performance and high density SoC applications. In 2012 International Electron Devices Meeting 3.1.1–3.1.4, 2012;¹² permission conveyed through Copyright Clearance Center, Inc.; 2D Materials: source: ref. ¹⁴).

More Moore

In general, gains in advanced semiconductor technology nodes are enabled through increased complexity of the integration architectures as well as holistic system-technology co-optimization. On the device level, leading semiconductor manufacturers are turning from FinFETs to stacked nanosheet FET architectures for the most advanced nodes of CMOS technology¹⁵. These nanosheet devices are currently still based on Si channels. Different flavors of such nanosheet architectures are in evaluation for future technology nodes, e.g. a so-called fork sheet design that allows tighter n-to-p spacing¹⁶, or integration of p and n-type nanosheets on top of each other¹⁷. Further scaling of the channel length requires shrinking the channel thickness by a similar factor to guarantee sufficient electrostatic control to suppress short channel effects. Trimming down the Si sheet thickness to the required values increases the charge scattering at the interfaces and results in a dramatic drop of the carrier mobility in the channel¹⁸, which ruins device performance. 2D semiconductors would be the ultimate version of nanosheets, because they are self-passivated in the 3rd dimension and charge carrier mobility is not strongly affected from surface scattering. Therefore, mobility remains high even at the atomic thickness limit. This unique behavior in principle enables real scaling for several technology nodes and is a strong incentive for the semiconductor industry to finally consider replacing silicon as the transistor channel material for future advanced nodes^13,14,19. This takes us back to the fundamental technical and scientific challenges which are linked to 2D integration. Here, identifying a suitable gate oxide stack and finding low ohmic contact schemes are particularly important. The former is essential to preserve the 2D material properties and to provide sufficient electrostatic control while limiting gate leakage currents⁵. 2D hexagonal boron (hBN) nitride has been widely applied to demonstrate high performance devices based on 2DMs, but its band gap and band offsets dictate that sufficient electrostatic control can only be achieved with one or two monolayers. This additional boundary condition leads to intolerably high gate leakage currents and other solutions will have to be found²⁰. Low ohmic contacts are required to maintain the benefits of the channel material in integrated circuits, because high resistance contacts can dominate and severely limit the integrated device performance²¹. Recently, substantially improved electrical contact resistance to MoS₂ has been reported by using semi-metallic Bismuth, which strongly suppresses metal induced gap states and the spontaneous formation of degenerate states in the MoS₂²². Nevertheless, more breakthroughs like this are needed to uncover and fully exploit the potential of monolayer transistors in CMOS circuits, to revive transistor downscaling and continue Moore’s law.

More than Moore

Applications in this category are likely first to enter the market, because they are manyfold, yet often very specific, so that they may tolerate defects and larger device variations.

2DMs are well-suited for gas, chemical and biosensing, because of their inherently high surface to volume ratio and versatile functionalization²³. Thus, any charged particle or molecule in the vicinity of certain 2D layered materials can modify their conductivity. However, ideal 2DMs are chemically inert, which means that chemically active defect sites strongly enhance the reactivity of 2D based sensors. Precise defect engineering is therefore essential for controlling sensitivity. In addition, sensor selectivity is essential. It may be achieved through surface functionalization or via arrays made from different sensors to mimic complex biological systems like the nose. Here, the portfolio of 2DMs with diverse sensor “fingerprints” may be utilized in conjunction with machine learning algorithms for sensor read-out.

Micro- and nanoelectromechanical systems (MEMS/NEMS) typically rely on mechanically movable parts on the chip. 2DMs exhibit exceptional mechanical properties that produce ultra-thin membranes, which translates directly to extremely high sensitivities in piezoresistive and opto-mechanical read out schemes, providing efficient signal transduction in NEMS. 2D membrane-based NEMS applications include pressure sensors, accelerometers, oscillators, resonant mass sensors, gas sensors, Hall effect sensors, and bolometers²⁴.

2DMs possess a range of advantages over existing technologies for optoelectronic and photonic applications²⁵, in particular outside of the spectral range that can be addressed with silicon. But even there, the direct band gaps of many semiconducting 2DMs provide advantages over silicon when it comes to light emission²⁶. Semi-metallic and small band gap materials like graphene, platinum diselenide or black phosphorous open up the infrared (IR) regime, where they compete with often costly III–V semiconductor technologies. Although the 2D nature translates into low absolute absorption in the vertical direction, the combination with IR-sensitive absorption layers leads to high detector responsivity²⁷.

Photonic integrated circuits

Photonic integrated circuits are considered as ultimate performance boosters for data transmission on and across computer chips²⁸. Connecting them to silicon electronics through optoelectronic converters at extremely high data rates is a key enabling technology. 2DMs, and in particular graphene, can be transferred onto photonic waveguides and provide wide-band photodetection and modulation^25,29,30. By removing the need for epitaxy, 2D-based photonics thus allows integrating active device components with Si photonics, but also with passive amorphous waveguide materials, like silicon nitride. This opens the door for facile integration of complex photonics applications on top of CMOS. In fact, some 2DMs like platinum diselenide can also be directly and conformally grown at temperatures below 400 °C³¹, which is a clear advantage in the quest to co-integrate photonic integrated circuits with silicon CMOS technology³². With the potential for integrated 2D light sources²⁶, 2DMs could ultimately enable the convergence of electronics and photonics and bridge the spectrum across the THz gap.

Neuromorphic computing

Neuromorphic computing aims to provide brain-inspired computing devices and architectures to realize energy efficient hardware for artificial intelligence applications³³. On the device level, requirements for neuromorphic computing include merging memory with logic to enable Computing-In-Memory and memristive device characteristics that mimic synapses and neurons. The former can already be realized with conventional memory technologies while the latter translates to threshold switches, and non-volatile memristors with a wide range of programmable resistance states^34,35. Though relatively nascent, 2D memristors have shown promising performance including switching energies on the order of zeta-joules, sub nano-second switching times, dozens of programmable states, and prototype artificial neural networks at the wafer-scale³⁶. This may enable applications in sensor systems and edge computing, for example by preprocessing of sensor data or on-chip sensor fusion³⁷. In addition to neuromorphic computing, 2D memristive devices have been shown to provide a wide range of non-computing functions including physically unclonable functions for security systems, and radio-frequency switching for communication systems³⁸.

From a scientific view, the phenomena of resistive switching in 2D devices have been attributed to ionic transport^39,40, defect/filament formation⁴¹ or phase change effects⁴². Notwithstanding these fundamental aspects, 2D memristive switching remains a topic enjoying increasing discussion and research. At the device level, a fundamental challenge is improving the number of times the resistance can be switched, so-called endurance, which requires further studies into the aging effect of the underlying mechanism(s). Similarly, improving material uniformity will be essential in order to realize massively connected device arrays that can mimic the hyper-connectivity and efficiency of the brain. Hearteningly, over a dozen 2DMs have exhibited memristive effect with this collection likely to grow in the coming years. Therefore, computational methods will be increasingly needed to guide experimental studies and optimize memristive devices for maximum performance.

Quantum technologies

2D materials and related van-der-Waals heterostructures offer also a variety of properties that make them highly tunable quantum materials interesting for spintronics and future quantum technologies⁴³. Two-dimensional material systems not only have the ability to enable artificial states of quantum matter, but fulfil a number of promises for solid-state quantum computing, to serve as key components in quantum communication circuits or allow interesting quantum sensing schemes. Indeed, 2DMs are a promising solid-state platform for quantum-dot qubits, as recognized quite early⁴⁴, for topological quantum computing elements, as well as coherent sources of single-photon emitters.

Quantum computing based on semiconductor quantum dots (DQs) uses individual spin states of trapped electrons. It relies, among other aspects, on long spin coherence times for which the host material plays an important role. This makes graphene a very interesting materials for spin qubits, thanks to its weak spin-orbit coupling (carbon atoms are very light) and weak hyperfine coupling (Carbon 12 is nuclear spin free). With the recent progress in confining single-electrons in gate-controlled QDs in gapped bilayer graphene^45,46, first spin-qubits are now around the corner. The possibility to make spin qubits in 2DMs will also allow evaluating the additional valley degree of freedom as possible qubit states; interesting proposals of valley- and spin-valley qubits exist. In addition, stationary qubits in 2DMs may afford coupling to photonic qubits realized by single-photon emitters (SPEs), for example in nearby wide band-gap hexagonal boron nitride or semiconducting transition metal dichalcogenides, such as WSe₂⁴⁷. In these 2DMs, SPEs have been demonstrated in recent years and this opens the door to distributed quantum networks, where photonic qubits could act as interlinks that entangle distant stationary qubits, e.g., spin-qubits. Such robust, bright and indistinguishable single-photon emitters are essential for creating photonic (flying) qubits for efficient quantum communication.

2D heterostructures are, moreover, promising materials for topological quantum computing, where quantum states are potentially better (i.e. topologically) protected against disorder, compared to standard quantum computing⁴⁸. Combining, for example, a quantum anomalous Hall insulator or graphene tuned into the canted anti-ferromagnetic quantum Hall phase with s-wave superconductors is a promising platform for topological quantum computing. In short, these advances make 2DMs and their heterostructures in many ways an exciting and promising platform for future quantum technologies.

Conclusions

2DMs provide exceptional performance benefits over existing technologies at the device level. They also carry the promise of easy integration with silicon CMOS technology. This makes them prime candidates for substantially expanding the functionality of silicon chips, also referred to as “CMOS + X”. We are confident that 2DMs will increasingly become such an X-factor in future integrated products. The bottleneck towards 2D material-based heterogeneous electronics is reaching the required manufacturing readiness levels, which may be different depending on the targeted application.

Author contributions

M.C.L., D.A., C.H., and C.S. co-wrote the manuscript and co-created the figure.

Peer review

Peer review information

Nature Communications thanks Peng Zhou for their contribution to the peer review of this work.

Competing interests

The authors declare no competing interests.