Abstract
A two-stage charger (PFC+LLC) is developed for Power Mobility Device (PMD) charging applications (i.e., power wheelchairs). The LLC topology is selected due to its ability to maintain ZVS operation over a wide range of load variations. This paper discusses the challenges of designing a dual-loop controller for an LLC-based charger with a wide operation region. It proposes modifying the inner current loop to maintain stable operation over a wide input and output range—the proposed internal loop control switches intelligently between two current controllers based on the output voltage level. A 300-W prototype is designed and tested with a resistive load. Moreover, simulation and experimental results are compared to validate the robustness and stability of the proposed controller.
Keywords: LLC converter, Resonant converter, Dual-loop control, Chargers
I. Introduction
A survey was conducted about the most used PMD’s (Power Mobility Devices, e.g., Power Wheelchairs, E-scooters, etc.) in the US to determine the electrical specifications of a public charging unit. Most of the charging power requirements are 30 W-300 W, a current range of 1–10 A, and a nominal voltage of ~24 V. To meet such specifications and guarantee universality, an LLC-based charger, as the one shown in Fig. 1, is often deployed. LLC converter is selected due to its ability to maintain ZVS operations over a wide range of loading conditions. As illustrated in Fig. 1, the input of the LLC converter is determined by the output voltage range of an active Power Factor Correction (PFC) unit. An off-the-shelf PFC module from Texas Instruments (UCC28180EVM) is selected for implementation in this study, and it will not be the subject of analysis. The PFC unit maintains a nominal output voltage of about 380 V, reaching for some conditions up to a maximum of 402 V. The specifications of the designed LLC converter are given in TABLE I. The broad operating range of the LLC converter is shown in Fig. 2. The LLC resonant circuit component values of the designed LLC converter are given in TABLE II.
Fig. 1.

Block diagram of the proposed PMD charger.
TABLE I:
LLC Specifications
| Parameter | Min | Nominal | Max |
|---|---|---|---|
| Input Voltage (V) | 379 | 390 | 402 |
| Output Voltage (V) | 23.2 | 26.2 | 29.2 |
| Output Current (A) | 1 | 5 | 10 |
| Switching Frequency (kHz) | 70 | 100 (fo) | 150 |
Fig. 2.

LLC operating region.
TABLE II:
Values of the LLC circuit components
| L r | 84 μH | C r | 30 nF |
| L m | 378 μH | C o | 250 μF |
Frequency modulation is known to be the most common control method in LLC converters. Generally, a single loop switching-frequency-to-voltage control is used in conventional LLC applications [1]. However, to maintain constant-current (CC) and constant-voltage (CV) charging, deploying a single PI-based linear voltage compensator would not sustain controlled CC-CV charging in a wide operation region [2]-[4]. Indeed, the CC-CV charging requires the charging current regulation, which a single-loop voltage controller does not provide.
To improve the transient response during startup and CC-CV charging of the battery, the dual-loop control of an LLC converter has been proposed and implemented in [2] and [3]. Moreover, dual-loop control provides good current regulation and overcurrent protection. The dual-loop control scheme implements two cascaded control loops: an inner rectifier-current loop and an outer battery voltage loop. If properly designed, a dual-loop controller can work for a wide operating zone. In [2]-[3], the authors present an LLC-based dual-loop controller design based on a simplified second-order small-signal model for wide load variation.
The circuit parasitic elements significantly affect the circuit dynamics of the current loop, especially for low-power operations. In [2], the authors also argue that the system has the least attenuation at the primary resonant frequency fr=(CrLr)−0.5/2/π, and that the controller should be designed at that point. However, fr may not be the most dynamic operating point when a comprehensive model that includes losses and parasitic is considered, which has not been explored in [2]. On the other hand, the authors in [4] utilize a dual-loop controller adopting a look-up table (LUT) in a feed-forward path for EV charging applications. The LUT is intended to tune the inner current loop controller and mitigate the system nonlinearities to ensure a high-dynamic operation over the full range of operating frequency. However, the use of LUTs is application-specific and requires additional analytical and numerical derivation steps to formulate accurate LUTs.
In this paper, dual-loop control is implemented at the LLC stage, and the analysis is focused on the dynamics of the two loops for a broad range of operating points. The study uses an accurate seventh-order small-signal model considering major circuit parasitics. The model is derived using the Extended Describing Function (EDF) method suitable for resonant converters. The model analysis reveals that the converter dynamic depends significantly on the output voltage, which in charging systems changes relatively slowly. The proposed controller comprises an outer voltage loop and a combination of two current controllers for the inner current loop – a high-voltage (HV) current controller and a low-voltage (LV) current controller. The inner control loop is allowed to switch between the two current controllers intelligently based on the output voltage level of the wheelchair battery. Finally, simulation and experimental results are presented to validate the robustness and stability of the proposed control scheme.
II. CONTROLLER DESIGN WITH EQUIVALENT RESISTIVE LOAD
The overall dual-loop control structure is given in Fig. 3. The key circuit parameters of the LLC converter are resonant inductance Lr, magnetizing inductance Lm, and resonant capacitance Cr. The outer loop control is output voltage Vo-to-rectified current Iref control. The output voltage error is fed to the controller Cvi, which sets the reference for the inner loop controller. The inner loop control is rectified-current Irec-to-frequency fsw control. The rectified current (a DC signal) is sensed by a high bandwidth DC sensor and passed through a low pass filter (LPF). The current error signal of the rectified current is fed to the controller Cif, which outputs the frequency of operation. The inner loop is generally 5–10 times faster than the outer control loop to ensure that the dynamics of the inner loop do not interfere with the operation of the outer loop control. Implementing the dual-loop controller requires the knowledge of two transfer functions; frequency-to-rectified-current Gif(s) and rectified-current-to-output-voltage Gvi(s). A 7th-order frequency-to-output voltage transfer function Gvf,norm (s) plant model is derived based on the EDF method in [5] and is used in this study. Gvf,norm (s) presented in [5] is normalized with respect to the resonant frequency f0. The Gvi(s) is derived in (1), where Ro is the equivalent load resistance and rC is the ESR of the capacitor. The Gvf,norm(s) and Gvi(s) are then combined to derive Gif,norm(s) presented in (2).
Fig. 3.

Dual-loop control of the LLC converter.
| (1) |
| (2) |
An initial strategy would be to design a controller based on the small-signal model for the nominal operating condition (point P0) and then test it for the boundary operating conditions (points P1-P8). The nominal and boundary points are listed in TABLE III. The Bode plots of the Gif,norm(s) and Gvi(s) for the nominal and boundary operating points are illustrated in Fig. 4. However, different operating conditions substantially vary the converter small-signal model, causing a significant divergence between the actual and the nominal small-signal models at other operating points.
TABLE III:
Nominal and boundary operating points
| Op. Point | Vin (V) | Io (A) | Vo (V) | Ro (Ω) | fsw (kHz) |
|---|---|---|---|---|---|
| P0 | 390 | 5 | 26.2 | 5.24 | 93 |
| P1 | 379 | 10 | 23.2 | 2.32 | 103 |
| P2 | 379 | 10 | 29.2 | 2.92 | 73.5 |
| P3 | 379 | 1 | 29.2 | 29.2 | 81 |
| P4 | 379 | 1 | 23.2 | 23.2 | 121 |
| P5 | 402 | 10 | 23.2 | 2.32 | 114 |
| P6 | 402 | 10 | 29.2 | 2.92 | 78.5 |
| P7 | 402 | 1 | 29.2 | 29.2 | 87.2 |
| P8 | 402 | 1 | 23.2 | 23.2 | 150 |
Fig. 4.

Bode plots (a) -Gif,norm(s) and (b) Gvi(s) for nominal and boundary operating conditions.
The Gif,norm(s) transfer function has a low-frequency zero at around 100 Hz. Therefore, the Cif(s) controller must have a compensating pole to allow the design of a controller with a reasonable crossover frequency below the switching frequency. Consequently, this paper proposes a Cif(s) structure consisting of one pole and an integrator. The current and voltage controllers were designed at the nominal steady-state operating point P0 and are given in (3) and (4).
| (3) |
| (4) |
The Cif(s) is designed with a crossover frequency of 510 Hz at P0 and a phase margin of 77°. The Cvi(s) is designed with a crossover frequency of 100 Hz at P0 and a phase margin of 95°. The effect of the various steady-state operating points on the loop gain phase margin of the designed Cif(s) and Cvi(s) controllers is illustrated in Fig. 5. The points related to the current controller are in ‘red,’ and the points of the voltage controller are in ‘blue.’ It can be observed that for the designed Cif(s), the crossover frequency ranges from 35 to 950 Hz. Similarly, for the designed Cvi(s), the crossover frequency ranges from 40 Hz to 140 Hz. The same pattern is used to present the phase margin variation. It should be noted that for the dual-loop controller to function correctly, the crossover frequency of the current loop should be at least five times greater than that of the voltage loop at all operating points. Fig. 5 shows that this condition is violated for points P1, P4, P5, and P8. Even more, at P8, the voltage loop becomes faster than the current loop, violating the loop nesting premises. It was observed that the voltage-loop dynamics (crossover frequency) increase for the low current operation, whereas the current-loop dynamics decrease for low-voltage and low-current operation. These conflicting dynamics make designing the dual-loop controller challenging. Additionally, due to the significant drop in the crossover frequency of the current loop with the output voltage variation (ten times drop), a single Cif(s) will not fulfill the dual-loop dynamics and phase margin requirements.
Fig. 5.

Comparison of the crossover frequencies and phase margins for different operating conditions for the nominal controller (designed at P0).
The effect of different variables on the controller is explored. For the current controller, it is observed that the crossover frequency drops significantly as the operation region transitions from the high output voltage to the low output voltage (P2 to P1, P3 to P4, P6 to P5, and P7 to P8), but the phase margin increases for the same transitions. The crossover frequency drops slightly as the operation region transitions from low input voltage to the high input voltage (P2 to P6, P3 to P7, P1 to P5, and P4 to P8), and phase margin changes marginally. The crossover frequency increases as the operation region transitions from low output current to the high output current (P3 to P2, P7 to P6, P4 to P1, and P8 to P5), but the phase margin is significantly reduced. Therefore, the output voltage was selected as a transition variable because it has a high impact on the controller dynamics and is also a slow-changing variable (in the case of battery). Therefore, this paper proposes a two-level control approach with a simple controller design. Two different current controllers Cif,L(s) and Cif,H(s) are designed and implemented based on the output voltage. The operating ranges for current controllers are shown in. The blue region marks the operating range for Cif,H(s), whereas the green region marks the operating range for Cif,L(s). The transition voltage between two controllers is selected to ensure a similar net change in dynamics (crossover frequency) between the two regions.
The overall architecture of the proposed controller is given in Fig. 7. In addition, a voltage threshold hysteresis band-based transition is added to avoid unwanted oscillations when switching between the two Cif(s) functions. It was observed that after these modifications to the Cif(s), a single PI-based Cvi(s) compensator was sufficient for stable operation over the entire operation region. The designed controllers are given by (5)–(7).
Fig. 7.

Proposed dual-loop control of the LLC converter.
| (5) |
| (6) |
| (7) |
The current controllers for each region are designed at operating points marked by Vout,max, Iout,max, and Vin,min for that region. These points (P2 and P9) have maximum crossover frequency and minimum phase margin. The operating points marked by minimum crossover frequency are located at Vout,min, Iout,min, and Vin,max (P8 and P11). A new controller Cif,L(s) redesigned at P9 increases the overall control bandwidth. The transition voltage for switching current controllers is selected to be 25.2 V as the net change of crossover frequency for both operating regions was approximately equal. A hysteresis band of 0.5 V is selected to avoid oscillation during the transition. It can be observed that both current controllers have at least 60° of phase margin. The voltage controller is designed at the maximum crossover frequency and minimum phase margin point (P3) such that the current loop crossover frequency at P8 is at least five times higher than the voltage loop gain crossover frequency. This ensures that the minimum ratio of controller dynamics is guaranteed for the entire operation region.
III. EXPERIMENTAL RESULTS
The experimental setup used for controller validation is shown in Fig. 9. A GaN-based half-bridge LLC PC board is custom designed. The LLC parameters are listed in TABLE IV. It utilizes GS66508B 650-V GaN switches by GaN Systems. The transformer and resonant inductor are wound on PQ Core. The PC95 ferrite core is selected because it has low core losses and low-temperature dependence of core losses. Multiple ceramic capacitors are used for resonant capacitors.
Fig. 9.

Wheelchair charger testing with a resistive load.
TABLE IV:
LLC Experimental parameters
| Transformer Design | |
| Core | PQ 35/35 |
| Core Material | PC95 |
| Magnetizing Inducatnce (Lm) | 378 μH |
| Primary leakage inductance of transformer | 13.55 μH |
| ESR Primary winding | 0.42 Ω |
| Primary leakage inductance of transformer | 0.4 μH |
| ESR Secondary winding | 22 m Ω |
| Inductor Design | |
| Core | PQ 35/35 |
| Core Material | PC95 |
| Resonant inductance | 68.3 uH |
| ESR of Resonant Inductor(rLr) | 95 mΩ |
| Capacitors | |
| Resonant Capacitor (CKC21C123JEGACAUTO) | 30 nF |
| Dissipation factor of resonant capacitor | 0.1% |
| Forward voltage drop of rectifier diode | 0.75 V |
| Output capacitance | 250 μF |
| ESR of output capacitance | 5.6 mΩ |
The converter was tested for a wide range of charging current (from 1 A–9 A) and output voltage (23.2 V–29.2 V). The resistive load was varied to emulate variable loading conditions. The testing range was limited to 9 A due to the limitation of the current transducer. The steady-state waveforms for operating conditions Vin=390 V, fsw= 90 kHz, Ro=3.3 Ω and Vout =27.2 V is shown in Fig. 10. The current of the rectifier diode shows that the operating point is close to the resonant frequency.
Fig. 10.

Steady-state waveform for Vin=390 V, fsw= 90 kHz, and Ro=3.3 Ω.
The controller is discretized at Ts=12.5 μs and implemented in the TMS320F28027 microcontroller. The designed current controllers (Cif,H(s) and Cif,L(s)) simulation and experimental transient responses for 0.5 A current step input are compared in Fig. 11. The steady-state conditions for testing are Vin=390 V, fsw= 90 kHz, and Ro=3.3 Ω. In Fig. 11 (a), the simulation step response has a rise time tr (10% to 90%) of 450 μs and 7% overshoot. The experimental response has approximate tr of 350 μs and 24% overshoot. In Fig. 11 (b), the simulation step response has tr of 360 μs and 9% overshoot. The experimental response has approximate tr of 260 μs and 18% overshoot. Overall, the simulated and experimental step responses are relatively close. The difference in simulated and experimental dynamics is that the experimental waveform has sensing noise and limited probe resolution.
Fig. 11.

Comparison of the simulated and measured small-signal step responses. (a) Cif,H(s). (b) Cif,L(s).
The dual loop controller is tested inside the operating region (Fig. 6) for different loading conditions. Two operating points (Pex1 and Pex2), as marked in Fig. 12, are selected to compare the overall simulated and experimental controller dynamics for inner and outer control loops. The system parameters are Vin=390 V, Ro=3.3 Ω. The steady-state output voltage is set at 23.5 V for Pex1 and 26.5 for Pex2. At Pex1 and Pex2, the step response of the current loop is analyzed for a step reference of 0.5 A, and the voltage loop is analyzed for a step reference of 1V. The crossover frequency is approximated from step responses using (8), where tr is the rise time of the step response.
Fig. 6.

Operating regions for the current controllers Cif,L(s) and Cif,H(s).
Fig. 12.

Selected test points (Pex1, Pex2) marked inside the operation region.
| (8) |
The experimental step responses for outer loop (voltage) and inner loop (current controllers) are shown in Fig. 13 and Fig. 14. At Pex1, the tr,inner,sim and tr,outer,sim are 0.55 ms and 95 ms respectively. The ratio of crossover frequency between the two loops is close to 45 dB. The tr,inner,exp and tr,outer,exp calculated from Fig. 13 is approximately 0.40 ms and 30 ms. The experimental ratio of crossover frequency between the two loops is close to 38 dB. At Pex2, the tr,inner,sim and the tr,outer,sim are approximately 0.7 ms and 110 ms. The ratio of crossover frequency between the two loops is close to 45 dB. The tr,inner,exp and the tr,outer,exp calculated from Fig. 14 are approximately 0.6 ms and 50 ms. The experimental ratio of crossover frequency between the two loops is close to 38.5 dB. It can be concluded that the dynamics between inner and outer control loops at these two points (Pex1 and Pex2) are decoupled in both simulation as well as in experiment. The simulation modeling can be further improved to reduce the error between simulation and experimental results.
Fig. 13.

Current and voltage step responses for Pex1. (a) Current controller step of 0.5 A at 23.5 V (b) Voltage controller step of 1 V at 23.5 V.
Fig. 14.

Current and voltage step responses for Pex2. (a) Current controller step of 0.5 A at 26.5 V (b) Voltage controller step of 1 V at 26.5 V.
The transition between two current controllers during charging could lead to unwanted transients. A ramped output voltage reference is given as input to the dual loop controller to simulate a realistic scenario, and the transition between two current controllers is observed. The reference voltage is ramped up slowly, as would be in the case of the battery. The ramped output is shown in Fig. 15. A GPIO is used to mark the transition between the two current controllers. It can be observed that the transition between the two current controllers is smooth without significant transients.
Fig. 15.

Ramped output voltage in the system with dual-loop controller. The GPIO signal marks the transition between two current controllers.
IV. CONTROLLER DESIGN WITH A BATTERY AS A LOAD
The dynamics of a battery charger are much better represented if the battery is modeled as a voltage source Vbatt in series with internal resistance rb. The modified circuit with the battery model is shown in Fig. 16. Vbatt and rb can be obtained from the charging/discharging tests of the battery. In this research, a series connection of two Lead-Acid (BW12550DC-IT 12V55AH) batteries is used. Vbatt is the open-circuit voltage of the battery. Vbatt varies depending on the State-of-charge of the battery between 23.2 V to 29.2 V. rb (~160 mΩ) is the sum of the average internal resistance of the battery and any parasitic resistance due to circuit connections. In Fig. 17, the open-loop simulation and experimental response of the converter are presented for different charging currents at operating point (Vbatt=23.64 V, rb =160 mΩ, Vin=380 V). This shows that calculated Vbatt and rb represent battery dynamics accurately at this operating point.
Fig. 16.

Dual-loop control of LLC converter with a voltage source (Vbatt) and series resistance (rb) as an equivalent load.
Fig. 17.

Comparison of simulated and measured open-loop responses to validate the LLC converter model for the battery load (Vin=380 V, Vbatt=23.64 V, and rb=160 mΩ).
The small-signal model of the converter with the battery load is required for controller design (Gvi,batt(s) and Gif,batt(s)). The Gif,batt(s) derivation is presented in Appendix-I. The Gif,batt(s) varies with the operating conditions, and its Bode plots for nine studied operating points and rb=160 mΩ are shown in Fig. 18. It can be observed that the overall envelope of the curves is similar to a resistive load. However, the dc gain variations are reduced from 35 dB for resistive to 15 dB for voltage source. While deriving the small-signal model Gvi,batt(s), it is assumed that the Vbatt is constant. Gvi,batt(s) expression is given by (9), and it is the same for the entire operation region if rb is assumed to be constant. The Gvi,batt(s) is shown in Fig. 19. The same control structure of a pole and integrator can be used to design the current controller. Two different current controllers can help in increasing the current loop dynamics. At the same time, the voltage controller can be a simple PI controller.
Fig. 18.

Gif,batt(s) for different steady-state operating points (rb=160 mΩ).
Fig. 19.

Gvi,batt(s) for different steady-state operating points (rb=160 mΩ).
| (9) |
The same design approach as discussed in Section II for the resistive equivalent load is applied to the design controller with a voltage source. To compare the effectiveness of the proposed current-loop design approach, two different controllers are designed with the same maximum crossover frequency of 700 Hz. The minimum crossover frequency is 175 Hz if two different voltage dependent current controllers are used. The crossover frequency is only 80 Hz if a single current controller is used. The voltage loop is designed at 20 Hz. The controllers transfer functions are given by (10)–(12). A comparison of the crossover frequency and phase margin for different operating points when the proposed controller is applied is shown in Fig. 20. It can be observed that dynamics between the two loops is maintained to ensure stable operation.
Fig. 20.

Comparison of the crossover frequencies and phase margins for different operating points when the proposed controller is applied.
| (10) |
| (11) |
| (12) |
V. CONCLUSION
This paper discusses the design of a dual-loop controller for an LLC converter for CC-CV charging of PMD batteries. An output voltage-dependent current controller is proposed, and its operation is verified experimentally for robust operation. A detailed description of the LLC controller design and the transition between two current controllers is provided. Controllers are designed for two load models – equivalent resistive load and a more realistic voltage source with series resistance load. A 300 W experimental charger prototype is developed and tested. The experimental results are provided to verify the implementation of the proposed controller for resistive loading conditions.
Fig. 8.

Comparison of the loop-gain crossover frequency and phase margin for different steady-state operating points when the proposed controller is applied.
APPENDIX-I
The equivalent model of the LLC Converter used for EDF derivation is shown in Fig. 21. To model the circuit, all the switching devices are assumed to be ideal. In the model, ω represents the angular switching frequency. and ϕ is the phase-shift angle (π value is adopted in this study).
Fig. 21.

Equivalent model of the LLC converter used for EDF modeling.
Differential equations that describe the converter behavior are given by (13)–(16):
| (13) |
| (14) |
| (15) |
| (16) |
After applying the fundamental harmonic approximation, the input voltage is given by:
| (17) |
The current dependent current source IR is:
| (18) |
| (19) |
The voltage dependent voltage source vp is in phase with ir:
| (20) |
| (21) |
The d-q decomposition is applied to quasi-sinusoidal state variables vin, ir, vCr, and im :
| (22) |
| (23) |
| (24) |
| (25) |
d-q decompositions of the quasi-sinusoidal signals are substituted into (13)–(16), producing the equations (26)–(32):
| (26) |
| (27) |
| (28) |
| (29) |
| (30) |
| (31) |
| (32) |
where,
The state, input, and output vectors are given as:
| (33) |
| (34) |
| (35) |
By nullifying the derivatives in (26)–(32) and then solving the set of nonlinear equations, the steady-state values of the seven state variables are calculated as:
| (36) |
| (37) |
Using the partial derivative operation, a Jacobian of the system of nonlinear equations can be calculated. It will be used to create the small signal model in the state-space form:
| (38) |
| (39) |
| (40) |
| (41) |
| (42) |
The set of transfer functions that links the input and output variables can be calculated as:
| (43) |
Contributor Information
Ujjwal Pratik, Electrical & Computer Engineering Department, North Carolina State University, Raleigh, USA.
Muhammad Abdelraziq, Electrical & Computer Engineering Department, North Carolina State University, Raleigh, USA.
Urvi Ahluwalia, Electrical & Computer Engineering Department, North Carolina State University, Raleigh, USA.
Zhansen Akhmetov, Electrical & Computer Engineering Department, North Carolina State University, Raleigh, USA.
Gabriel Chenevert, Electrical & Computer Engineering Department, North Carolina State University, Raleigh, USA.
Zeljko Pantic, Electrical & Computer Engineering Department, North Carolina State University, Raleigh, USA.
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