Unbiased Plasmonic-Assisted Integrated Graphene Photodetectors

Abstract

Photonic integrated circuits (PICs) for next-generation optical communication interconnects and all-optical signal processing require efficient (∼A/W) and fast (≥25 Gbs^–1) light detection at low (<pJbit^–1) power consumption, in devices compatible with Si processing, so that the monolithic integration of electro-optical materials and electronics can be achieved consistently at the wafer scale. Graphene-based photodetectors can meet these criteria, thanks to their broadband absorption, ultra-high mobility, ultra-fast electron interactions, and strong photothermoelectric effect. High responsivities (∼ 1 A/W), however, have only been demonstrated in biased configurations, which introduce dark current, noise, and power consumption, while unbiased schemes, with low noise and zero consumption, have remained in the ∼ 0.1 A/W regime. Here, we consider the unbiased asymmetric configuration and show that optimized plasmonic enhanced devices can reach for both transverse-electric and transverse-magnetic modes (at λ = 1550 nm), ∼A/W responsivity, and ∼ 100 GHz operation speed at zero power consumption. We validate the model and material parameters by simulating experimental devices and derive analytical expressions for the responsivity. Our comprehensive modeling paves the way for efficient, fast, and versatile optical detection in PICs with zero power consumption.

Introduction

Photonic integrated circuits (PIC)¹ can be used for interconnects,^2,3 all-optical signal processing,^4,5 as well as for neuromorphic photonics,⁶⁻⁸ whereby programmable (trainable) PICs become the photonic hardware counterpart for artificial neural network algorithms. There has been continuous progress in all key performance metrics,⁹ including increased bandwidth (BW),¹⁰ reduced footprint,¹⁰ and reduced power consumption,¹⁰ with current transceiver technologies already allowing for 400 Gb/s operation,³ and moving towards 800 Gbs^–1 9 and 1.6 Tbs^–1 interconnect applications.²

With receiver circuitry forming a critical element in the landscape of PICs, this performance race confronts the photodetector (PD) technology with a challenging functionality framework. PDs must constantly aim for smaller-size layouts with high optoelectronic BW (>100 GHz)¹¹ and improved efficiencies (∼ 1 A/W),^12,13 while expanding along a complementary metal-oxide-semiconductor (CMOS) process compatible framework.¹⁴ At the same time, they are required to operate at a low energy envelope, with improved noise characteristics,¹⁰ thus making a strong case for unbiased operational schemes which have zero power consumption, zero dark current, and low noise.¹⁵ They also need to support dynamic tunability in both photoresponse and electrical resistance, when their employment in balanced-PD schemes is targeted, i.e. paired PDs of equal response with their signal subtracted to reduce the light source noise,¹⁶⁻¹⁸ or subtraction of mixed signals in coherent detection schemes.¹⁹ Currently used bulk semiconductor technologies such as Ge^20,21 and InP^22,23-based PDs cannot meet all these criteria simultaneously. Besides spectral limitations associated with the semiconductor band gap,²⁴ they often enforce process changes^20,21,24,25 or experience speed limitations due to the material intrinsic mobility and increased thickness of the photoactive layer.²⁶ These factors led to PD devices with increased complexity,²⁶ and a trade-off between operation speed and responsivity.²⁷

Single-layer graphene (SLG) is ideally suited to meet the abovementioned requirements,^{10,15,28−30} and a variety of integrated graphene PD (GPDs) prototypes have been demonstrated.³¹⁻⁴⁵ SLG exhibits ultrafast electron interactions (<50 fs),⁴⁶ extremely high room temperature (RT) carrier mobilities (>10,000 cm²/Vs),⁴⁷⁻⁵¹ CMOS compatibility,^15,52,53 field-effect gate tunability,⁵⁴⁻⁵⁷ and broadband optical response.^28,29,58,59 On-Chip GPDs have been reported in both biased^{31,34,36,40−42,45} and unbiased^34−40,44 schemes, demonstrating external responsivity (i.e. ratio of photocurrent I_ph to incoming power P_in) up to R_I,ext ∼ 0.7 A/W⁴² and ∼ 0.11 A/W,⁴⁴ respectively, at ∼ 100 Gb^–1.^31,41,45 In a biased scheme, a source–drain voltage is applied to SLG and the photocurrent is measured as the difference between bright (under illumination) and dark currents,³¹ where the bright current is modulated as a result of photoconductive^36,60 and photobolometric^31,60 effects. Under bias, however, the SLG gapless nature⁶¹ leads to a sizable dark current and increased noise,¹⁵ resulting in a non-negligible power budget for PD operation (∼ 1 mW)³¹ and for the overall power requirements.¹⁵ Lower power metrics, on the other hand, can be accomplished when PDs operate without bias^15,28 exploiting the photothermoelectric (PTE) effect,^28,30 whereby an electronic temperature, T_e, gradient gives rise to a photovoltage due to the Seebeck effect.⁶² To get a net photoresponse from the device, the symmetry between source and drain contacts must be broken. This can be achieved by either an architecture supporting asymmetric light absorption,³³⁻³⁵ or by an asymmetric gate creating a lateral pn-junction configuration.^36−40,44

Unbiased GPDs reported so far have been typically augmented with absorption enhancement mechanisms to increase the SLG absorption above the 2.3%⁵⁸ it has when suspended and even lower on a substrate,⁶³ exploiting either photonic crystals⁴⁰ or plasmonics.^32,37,41 However, thus far, R_I,ext ≲ 0.11 A/W for unbiased devices,^34,36,40,44 significantly lower than the ∼ 0.7 A/W reported for biased GPDs.⁴² Given the preference for zero dark current, low noise, and low power consumption in PIC PDs, the critical question, then, is whether R_I,ext ∼ 1 A/W or above can be obtained in unbiased GPDs.

Here, we show that this is possible, by analyzing the performance of a device architecture consisting of unbiased source–drain contacts asymmetrically placed with respect to a Si waveguide (WG).³³⁻³⁵ We employ coupled optical, thermal, and electrical simulations, and show that the simplest design enables strong (i.e., R_I,ext ∼ 1 A/W) performance even at zero bias. We provide realistic full device model and material parameters, validated by comparison to experimental results. This allows us to understand the photoresponse mechanisms, the reasons why prior art reached different results and smaller performance, and how to optimize device concepts and designs (i.e., plasmonic effects at the contact edge, WG and contact configurations, and gating profile). An analytical expression derived for the ideal PTE performance (where absorption occurs only in SLG within a delta distribution at the contact edge without metal losses) defines an ideal internal responsivity (i.e., the ratio of photocurrent I_ph to absorbed power P_abs) limit up to few A/W for asymmetric-contact unbiased GPDs. We consider both transverse electric (TE) and transverse magnetic (TM) guided modes. A scan of different gating combinations shows that independent dynamic control of resistance and R_I,ext can be achieved, paving the way to balanced photodetection schemes.¹⁶⁻¹⁸ Noise, sensitivity, and operation speed metrics are also calculated.

Our comprehensive theoretical framework provides the understanding and guidelines needed to have tunable integrated GPDs with zero-consumption, low-noise, high-sensitivity, and high-speed operation.

Results and Discussion

We consider an integrated GPD comprising a Si WG (220 nm thick) on a silicon-on-insulator substrate, as shown in Figure 1. hBN encapsulation ensures high-mobility SLG at RT.⁶⁴ Two Au electrodes (100 nm thick) are located asymmetrically on opposite sides of the Si WG to collect the photocurrent assuming unbiased operation: one of them 700 nm off the WG edge, and the other at a distance d, varied between 300 and −100 nm. Two contact formats are explored: 1d edge contact^65,66 (Figure 1b) and 2d top contact^66,67 (Figure 1c). Three Si WG configurations are also explored: fully embedded³⁴ (Figure 1d), half-embedded³⁵ (Figure 1e), and exposed (Figure 1f). The WG width, w, and device length, L, are varied, while all other parameters in Figure 1 remain fixed.

Figure 1.

(a) Schematic device configuration with Si WG (220 nm thick) fully embedded in the SiO₂ substrate (the encapsulating hBN layers are not shown for clarity). (b,c) Schematic 1d (edge) and 2d (top) contacts, respectively. (d–f) Schematics of 3 WG configurations: fully embedded in SiO₂, half embedded, and fully exposed, respectively.

In unbiased metal/GPD devices, both PTE^34,68,69 and photovoltaic⁶⁸⁻⁷¹ mechanisms contribute to the photoresponse, depending on contact metals^72,73 and light polarization.^69,72 In an asymmetric device configuration, like that studied here, photocurrent measurements as a function of top-gate and source–drain voltages indicated PTE as the dominant effect.³⁴ Thus, we also assume it to be the dominant mechanism here. Its traits include ultrafast detection^36,39 and zero-bias operation,^15,28,74,75 the latter providing for low noise^10,15 and low power consumption.^10,15 The PTE effect generates a voltage drop (thus an internal field) V_PTE ∝ s∇T_e,^72,74 where the Seebeck coefficient, s, depends on T_e and Fermi level, E_F, across the SLG channel, with no requirement of a source–drain bias to observe an ultrafast response.^34,35,37,39 For obtaining a net nonzero V_PTE without bias, an asymmetry must be present in s(x) or in ∇T_e(x), where x runs from source to drain. The former can be achieved by a split-gate to create an in-plane pn-junction.^36−40,44 The latter, simpler and employed here, is achieved by asymmetrically positioning the contacts with respect to the Si WG.³³⁻³⁵

Full-wave simulations, for both the fundamental TE and TM modes at λ = 1550 nm, incident from the Si WG into the PD, in Figure 2, show the emerging optical effects as one of the contacts is brought closer to the WG. The optical mode excites and hybridizes with surface plasmon polaritons (SPP) on the Au contact edge,³³ increasing the local SLG absorption. The hybridization is seen by the beating pattern of the absorption along the WG, becoming more pronounced as d decreases, and creating a strong asymmetry in the SLG absorption profile. This increases T_e locally, while close to the other contact SLG remains cold. Note, however, that roughness on the metal contact will add to scattering and propagation losses on the plasmon mode, reducing SLG absorption, thus limiting the benefits coming from the SPPs.

Figure 2.

Absorption density α_den (%/μm²) in SLG channel for (a–c) TE and (d–f) TM mode at λ = 1550 nm, at different d. The other contact is 700 nm to the left of the figures (not shown). The device configuration is 1d contact, w = 450 nm, L = 30 μm, and fully embedded Si WG. The white dashed lines indicate the Si WG position and the yellow bar the Au contact.

The SLG electron (e) heating and cooling dynamics can be understood as follows: light absorption creates hot nonequilibrium carriers which undergo carrier multiplication by electron–electron (e–e) scattering (τ_e–e < 50 fs),^46,76,77 i.e., by impact ionization (interband scattering creating new e-h pairs^78,79) and impact excitation (intraband scattering distributing the excess energy within the band⁸⁰) and relax into a hot equilibrium Fermi–Dirac carrier distribution at an elevated temperature T_e.^{46,76,77,81,82} This hot thermalized carrier distribution is established locally with one temperature (T_e) and chemical potential (μ).^46,77 Local cooling of the e gas then follows, by electronic heat diffusion and electron–phonon (e–ph) scattering (τ_C ∼ 2–4 ps).^46,82−89 Due to the much smaller SLG electronic heat capacity compared to the ones of SLG lattice, hBN, and metal contacts,⁹⁰ the latter are assumed to remain at RT. Also, plasmonic hot carrier (HC) effects^91,92 in the Au contacts have a small effect on the PTE response (see Methods). Considering all this, heat diffusion simulations (see Methods) show that the absorption spatial asymmetry results in a T_e asymmetric profile, which, in turn, gives rise to a thermoelectric voltage⁷⁴, where the integration is over the entire SLG area (length L and width W). V_PTE is the device’s open-circuit voltage. The performance metric is the voltage external responsivity R_V,ext = V_PTE/P_in, where P_in is the incoming optical power. If the device internal resistance is R_D, then the external sort-circuit current responsivity is R_I,ext = R_V,ext/R_D. We note that in either open-circuit or sort-circuit conditions, the output power efficiency of the device is zero. We now consider the effects of WG, contacts, device geometries, and SLG doping to reach a generalized understanding of the PTE effects in integrated GPDs and, by that, an optimization framework.

We first examine the SLG E_F effect. We assume it pinned at −0.15 eV at/under the contacts (because of charge flow between SLG and metal reaching an equilibration depending on the metal work function),⁹³ while it can vary across the channel (source-to-drain). Typically, SLG is found to be p-doped.⁹⁴ We consider 3 indicative E_F = −0.02, −0.10, −0.18 eV, corresponding to extremely low, low, and average doping for hBN encapsulated SLG, respectively.^95,96Figure 3a plots the distribution of T_e increase within the SLG channel for a d = 50 nm and L = 30 μm device illuminated with TE polarization at 1 μW. The absorption profile is practically the same for any E_F in the range −0.21 to 0.21 eV, but differences in heat capacity and thermal conductivity (see Methods) result in different T_e profiles. In addition, the different E_F gives different s (see Methods). As shown in Figure 3c,d, the profile and peak position of the thermoelectric voltage are determined by the T_e gradient, while s determines the magnitude. Thus, while E_F = −0.10 eV does not produce the largest T_e gradient (see Figure 3c), it does yield the largest thermoelectric voltage due to the larger s, as for Figure 3b.

Figure 3.

Spatial distribution of thermal quantities across SLG channel at the front (entrance) of the device for 1 μW incoming power with d = 50 nm, L = 30 μm, TE polarization, and fully embedded Si WG configuration. Solid lines correspond to various SLG E_F for a 1d contact, while the dashed line corresponds to E_F = −0.1 eV for a 2d contact. E_F is assumed fixed at −0.15 eV under the contacts. (a) T_e increase, (b) s, (c) T_e gradient, and (d) local thermoelectric voltage s∇T_e projected along the x (source–drain) direction. In all panels, the yellow bars indicate the Au contacts, and shaded light blue the Si WG.

The main difference between 1d and 2d contacts is that in the latter SLG extends under them,⁶⁶ providing extra space for cooling through electronic heat diffusion and e–ph scattering. In the 1d case, in contrast, the electronic heat diffusion process is terminated at the contact edge, which results in a larger T_e gradient, thus higher R_I,ext. Cooling can be faster (i.e., smaller τ_C) locally where SLG is directly contacted by Au^97,98 (due to interactions with Au’s e and ph or due to resonant dissipation from atomic defects along the SLG edges⁹⁹). This affects the performance of both 1d and 2d contacts. We will start by assuming τ_C to be everywhere the same, so to derive an upper limit for the performance, then consider the effects of faster cooling at the contacts.

To systematically optimize d and E_F, we continuously vary them within the range −100 nm < d < 300 nm and −0.21 eV < E_F < 0.21 eV. The unbiased R_I,ext is plotted in Figure 4 for both polarizations (TE and TM) and both contact geometries (1d and 2d) for the fully embedded Si WG configuration. 1d is better than 2d in all the parameter space. R_I,ext increases as d is reduced, reaching an optimum at d = 20 nm and d = 50 nm for TE and TM polarizations, respectively (see Figure 2c,f), where the best compromise between plasmonic field confinement and losses is achieved (see Figure 4 and Methods). If the contact gets closer than this optimal d or overlaps with the WG (i.e., d < 0), R_I,ext drops sharply due to increased metal absorption and scattering of the mode on the Au contact edge (see Methods). We note that ref (100) presented the case of complete overlap between contact and underlying WG (i.e., d < −450 nm), reporting R_I,ext ∼ A/W as a result of optimistic SLG property values (i.e., heat capacity c_e ∼150 J m^–3 K^–1 and cooling time τ_C ∼ 10 ps; thus interfacial heat conductance Γ_cool = c_e/τ_C ∼ 5 × 10³ W m^–2 K^–1 ∼ 10 times smaller than our ∼5 × 10⁴ W m^–2 K^–1, and also zero contact resistance). Indeed, simulating the ref (100) structure using their parameters we reproduce their findings, but with our SLG property assumptions, we obtain R_I,ext < 0.1 A/W, which is in line with Figure 4. We stress that the use of improper SLG parameters can lead to erroneously inflated responsivities, e.g, ∼ 1000 A/W in ref (101) (here τ_C ∼ 5 ns was used, instead of the experimentally measured τ_C ∼ 3 ps,^46,82−89 and zero contact resistance). For TM, the response is less sensitive to d, due to the more extended fields and stronger coupling with the Au SPPs, as evident in Figure 2. For both cases, the optimal E_F = ±0.07 eV. This is the optimal point of two counter-acting trends: at smaller E_F, s drops sharply. At larger E_F, thermal conductivity and thermal capacity increase (see Methods) resulting in reduced T_e gradients.

Figure 4.

R_I,ext [A/W] as a function of SLG E_F and d for (a,b) TE and (c,d) TM modes. (a,c) 1d and (b,d) 2d contacts. Calculations are for fully embedded Si WG, with w = 450 nm and L = 30 μm.

We now consider the 1d contacts, E_F = −0.07 eV, and perform optimization simulation runs, shown in Figure 5 for both TE and TM polarizations. The effect of Si WG position with respect to the top oxide surface is shown in Figure 5a,b for two d. The fully embedded configuration is the optimal one for both polarizations. This is also easier to fabricate because the device is on a flat substrate. In Figure 5c,d, the effect of w is studied, assuming the fully embedded configuration. Different trends are observed between the two polarizations. For the optimal d = 20 and 50 nm for TE and TM, the peak R_I,ext is observed at w = 350 and 450 nm, respectively. Narrowing the WG width results in vanishing R_I,ext for TM, but not for TE. In both cases, detuning from the optimal w degrades R_I,ext. A wider WG spreads out the mode, and a narrower WG reduces mode confinement, both cases resulting in smaller T_e gradients.

Figure 5.

R_I,ext (A/W) for SLG E_F = −0.07 eV at 1d contact configuration, as a function of (a,b) WG embedding (at L = 30 μm and w = 450 nm), (c,d) w (fully embedded Si WG and L = 30 μm), (e,f) L (fully embedded Si WG and w = 450 nm). The numbers on the curves indicate different d. Panels (a,c,e) are for TE and (b,d,f) for TM mode.

Figure 5e,f shows the effect of device length. The trends in TE and TM polarizations are very similar, with a monotonic R_I,ext increase for longer devices. This is due to larger overall absorption and smaller SLG channel resistance. An opposite trend is observed for the external voltage responsivity R_V,ext (i.e., photovoltage V_ph to incoming power P_in(30)), where the higher absorption density in the device entrance promotes a larger R_V,ext for shorter devices (see Methods).

The dependence of PTE response on SLG E_F opens a new avenue for dynamic control of both resistance and responsivity, towards a balanced photodetection scheme.¹⁶⁻¹⁹ This is an established method to reduce the effect of intrinsic light-source noise.¹⁶ A simple embodiment is realized by two PDs of equal R_I,ext, whereby subtraction of their photocurrents removes the excess noise.¹⁶ The balanced PD pair output remains zero until a signal difference causes an “unbalance”, thus a net output.¹⁶ Balanced PDs are also essential in coherent detection schemes.¹⁹ which can significantly increase the transmission capacity by using the phase, amplitude, and polarization of the optical signal to carry information.

Figure 6a shows a schematic concept in which the Si WG is used as a gate, and a secondary gate is inserted on the side (we assume it does not affect the optical mode or the SLG absorption profile). The device has L = 30 μm, 1d contact layout, fully embedded WG, w = 450 nm, and d = 20 nm, at TE polarization. The device resistance R_D as a function of WG and side SLG E_F is in Figure 6b, while the corresponding R_V,ext and R_I,ext are in Figure 6c,d, respectively. Under these assumptions (see Methods), R_D = 130 ± 50 Ω (∼ ± 40% change) as V_G varies. A sixfold pattern emerges, typical of PTE,⁶² with values ranging between 0 and ∼100 V/W or 0 and ∼0.9 A/W for R_V,ext and R_I,ext, respectively. R_V,ext increases further for shorter L, as shown in Methods, where it can exceed 200 V/W.

Figure 6.

(a) Schematic double-gating architecture, employing a WG gate and a side gate. (b) Resistance, (c) R_V,ext [V/W], and (d) R_I,ext [A/W] as a function of SLG “WG” and “side” E_F, for the TE mode, d = 20 nm, L = 30 μm, w = 450 nm, 1d contact and fully embedded Si WG.

The operational optimal is at E_F^WG = E_F = ±0.06 eV for R_V,ext, reaching up to 102 V/W, but at E_F^WG = ±0.06 eV, E_F = ±0.2 eV for R_I,ext, reaching up to 0.88 A/W. The reason is as follows: the SLG E_F above the WG (where the highest T_e gradients are found) needs to be E_F^WG = ±0.06 eV. Increasing the side |E_F| > 0.06 eV results in s reduction, as well as electrical resistance reduction (see Methods). This translates into a reduced (because of s) thermoelectric voltage (R_V,ext reduction), but with a marginally increased (because of resistance) thermoelectric current (R_I,ext increase). In either case, the independent variation of E_F and E_F^side can enable independent dynamic control of R_D, and R_V,ext, towards balanced photodetection.

R_V,ext and R_I,ext assume open-circuit and short-circuit conditions, respectively,i.e., no power is transferred out of the system. It is instructive to extrapolate to the case of an external load R_L closing the circuit with R_L = R_D, the condition for maximum power transfer efficiency, whose ideal value is η_max = V_PTE²/4R_DP_in.¹⁰² For P_in = 1 μW, we find η_max∼ 0.002% at R_V,ext = 100 V/W and R_D = 120 Ω. Within the linear regime, η_max increases with increasing P_in. In ref (44), the linear regime extended up to P_in = 0.1 mW, beyond which the responsivity dropped as P_in^–1/3 due to SLG’s nonlinear response to temperature.^76,86,103 Scaling our findings to the ref (44) trends, we get η_max∼ 4% at P_in = 1 W. These are upper limits. Full device circuit modeling is needed for accurate evaluations.¹⁰⁴

Until now, we made the simplifying assumption that Au contacts do not affect the e local cooling rate in SLG at (or under) the contacts, and assumed a fixed τ_C ∼ 3 ps^34,75 everywhere. However, it is expected that Au ph and e may increase locally the SLG e cooling rate.^97,98 The Au e–e and e–ph thermalization times were estimated in the 1–3 ps regime by theoretical^105,106 and experimental^107−111 works, with the smallest reported value ∼ 0.25 ps.¹¹⁰ Another source of increased cooling could be related to roughness in the metal contact. For the 1d case, on the other hand, increased cooling near the contact could originate by resonant dissipation from atomic defects along the SLG edge.⁹⁹ To evaluate the effect of increased scattering, we assume a locally reduced cooling time τ_C^red in SLG under the contact and up to a distance δ away from it (for the 1d contact τ_C involves only this δ). In the absence of experimental δ values, we assume, for simplicity and without loss of generality, δ = 25 nm as used in ref (98). τ_C^red also lacks an experimental value, so it is used here as a free parameter. Simulations with τ_C reduced to 0.1 ps are shown in Figure 7 for the fully embedded TE mode case, with SLG E_F = −0.07 eV, d = 20 nm, L = 30 μm, and w = 450 nm. R_I,ext drops for smaller τ_C^red, but at a faster rate for 2d compared to 1d contacts. This trend is reversed when τ_C approaches 0.1 ps. R_I,ext reduces by 32% and 54% at τ_C^red = 0.5 ps for the 1d and 2d cases, respectively. Thus, an increased e cooling rate at the contacts will impose a significant R_I,ext reduction, more strongly for the 2d case, without however altering the main predictions of our work (see Methods).

Figure 7.

R_I,ext as a function of τ_C^red in SLG at/under the metal contact, normalized to R_I,ext when τ_C = 3 ps.

We next validate our results by comparing our model findings with the measurements of two similar devices, ref (35), where 2d contacts were used, and ref (34), where 1d ones were used (both in TE polarization). Simulations are done using the experimental device geometries of refs (34) and (35) detailed in Table 1. In the 2d case³⁵ some missing information is assumed: in the experiment, there was no gate on SLG, so we assume p-doping E_F = −0.14 eV.^94,112 We assume μ_q = 2000 cm²/Vs as for ref (45), and a unit length contact resistance ρ_C = 1.2 kΩ μm.⁶⁷ For the 1d case,³⁴ we assume μ_q = 7000 cm²/Vs and ρ_C = 0.5 k Ωμm⁶⁵ (in ref (34) μ_q = 1000 cm²/Vs was estimated, but with the effect of contact resistance integrated into the mobility), which, at the optimum |E_F| ∼ 0.1 eV, yield R_D ∼ 93 Ω, very close to the experimental value. For both contacts, we assume the same τ_C = 3 ps and τ_C^red = 0.5 ps. Using the assumptions of Table 1, we reproduce the experimental resistance and R_I,ext of refs (34) and (35). The final agreement between simulated and measured results confirms the validity of our model. A common τ_C = 0.5 ps assumption is adequate for both contact designs, confirming that there is faster cooling of SLG e at the metal contact. Small discrepancies between experiments and models can be due to a variety of reasons. Thus, rather than fitting τ_C^red to coerce an exact agreement, we adopt τ_C = 0.5 ps as a reasonable assumption.

Table 1. Setup of Selected Experimental Devices (TE Polarization)^34,35 and Comparison between Measurements and Simulations.

	contact type	1d34	2d35
device setup	device length L	40	30	μm
	S–D distance W	3	1.4	μm
	contact distance d	0.2	0.3	μm
	WG width w	0.52	0.4	μm
	SLG-Si spacer thickness	35	25	nm
	electron cooling time τC	3	3	ps
	carrier mobility μq	7000a	2000a	cm2/Vs
	residual local charge n0*	3b	7b	(×1011) cm–2
	graphene Fermi level EF	–0.11	–0.14a	eV
	contact resistance ρC	0.5a	1.2a	kΩ μm
measurements34,35	graphene absorption αSLG	40	35	%
	device resistance RD	96	187	Ω
	current responsivity RI,ext	0.078	0.007	A/W
simulations	graphene absorption aSLG	40	37	%
	device resistance RD	93	187	Ω
	current responsivity RI,ext	0.12	0.0094	A/W

^aAssumed based on reported SLG quality and device resistance.

^bEstimated by the linear relation between 1/n₀^* and μ_q according to ref (113) (see Methods).

This confirms that R_I,ext ∼ 0.6 A/W is possible, for L = 30 μm with the faster τ_C^red = 0.5 ps at the contacts. In terms of external quantum efficiency (collected e–h pairs to incoming photons ratio³⁰): EQE = R_I,exthc/eλ ∼ 48%. By considering the simulated SLG absorption α_SLG ∼ 50% (∼ 30% transmission and ∼ 20% scattering and parasitic contact absorption losses) in our best design, we get an internal quantum efficiency (collected e–h pairs to absorbed photons ratio³⁰) IQE ∼ 100%. We note that high IQE (even >100%) are a result of carrier multiplication, i.e., the creation of multiple HCs per absorbed photon.^{46,76,77,81,82} HC multiplication and carrier heating is very efficient in SLG,⁷⁷ and can be exploited for various applications.⁷⁷

To put these numbers in perspective, we derive the ideal internal PTE performance (responsivity and quantum efficiency) to set a theoretical upper limit of an asymmetric contact architecture. We make two assumptions: (a) absorption occurs only in SLG (no scattering or metal absorption) and (b) absorption occurs in a δ-distribution width at the contact edge (maximized field confinement). Assuming that ΔT_e exponentially decays in both x (along the source–drain) and y (along the WG) directions, its profile is given by:

1

where ΔT_e⁰ is the peak T_e rise, is the cooling length across the SLG channel, and ψ is the decay length due to SLG absorption along the WG length (used as a free parameter). κ and c_e are the SLG heat conduction and capacity, respectively. For a long device (L ≫ ψ), all light is absorbed, and we get the ideal internal current responsivity (see Methods):

2

while for the smallest length (L → 0) we get the ideal voltage responsivity:

3

where g [Ω^–1 m^–1] is the device electrical conductance per unit length, and is a generalized heat exchange coefficient. For our SLG parameters (E_F = −0.07 eV, τ_C = 3 ps, and μ_q = 10,000 cm²/Vs) for ideal (nonabsorbing) 1d contacts we find R_I,int^∞ ∼ 2.5 A/W (∼ 1.7 A/W if we include the 32% reduction at τ_C = 0.5 ps). These correspond to ideal internal quantum efficiency IQE^∞ = 200% (136% for τ_C^red = 0.5 ps). We find that our proposed device is at ∼35% of the ideal performance (see Methods). If we include the metal absorption in the infinite device (∼28%, extrapolated from the ∼20% of the L = 30 μm device), we estimate R_I,ext = 0.72 A/W and R_I,int^∞ = 1.22 A/W for the ideal case of maximum field confinement (for τ_C = 0.5 ps and ρ_C = 1 kΩ μm). Figure 8 puts all our findings into perspective, plotting the validation studies and predicted performance (proposed and ideal) in one graph. The excellent agreement between simulation and experiments (blue points in Figure 8) demonstrates the overall validity of our model.

Figure 8.

Simulated and measured R_I,ext of the devices in refs (34) and (35) (blue points). The red lines mark the highest R_I,ext prediction and the theoretical ideal internal R_I,int^∞ for integrated asymmetric PTE PDs, including the 32% reduction at τ_C = 0.5 ps.

We now consider other performance characteristics, i.e., sensitivity and speed. The sensitivity is quantified by the noise equivalent power (NEP), defined as NEP = I_n/R_I,ext, where I_n is the root-mean-square noise current density per hertz of BW in A/Hz^0.5.⁷⁵ At the optimal operation point with R_I,ext = 0.6 A/W (assuming the faster cooling τ_C^red = 0.5 ps at the contacts) and considering only thermal (Johnson) noise I_J (because of zero dark current) (98) (see Methods), we estimate intrinsic NEP ∼ 22 pW/Hz^0.5. An interesting comparison is with the sensitivity of similar devices operated under a source–drain bias, V_SD, in which case dark current enters the shot noise. E.g., assuming V_SD = 0.5 V^31,45 and R_D = 100 Ω, we find I_D = 5 mA. Taking into consideration the shot noise component, the total noise current spectral density becomes yielding, for R_I,ext = 0.6 A/W, a NEP ∼70 pW/Hz^0.5 at P = 2.5 mW power consumption, more than triple the NEP of our unbiased device.

We estimated the RC time constant of the device using the cutoff frequency f_c = {2πR_D{[C_G^–1 + C_q(E_F)⁻¹]⁻¹ + C_SD}}⁻¹, where C_G is the capacitance due to local gates, C_q(E_F) is the SLG quantum capacitance,¹¹⁴ and C_SD is the parasitic device capacitance. We assume C_SD = 20 fF as estimated in ref (35) for a similar device configuration. The gate capacitance is C_G = εε₀A/t, where ε₀ = 8.85 × 10^–12 F/m is the vacuum permittivity, ε = 3.5 is the hBN static dielectric constant,¹¹⁵t = 10 nm is the hBN thickness between SLG and substrate, and A is the gated area. C_q(E_F) = e²v(E_F)A, where v(E_F) is the SLG density of states at energy E_F (see Methods). For the fully gated device (both WG and side) A = 30 × 1.1 μm², while for a WG gate only, A = 30 × 0.35 μm² (assuming the optimal TE configuration at L = 30 μm). For R_D = 100 Ω and E_F = −0.07 eV, the fully gated and WG-gated configurations yield cutoff frequencies f_c ∼ 15 GHz and ∼ 34 GHz, respectively. If no gate is used, then f_c can reach up to ∼ 80 GHz. We note that SLG τ_C ∼2–4 ps,^46,82−89 and metal HC transfer/injection and cooling times of sub-ps¹¹⁶ and ps,^108,117 result in a PTE-GPD intrinsic speed limit ∼1/τ_C ∼ 250–500 GHz, much larger than the estimated RC device characteristic frequency (<100 GHz), making the latter a good estimate for the expected BW.³⁵

Conclusions

Given the absence of band gap in SLG, an unbiased operation is preferred for GPDs to avoid large dark currents, shot noise, power consumption, and unwanted joule heating. Placing the metal contacts asymmetrically with respect to WGs promotes plasmonic-assisted light absorption in the SLG channel and allows for unbiased photodetection. Comprehensive optical-thermal-electrical modeling shows that, by tuning the SLG E_F and device architecture, high responsivity (R_I,ext ∼ 0.6 A/W), sensitivity (NEP ∼ 22 pW/Hz^0.5), and speed (f ∼ 80 GHz) can be achieved for integrated photonics. This architecture can be further enhanced with local gates, yielding independent control over device resistance and responsivity, towards integrated balanced photodetection. Comparison with refs (34) and (35) validates our model assumptions and predictions. Together with the derived analytical expression for the ideal performance, this gives a perspective and outlook for integrated GPDs. E.g., in the ideal responsivity we assumed a fixed cooling time (τ_C = 3 ps), carrier mobility (μ_q = 10,000 cm²/Vs), and contact resistance (ρ_C = 1 kΩ μm). Improving them will also increase responsivity (see Methods). Target areas of focus for improving performance should then be (i) increased SLG mobility (increased R_I,ext and f), (ii) longer cooling time (increased R_I,ext), and (iii) lower contact resistance (increased R_I,ext and f). Given our design’s losses in scattering, transmission, and parasitic contact absorption, the focus should also be on (iv) improved plasmonic and/or metamaterial contact structures (less absorption losses). These pave the way toward R_I,ext > 1 A/W, NEP <10 pW/Hz^0.5, and f > 100 GHz in an unbiased integrated GPD.

Methods

Optical Modeling

Optical calculations are performed with the Finite-difference time-domain method (FDTD, Lumerical¹¹⁸). The computational cell dimensions are 4 × (L + 4) × 5 μm³, with perfectly matched layer (PML) conditions in all directions and with a 5 nm grid. The light source is the fundamental TE or TM optical mode of the Si WG at λ = 1550 nm. The dimensions of the device layers are given in Figure 1 and Table 1. The Au dielectric function is fitted with a Lumerical model.¹¹⁹ hBN is anisotropic¹²⁰ with different permittivity in the in-plane (⊥) and out-of-plane (∥) directions. At λ = 1550 nm, its refractive index is¹²⁰n_⊥ = 2.187 and n_∥ = 1.715. For SiO₂ and Si, we use n_Si = 3.4757¹²¹ and n_SiO2 = 1.444.¹²¹ SLG is implemented as a 2d surface, with optical response modeled by the Kubo conductance¹²² σ = σ_intra + σ_inter:

4

5

where Ω = ω + iτ_opt^–1, τ_opt is the scattering time, f(ε; μ, T_e) = [e^{(ε–μ)/k_BT_e} + 1]⁻¹ is the Fermi–Dirac distribution, and ∂_ε ≡ ∂/∂ε. τ_opt is related to E_F and μ_q as τ_opt = μ_q|E_F|/ev_F²,¹⁵ where v_F = 10⁶ ms^–1 is the SLG Fermi velocity. For μ_q = 10,000 cm²/Vs and |E_F| = 0.2 eV, we get τ_opt = 200 fs, used in eq 5.

Thermoelectric Modeling

We assume the quasi-cw case and solve the heat dissipation equation:⁷⁴

6

where κ is the electronic thermal conductivity, Π = sT_e is the Peltier coefficient, j_q = −σs∇T_e is the local thermoelectric current, σ is the electrical conductivity, c_e is the electronic heat capacity, ΔT = T_e – T_l, α_den is the absorption density, and P_in is the incoming power. Note that in eq 6, −∇Π· j_q = j_q· (σ^–1j_q) – T_ej_q· ∇s, where the first term on the right is the Joule heating¹²³ and the second term includes both Peltier¹²⁴ (∇s at junction) and Thomson¹²⁵ (∇s in thermal gradient) effects. Due to the large SLG lattice heat capacity (compared to the electronic one),⁹⁰ we assume constant T_l = 300 K. The SLG parameters μ, σ, s, c_e, κ, and α_den are functions of E_F and T_e and are explicitly considered as such. The self-consistent solution of eq 6 provides the T_e distribution, from which the thermoelectric voltage is obtained:

7

The photocurrent is then I_PTE = V_PTE/R_D, where R_D = R_G + 2R_C with the SLG channel resistance and R_C = ρ_C/L is the contact resistance, with ρ_C being the unit length contact resistance in units of Ω μm. Dividing by the input power, we get the external responsivities R_V,ext = V_PTE/P_in and R_I,ext = I_PTE/P_in.

Zero bias PDs are limited by the Johnson noise,^98,126,127 when operating in frequencies above the corner frequency f₀ (defined as the frequency where the flicker (1/f) noise is equal to thermal or shot noise, typically ≤100 kHz for SLG devices¹²⁸), assuming that they are perfectly shielded to minimize external noise and that have been impedance matched to minimize the amplifier noise. Also, possible contributions from generation–recombination noise, which occurs within the e–e scattering time scale (<50 fs^46,76,77), have a small effect on SLG’s local thermal equilibrium which gives rise to the PTE response and are not considered here. Thus the noise current (root-mean-square noise current density per Hz of BW in A/Hz^0.5) is ,⁹⁸ where k_B is the Boltzmann constant and T is the operation temperature (300 K), and the intrinsic NEP = I_n/R_I,ext in units of W/Hz^0.5. We note that a linear photoresponse as a function of power is expected because the GPD operates in the weak heating regime (ΔT ≪ T_ambient), where the electronic heat capacity can be considered constant.^34,37,76,98

At finite T_e we obtain the chemical potential from the solution of¹⁰³ ∫₀^∞v(ε)[f(ε; μ, T_e) – f(ε; −μ, T_e)]dε = E_F²/πℏ²v_F², where v(ε) = 2|ε|/πℏ²v_F² is the SLG density of states at energy ε. The other SLG electrical and thermal parameters in Figure 9 are calculated as follows: electrical conductivity σ(μ, T_e) = , where σ(ε) = q[μ_qn(ε) + μ̅n*(ε)], with μ_q = μ_e/(μ_h) for ε > 0/(ε < 0) and μ̅ = (μ_e + μ_h)/2. The effective residual local charge fluctuation at energy ε is n*(ε) = , where n(ε) = ε²/πℏ²v_F² is the SLG charge density at energy ε and n₀ is the residual local charge fluctuation at the charge neutrality point.^129,130 From the Mott formula,¹³¹. The electronic heat capacity¹⁰³, while thermal conductivity by the Wiedemann–Franz law¹³² κ(μ, T_e) = L₀σ(μ, T_e)T_e, where L₀ = 2.44 × 10^–8 W Ω K^–2 is the Lorenz number.

Figure 9.

(a) Thermal conductivity, (b) specific resistivity, (c) thermal capacity, and (d) s as a function of SLG E_F for e/h mobility μ_q = 10,000 cm²/Vs, residual local charge fluctuation n₀^* = 10¹¹ cm^–2, and operation temperature 300 K.

Model Assumptions

The thermoelectric calculations assume SLG with μ_q = 10,000 cm²/Vs⁷⁵ for both e/h, residual local charge fluctuation n₀^* = 10¹¹ cm^–275 and τ_C = 3 ps.^34,75 We use a typical value of unit length contact resistance ρ_C = 1 kΩ μm,^65,67,75 which for the 30 μm long device results in 2R_C = 66.7 Ω. E_F of the SLG channel varies from −0.21 to 0.21 eV. The E_F pinning under the metal contacts is fixed at – 0.15 eV.⁹³ We introduce a narrow region extending 40 nm^34,73,98 from the contact edge into the SLG channel, within which the SLG E_F linearly scales back to the assumed channel E_F. For the double-gating architecture, the extension of the transition region in the contact close to the WG is bound by d. Almost identical results are obtained by assuming full electrostatic simulations, Figure 10. E_F can be tuned by V_G as E_F = where ε_hBN = 3.5¹¹⁵ is the hBN spacer relative dielectric constant, and t_hBN = 10 nm is its thickness. The breakdown electric field for hBN is ∼2 MV/cm for polycrystalline¹¹⁵ and ∼8 MV/cm for single crystal.¹³³ In our case, the V_G = 1.67 V required to dope SLG up to |E_F| = 0.21 eV (the upper limit of our simulations) will produce an electric field ∼1.67 MV/cm, well below breakdown.

Figure 10.

(a) E_F spatial distribution across the SLG channel for the double-gating with “WG” E_F = −0.06 eV and “side” E_F = −0.21 eV. (b) T_e increase distribution. The black solid lines correspond to results from the simplified E_F spatial distribution presented in the main text, while the red dot lines are the results using the E_F spatial distribution obtained by explicit electrostatic simulations.

Voltage Responsivity

We adopt the 1d contact configuration, E_F = −0.06 eV, and perform a series of optimization simulation runs, Figure 11, for both TE and TM polarizations to investigate the effect of device length on R_V,ext. The trends are very similar, with a monotonic R_V,ext increase for shorter devices. This is due to the higher absorption density in the first μms of the device.

Figure 11.

R_V,ext (V/W) for SLG with E_F = −0.06 eV at a 1d contact configuration, as a function of L (at fully embedded Si WG configuration and w = 450 nm). The numbers on the curves indicate different d. Panel (a) is for the TE, and panel (b) is for the TM mode.

Ideal PTE Responsivity and Quantum Efficiency

To estimate the ideal PTE internal responsivity and quantum efficiency, we assume that absorption occurs only in SLG and close to one of the contacts (e.g., at x = 0) with a fixed τ_C. At steady state, for x ≠ 0:

8

or

9

where is the cooling length. Assuming a decay length ψ due to absorption along the WG length L, the T_e profile can be written as:

10

where ΔT_e⁰ is the peak T_e rise, and the variables x (y) run perpendicular (along) the WG. ψ is used as a free parameter. The power lost to phonons in steady state is c_eτ_C^–1ΔT_e(x,y). By integration, we find the total power P_in:

11

The PTE voltage is found by integration over L (in the x direction we assume W is much larger than ξ):

12

The voltage responsivity is then:

13

where the term in the parenthesis accounts for light lost, that is, not absorbed, when L is comparable or smaller than ψ. By expanding ξ we find:

14

where is a generalized heat exchange coefficient in W/mK. The max is at L → 0, where the absorbed power density, thus T_e, is the highest:

15

To find R_I, we need the resistance as the sum of the SLG channel and contact contributions R_D = R_G + 2R_C=(ρ_G^′+2ρ_C)/L, with ρ_G = ρ_GW, ρ_G is the graphene specific resistivity, and ρ_C the contact resistance [Ω m]. Setting the device conductance per unit length g = (ρ_G^′ + 2ρ_C)⁻¹ [Ω^–1 m^–1] then:

16

R_I increases as we increase the device length (voltage drops but resistance drops too). For long devices (i.e., all light is absorbed in the SLG channel) we get the ideal internal responsivity:

17

A comparison between R_I,int^∞ and R_I,ext of our proposed design is shown in Figure 12. The ideal internal quantum efficiency is:³⁰

18

Figure 12.

R_I,int^∞ and R_I,ext for the double-gating architecture as a function of SLG channel E_F and SLG “WG” E_F, respectively (in the latter case, the “side” E_F is set at E_F = −0.2 eV). In both cases, we include the 32% reduction at τ_C^red = 0.5 ps.

Effect of Mobility, Cooling Time, and Contact Resistance on Device Performance

We adopt the 1d contact configuration and perform simulation runs for the optimum TE configuration of Figure 4 to investigate the effect of μ_q, ρ_C, τ_C, and τ_C^red on device performance. μ_q covers 5000–50,000 cm²/Vs, assuming a linear relation between 1/n₀ and μ_q, according to ref (113). For τ_C, we use 1.5, 3, 5.5 ps, where the last value was measured in WSe₂-encapsulated SLG (WSe₂/SLG/WSe₂ stack with 124 nm total thickness, μ_q ≥ 10,000 cm²/Vs).⁸⁹ As shown in Figure 13a, for zero contact resistance, higher μ_q and lower n₀^* result in monotonic increase of R_I,ext. s saturates with improved SLG quality (i.e., for μ_q ≥ 10,000 cm²/Vs, n₀ ≤ 0.2 × 10¹² cm^–2)^113,134 as the energy scale of n₀^* becomes comparable to k_BT,¹³⁴Figure 13b. These R_I,ext results for ρ_C = 0 (channel limited) are consistent with eq 7, where g = (ρ_G)⁻¹ ∝ μ_q and , thus . When a finite ρ_C is introduced, the trend changes, and the peak R_I,ext is observed for lower μ_q as ρ_C increases. In the limit where the total device resistance is dominated by the contact resistance g ∼ 1/2ρ_C (contact limited), the dominant contribution comes from the increased thermal conductivity. Thus , i.e., reduced for increasing μ_q.

Figure 13.

(a) R_I,ext as a function of μ_q for three ρ_C for the optimal TE configuration of Figure 4 with τ_C = 3 ps and τ_C^red = 0.5 ps. (b) s as a function of E_F and μ_q. A linear relation between 1/n₀ and μ_q is assumed as for ref (113). (c) R_I,ext for E_F = −0.07 eV, as a function of τ_C and τ_C^red with ρ_C = 1 kΩ μm and μ_q = 10,000 cm²/Vs. All R_I,ext are normalized to R_I,ext when τ_C = τ_C = 5.5 ps. (d) R_I,ext for E_F = −0.07 eV as a function of τ_C and d. All R_I,ext normalized to that for τ_C^red = τ_C = 3 ps and d = 20 nm. All calculations for the TE mode, L = 30 μm, w = 450 nm, 1d contact, and fully embedded Si WG.

An increased cooling time improves R_I,ext. As shown in Figure 13c, for τ_C^red = τ_C, 90% and 30% increase in R_I,ext is achieved for τ_C = 5.5 ps compared to 1.5 and 3 ps, respectively, consistent with what is expected from our analytical theory . When we introduce faster cooling at/under the metal contact (τ_C < τ_C), the performance differences diminish and converge to a common value. The faster cooling at/under the metal contacts does not alter the optimum device configuration. As shown in Figure 13d, the optimal d is unaffected by τ_C^red.

Trade-off between Field Enhancement and Plasmonic Losses

As shown in Figures 2 and 14, the plasmonic excitation in the metal contacts results (as we reduce d) in field redistribution, enhanced field confinement, and increase of the SLG absorption density near the metal contact.

Figure 14.

Si WG (w = 450 nm) optical mode field intensity profile for (a) TE and (b) TM polarization. |E_x| field component of the hybrid optical-plasmonic mode for (c) TE (d = 20 nm) and (d) TM (d = 50 nm). The SLG absorption profile is shown as a red line in (c,d). Calculations are for 1d contact and fully embedded Si WG.

This increased absorption density is translated in larger T_e and R_I,ext with optimum d = 20 nm for TE and 50 nm for TM. To understand this behavior, we plot in Figure 15 the SLG absorption and the parasitic losses (metal absorption and scattering) as a function of d for both TE and TM modes. As d decreases to its optimal value, the gain from the increased plasmonic field confinement of the hybridized optical-SPP mode dominates the parasitic losses, yielding an enhanced T_e gradient and R_I,ext. Below the optimal d, metal losses and scattering increase at the expense of SLG absorption, resulting in reduced R_I,ext, Figure 4.

Figure 15.

(a) SLG absorption, α_SLG, and parasitic losses (metal absorption and scattering) as a function of d for (a) TE and (b) TM modes. Calculations are for w = 450 nm, L = 30 μm, fully embedded Si WG, 1d contacts.

Effect of Metal HC Injection/Transfer on Device Performance

As d reduces and the absorption in the metal contact increases due to the excitation of SPP modes (see Figure 15), photoexcited HC in the metal can in principle inject⁹¹ into the SLG channel and affect the responsivity.⁹² To quantify this, we estimate an upper limit of the metal HC contribution to the photocurrent using the optimized device (TE polarization, d = 20 nm) where we find a metal absorption α_M ∼ 20% (see Figure 15a). If we assume all metal HCs with velocity normal to the interface to be injected and contribute to the photocurrent (i.e., 1/4 of them), then the metal HC current contribution is R_I,HC = α_M × 0.25 × e/ℏω = 0.0625 A/W. This corresponds to ∼ 10% of the maximum calculated R_I,ext = 0.6 A/W. Given this upper limit, we expect the metal plasmonic HC effects to be a small correction.

We acknowledge funding from the Graphene and Quantum Flagships, EU Grant Plasmoniac, ERC grant Hetero2D, EPSRC grants EP/L016087/1, EP/K01711X/1, EP/K017144/1, EP/N010345/1, and DSTL. For the purpose of open access, the authors applied a Creative Commons Attribution (CC BY) license to any Author Accepted Manuscript version arising from this submission.

The authors declare no competing financial interest.