Circuits on miniaturized ultrasound imaging system-on-a-chip: a review

Abstract

Trends of medical system move from a traditional in-person visit to virtual healthcare increases demands on point-of-care devices. Because ultrasound (US) is non-invasive, the demands highlight US imaging among other imaging modalities. Thanks to the development of US transducer technology, miniaturized US with application-specific integrated circuits (ASIC) have been researched. For example, applications that require small aperture sizes such as intravascular US (IVUS) and intra-cardiac echocardiography (ICE) require integration of system-on-a-chip (SoC) on the transducer. This paper reviews circuit techniques on the transmitter (TX) and receiver (RX) of the US imaging system. As TX circuits, pulser, T/RX switch, TX beamformer, and power management circuits are discussed. State-of-the-art transducer modeling, pre-amplifier, time-gain compensation, RX beamformer, quadrature sampler, and output driver are introduced as RX circuits.

Introduction

The healthcare business keeps growing and is boosted more with the combination of information technology. COVID pandemic halted the traditional medical system and forced it to move to the virtual healthcare system. Accordingly, demands on personal healthcare devices are surging. For a better diagnosis, more information about the patient’s health condition is required. There are four types of the most commonly used imaging modalities: X-ray scan, computerized tomography (CT), magnetic resonance imaging (MRI), and ultrasound (US). All of them except for the US requires large instrument to generate strong energy which may cause damage to the human body. Therefore, they have to be strictly regulated and are impossible to be a personalized device.

On the other hand, the US is an acoustic-wave-based non-invasive imaging modality. Recently, point-of-care US imaging systems have been researched and productized for virtual healthcare systems [1]. Because it is a personalized device, the system cannot be bulky like a traditional US imaging system. In this circumstance, there have been studies about miniaturizing the US system [2, 3]. To make the system compact, all the imaging system has to be integrated with a single system-on-a-chip (SoC) instead of using bulky commercial-off-the-shelf (COTS).

Thanks to the development of semiconductor technology, US transducers can be fabricated in a small footprint. It enables the integration of the US probe in a very small dimension such as a catheter [4]. Accordingly, intravascular US (IVUS) and intra-cardiac echocardiography (ICE) have become widely used for angiography and optical tomography [5–8]. In conventional IVUS and ICE, transducers are placed on the tip of the catheter and electronics are on the handles [4, 9, 10]. The transducers become vulnerable to noise because of their small size, and demands on the integration of front-end circuits with the transducers have been increased. Especially, the capacitive micromachined US transducer (CMUT) which has been actively studied as an alternative to piezoelectric transducer requires integration because its performance is significantly affected by parasitic.

With the trend of miniaturizing transducer size, 3-D imaging applications, which require a 2-D array, have been studied [11, 12]. Since the 2-D arrays have a large number of elements, it is extremely challenging to have separate interconnections of all the elements. Accordingly, signal processing including time-division-multiplexing (TDM) and beamformer are integrated close to the transducer array.

Based on the above-mentioned needs on US system integration with transducers, application-specific integrated circuits (ASIC), which are discussed in the later parts of the paper, have been researched and published. Section 2 reviews conventional US system architectures and introduces the type of circuits used in the architecture. Section 3 discusses circuits in US transmitter (TX) including pulse, switch, TX beamformer, and power management circuits. Following the TX circuits, receiver (RX) circuits are introduced in Sect. 4 such as transducer modeling, pre-amplifier, time-gain compensation (TGC), RX beamformer, quadrature sampler, and output driver. Finally, Sect. 5 concludes all the discussions in the paper.

Ultrasound imaging system architecture

US imaging is based on measuring acoustic impedance and physical distance from the imaging target. The acoustic wave reflection, echo signal, is generated when the acoustic wave transfers from one material to another one, and the materials have acoustic impedance differences. The larger the difference, the stronger the echo signal is generated. Because, in medical imaging, acoustic impedance is proportional to the density of the tissue, US imaging is used for detecting non-uniform tissue such as cancer and lumen. Since both echo signals and transmitted acoustic waves travel with the speed of the sound, the delay between the onset of the acoustic wave and the arrival of the echo signal indicates the distance from the imaging target.

To generate an acoustic wave, a transducer is stimulated by an electric signal, and the conversion is called TX mode (Fig. 1a). On the other hand, the echo signal reflected from the image target has to be converted to an electric signal for post-processing, and the conversion is called RX mode (Fig. 1b). For the US imaging, the transducer operates in TX mode at the beginning and, right after that, is changed to RX mode to measure the echo signal.

Fig. 1.

a TX and b RX mode of ultrasound imaging

A block diagram of the US imaging system is shown in Fig. 2. Based on the required dimension of the image, the transducer can be either a 1-D array [13] or a 2-D array [12]. An element in the array is either driven by US TX or followed by US RX, and a T/RX switch disconnects the other. Depending on imaging schemes, multiple elements can be activated at the same time. Based on system specification, an element could be assigned only for RX or TX [14], and, in this case, the T/RX switch is not required.

Fig. 2.

Block diagram of ultrasound imaging system

As a US TX, pulser is used to drive transducer element which often follows a TX beamformer. Since the beamformer needs complex control circuits to steer the focal point, the control circuits are often implemented on a chip to reduce the number of interconnects [15]. Because the pulser operates at a high voltage supply (HVVDD), many different supply voltages may be required to operate in a safe-operating-area (SOA). To reduce the wire connections for bias and supplies, power management IC (PMIC) can be implemented at the cost of the chip area [16].

The first stage of US RX is pre-amplifiers, and the most common pre-amplifiers are low noise amplifier (LNA) or trans-impedance amplifier (TIA). To compensate for the signal attenuation in medium, TGC can be implemented following LNA or TIA [16, 17]. The amplified signal needs to be delivered to the external RX through interconnects. To avoid signal distortion and noise, an analog-to-digital converter (ADC) can be adopted. In ICE and IVUS, the thickness of interconnects are key parameters to make the catheter thin enough to navigate narrow arteries. Accordingly, a beamformer which combines array signals into one signal node [15] and quadrature sampling mixer which reduces required bandwidth of signal have been researched [16].

Ultrasound transmitter

Pulser

The pulser can be divided into two categories: unipolar and bipolar pulser. Unipolar pulser has voltage swing of ground to HVVDD [16]. On the other hand, the output dynamic range of the bipolar pulser is a negative high voltage supply (− HVVDD) to HVVDD [18]. The unipolar pulser has the advantage of design simplicity not only the pulser itself but also the T/RX switch. Because of its simplicity, it is more suitable for high-frequency applications. On the other hand, the bipolar pulser may have a higher amplitude and better frequency shaping. Because of the frequency shaping, the signal energy is concentrated on in-band signals, and it improves SNR performance, transmission linearity, and side-lobe suppression [18–20].

Typically, both unipolar and bipolar pulsers are implemented as the push–pull structure shown in Fig. 3a. The main difference between them is that bipolar pulser uses negative supply for pull-down but ground for unipolar pulser except for complexity of gate driver [16]. Because the transducer requires high voltage stimulation to generate strong acoustic waves for better SNR, pulsers may be designed with HV devices such as laterally-diffused metal–oxide–semiconductor (LDMOS) and thick gate oxide MOS. Such devices often have different SOA for gate and drain. Mostly, the gate-source voltage (V_gs) cannot exceed 1.8–5 V but drain voltage can tolerate much higher voltage. Therefore, the gate voltage of pull-up and pull-down devices has to be separately controlled. The level shifter is commonly used to convert low voltage signals to the proper gate driving voltage range.

Fig. 3.

a Push–pull [16, 19], b 3-level [22], c unipolar-based bipolar [18], d feedback-based push–pull charge pump [20], e supply-doubled [23], and f extended drain common-

source amplifier pulser [25]

Since pulser operates on HVVDD, its power consumption may not be negligible. The power consumption of US ASIC is one of the most significant factors considering that overheating may damage tissues. Stimulating the transducer is the same as the charging capacitor, if there are more voltage sources available, power consumption can be significantly reduced by using adiabatic charging [21, 22]. In [22], by using a switched-capacitor-based DCDC converter that generates HVVDD/2, the 3-level pulser shown in Fig. 3b is achieved. The idea of using a DCDC converter can be extended to a multi-level pulser. However, there is a trade-off between the power loss of the DCDC converter and pulser efficiency improvement [22].

As shown in Fig. 3c, separately driving positive and negative pulse with two separate unipolar pulser, achieved the similar benefit of multi-level pulsing [18]. In addition to the power benefit, multi-level pulse improves suppression on the out-of-band signal. However, using multiple power supplies may increase the number of interconnection and chip areas. As shown in Fig. 3d, feedback-based push–pull charge pumps are used as a 7-level pulser [20]. Because it is not using adiabatic charging, the power consumption of the pulser is similar to conventional pulser in Fig. 3a.

Although HV devices provide high voltage tolerability, it cannot be infinite. Based on application, CMUT often operates in collapse mode which requires ~ 100 V pulse [23]. Considering most CMOS compatible HV processes cannot tolerate higher than 60 V, it cannot be simply achieved with a common push–pull structure. To address the issue, a voltage-doubler with an additional capacitor shown in Fig. 3e is proposed [24]. Since the amplitude of the output voltage is depending on the capacitance ratio of C1 and transducer, C1 has to be large enough to generate ~ 2 HVVDD. Because the output dynamic range exceeds the SOA, a diode (D1) and source follower (M3) are adopted as dedicated protection circuitry.

HV devices require an expensive HV process and occupy a large area. Therefore, reducing the number of HV devices is one of the key challenges. As shown in Fig. 3f, a common source (CS) amplifier with extended drain NMOS is used to eliminate HV devices from the pulser [25]. In this approach, the resistance (R1) should be carefully designed. If the resistance is too low, the short circuit current while pull-down operation consumes too much power. On the other hand, if R1 is too large, the rising edge of the pulse becomes too slow, and it increases out-band signal power. In [17], stacked transistors with staggered well potential were proposed to resolve the challenge. By stacking transistors, the voltage across each transistor does not exceed SOA. However, this approach requires a triple well process and four additional power supplies.

Because the pull-up device is operating at HVVDD, designing a gate driver (level shifter) for the pull-up device with the minimum number of HV devices is a challenging issue. There are two types of level shifters commonly used: AC coupling (Fig. 4a) and CS amplifier with resistive load (Fig. 4b). AC coupling is relatively easy to design, but it requires a large capacitor which makes the C_gs of the pull-up device negligible, and a large resistor to keep the DC voltage while not charging the gate too fast [19, 26].

Fig. 4.

a AC coupling [19, 26], b CS amplifier [18], and c diode-connected CS amplifier level shifters [16]

On the other hand, CS, shown in Fig. 4b, may use either resistor or diode-connected MOSFET as a load. If a Zener diode is available, the diode is placed parallel to the resistive load to clamp the output [18]. If a resistor is used as a load, the overdrive voltage of M1 should be sufficiently large to lower the sensitivity of V_th variation and noise. On the other hand, since the voltage drop across the diode-connected MOSFET is relatively constant if the diode operates saturation region, the V_GS is mostly constant. In addition, MOSFET is much smaller than a resistor. Therefore, resistor load can be replaced with diode-connected MOSFET followed by a buffer [16]. Since the voltage drop across the diode-connected MOSFET is process and temperature-dependent, a buffer is implemented after the amplifier to improve the slew of the gate voltage. The voltage drop should be designed to be close to 5 V to prevent the short circuit current on the buffer.

T/RX switch

While the US TX requires a high voltage supply, US RX has to be operating on a low voltage supply due to bandwidth, area, and power. Consequently, protection circuitry for RX circuits during the TX mode is required, if a TX and RX share elements. For unipolar pulser, a single HV MOSFET can be used. However, the size of the switch has to be carefully chosen. The larger switch improves noise performance and insertion loss, but increases the size of the system and reduces signal power and bandwidth because of its large parasitic capacitor [16].

The switch for bipolar pulser cannot be a single transistor because of the body diode of it which conducts either HVVDD or − HVVDD. The most common solution for this problem is using back-to-back switches [27]. Since the voltage between two switches can be either HVVDD or -HVVDD, it challenging to turn on/off with the minimum number of HV MOS. As shown in Fig. 5a, the Zener diode was used for the gate voltage controls [27, 28]. Since the Zener diode keeps the gate voltage below V_mid + 5 V, the switch can be operated within SOA while it is closed. If it is open, the diode can pull the V_mid to − HVVDD to make the switch fully off. This structure is simple, but, because it relies on the breakdown of the Zener diode, a certain amount of power consumption through it is inevitable.

Fig. 5.

Back-to-back switches with a Zener diode [27, 28], b resistor and diode-connected MOS [29], c floating gate [30], and d semi-latch floating gate [31]

To reduce the static power consumption, as shown in Fig. 5b, the Zener diode is replaced by a passive resistor and diode-connected transistor [29]. However, it has a strong dependency on process variation. As shown in Fig. 5c, another approach of using floating gate control circuits is proposed in [30]. It controls the gate of the switches with dynamic biasing transistors which require several level shifters. Since the level shifter requires HV devices, its complexity increases area. As shown in Fig. 5d, a semi-latch floating circuit was proposed [31]. Either I_on or I_off is turned on to commutate the status of the switch for a short amount of time, and the status is stored on C1 and C2. Since it is a pulse-based operation, static currents are eliminated. However, because the gate voltage of the switch is floating after the pulse, C1 and C2 should be large enough to make the impact of leakage from M1 and M2 negligible.

TX beamformer

The acoustic wave generated by a transducer element has maximum strength because of mechanical breakdown [23, 32]. To improve SNR, beamforming techniques may be used. The acoustic waves from an array arrived at a different time at the desired focal point because of the difference in distance. To compensate for the time difference, the specific amount of delay for each array element is applied, and the arrival times of all the acoustic waves are aligned. Accordingly, the acoustic energy is focused on the focal point, and this technique is called beamforming [33]. By varying the delay of elements, the focal point can be steered to any direction within the angle of view. The maximum and resolution of delay between each element determine the angle of view and image quality, respectively.

The commonly used architecture for the TX beamforming is clock-based digital beamforming [15, 34]. Firstly, by using the shift register, the delay of each element is programmed. After the programing, the internal counter counts the number of clock cycles and compares it with the programmed value. Once the counted and programmed values are matched, a pulse or successive pulses are applied to the TX array elements. For frequency adjustment or pulse-width apodization which reduces the side lobe [35] requires dynamic pulse width control. In [34], the current starved inverter is used to define the pulse width from the inverter delay. This structure is simple to implement and saves area, but it is vulnerable to process and temperature variation. In [15], the separate shift register is assigned for the pulse width control. Since the delay is based on the clock period, the pulse width is accurately controlled. However, it requires multi-bit shift registers for each channel, which increases the size of the system, and a high-frequency clock for fine-tuning.

To achieve the finer delay, a high-frequency clock is desired. However, because of inductance on interconnects, it is hard to get faster than 150 MHz clock from an external clock source. To address this issue, the internally generated high-frequency clock for fine-tuning is studied in [36]. In the work, a delay-locked loop (DLL) and phase interpolator are adopted. The DLL generates coarse delay (8.5 ns) and the phase interpolator adjusts fine delay (2.08 ns).

Power management circuits

The miniaturized US ASIC which is implemented on catheters or guidewire has a strict limit on the number of interconnections [16, 37]. To reduce the wire count, the internally generated power supply may be used. In addition, the battery-powered application also requires on-chip power management circuits to generate multiple supply voltage out of a battery [38]. The most common and power-efficient way to generate multiple supply voltages is using a DCDC converter [26]. In [39], a DCDC converter and charge pump-based boost converter convert 12 V battery supply to 60 V. However, the DCDC converter requires an inductor which takes a large area, and it may not be suitable for most miniaturized US systems.

In [38], the charge pump shown in Fig. 6a is used to generate 32 V from a 1.8 V supply. The charge pump requires an on-chip capacitor of hundreds of picofarads which occupies the largest area of the system. In addition to that, the efficiency of the high voltage supply is significantly low (35%), but, considering power consumption of high voltage supply is not a major portion of total power consumption, efficiency may not be an issue. In [16], there are two separate supply voltages: low voltage and high voltage supply. To reduce the number of interconnections, clock and high voltage supply share a line (HV SIG in Fig. 6b). By using a clock recovery circuit, the clock signal is exported from the line, and a high power supply rejection ratio (PSRR) regulator filter out the clock signal before it supplies the high voltage circuits.

Fig. 6.

a Charge-pump based boost converter [38], b HV PMIC [16], and c multiphase resonance-based boosting rectifier [41]

There have been studies about fully wireless US imaging systems [38, 40]. As a fully wireless system, the system can be powered by a battery or wireless power transfer (WPT). In IVUS or ICE, the battery is too big to be implemented. Consequently, a WPT system is studied in [41]. Because the US system consumes most of the power from RX which operates on LV supply, one WPT system can supply both HV and LV by using a multiphase resonance-based boosting rectifier (Fig. 6c). In the work, by reusing the WPT coil as an inductor for the boosting converter, LV of 1.84 V and HV of 21.5 V are supplied with power consumption of 17 mW and 4.6 mW, respectively.

Ultrasound receiver

Modeling of transducer

While designing US RX, transducer characteristic has to be carefully considered because it affects the front-end circuit. In addition, especially for CMUT, the transducer modeling also takes into account front-end circuit input impedance [16]. The two most widely used US transducers, CMUT and PZT, are physically different. PZT operation is based on the piezoelectric effect, but CMUT operation is based on the electrostatic effect. For PZT, Butterworth–Van Dyke (BVD) model shown in Fig. 7a is commonly used [17]. As CMUT modeling, as shown in Fig. 7b, the simplest one is a parallel resistor, capacitor, and current source [18, 22]. This model is too simple to consider all non-linear electrical characteristics of the CMUT. For more accurate modeling of CMUT, Mason’s plate model (Fig. 7c) is commonly used [16, 42–44]. It is divided into mechanical and electrical domains, and they are connected via a transformer. Because of the transformer, it is hard to directly use the model. Consequently, there is a study about fit Mason’s model into the 2nd order RLC model [16]. By transferring all mechanical domain impedances to the electrical domain, as shown in Fig. 7d, the equivalent model of CMUT becomes a combination of one series RLC which represents in-band behavior, and one parallel RLC (Z_P) which represents acoustic crosstalk.

Fig. 7.

a Butterworth–Van Dyke [17], b parallel RC [18, 22], c Mason’s plate [16, 42–44], and d 2nd order equivalent model [16]

TIA and LNA

The sensor interface circuits should start with a pre-amplifying stage to suppress the noise contribution in the following stages. For US RX, a TIA or LNA is commonly used as a pre-amplifier. TIA receives input as current while LNA receives voltage input. Accordingly, the TIA is suitable for high impedance transducers such as CMUT [40], and the LNA fits well for low impedance transducers such as PZT [17]. The usage of TIA or LNA should consider the required bandwidth and the input capacitance of the amplifier [45].

As shown in Fig. 8a, TIA consists of a core amplifier and feedback network. As a feedback network, resistor [16, 46], capacitor [15, 47, 48], and parallel resistor and capacitor [22, 42, 49] are commonly used. While designing a TIA, stability is the most important factor that has to be guaranteed in all the operating conditions. Two dominant poles of TIA often come from the feedback network and core amplifier open-loop pole. If the TIA does not have feedback capacitance (resistor feedback TIA), the feedback pole (w_IN) comes from R_F and C_IN

$$w_{\mathit{IN}}=\frac{1}{R_F{C}_{\mathit{IN}}},$$ 1

where R_F is feedback resistor, and C_IN is lumped capacitance on the input of TIA including transducer capacitance. To achieve a flat band over the signal bandwidth, critical damping is preferred, and it can be achieved by

$$w_0=\frac{2A_0}{R_F{C}_{\mathit{IN}}},$$ 2

where w₀ and A₀ are bandwidth and open-loop gain of the core amplifier, respectively. However, there are some cases where w₀ is not able to meet (2). In that case, feedback capacitor, C_F, can be used to improve stability, and 3 dB bandwidth (w_-3 dB) of TIA becomes

$$w_{-3\mathrm{dB}}=\frac{1}{R_F{C}_F}.$$ 3

if C_F is sufficiently larger than C_IN. Because C_F is larger than C_IN, the bandwidth of TIA is significantly reduced. However, the stability margin and bandwidth are no longer a function of C_IN which often has large variation depending on the process and bias voltage [50].

Fig. 8.

a TIA, b current-amplifier-based TIA [25, 47], and c LNA

The main sources of noise in TIA are transducer and feedback resistor (R_F) noise. Therefore, larger R_F is desired to achieve better noise performance. However, it also reduces the bandwidth of TIA. Accordingly, current amplifier TIA which removes the R_F from the feedback circuit is proposed (Fig. 8b) [25, 47]. This structure simply amplifies the current with a capacitance ratio of C1 and C2

$$A_0=1+\frac{C_2}{C_1}.$$ 4

Then, the amplified current is converted to voltage with an output resistor (R). To achieve sufficient stability margin, the following condition has to be satisfied

$$w_0\ge \frac{2C_1{A}_0}{C_{\mathit{IN}}+C_1}\frac{g_{m2}}{C_2}.$$ 5

As shown in Fig. 8c, inverting amplifier is commonly used as an LNA, and resistors [15, 51] and capacitive [17, 52, 53] are often used as feedback circuits. The stability of LNA is relatively easy to achieve because the transducer is separated from the core amplifier. Resistive feedback LNA is relatively straightforward. The gain of LNA is determined by the resistance ratio (Z1 and Z2), and the bandwidth is determined by the gain–bandwidth product (GBP) of the core amplifier. However, the resistors add up noise, and the bias of the transducer has to follow the common mode of the amplifier. On the other hand, the capacitor does not add noise and it blocks DC. The capacitive feedback LNA works as a bandpass filter, and the capacitors have to be large enough to make low-cutoff frequency lower than the signal bandwidth.

Time gain compensation (TGC)

US acoustic wave is diminished along with the traveling distance, and the attenuation is the function of frequency and attenuation coefficient of the medium. Since the frequency and medium are known factors, it is possible to compensate the attenuation in the circuits. Because the attenuation coefficient is in dB/MHz/cm scale [54], the linear-in-dB gain control circuit is required.

The simplest way to achieve TGC is changing the gain of the feedback amplifier with discrete resistors and switches (Fig. 9a) [17, 55, 56]. This approach is easily implemented at the cost of a small area. However, it requires additional control to adjust the gain, and the quantization error should be compensated afterward. In addition, at the time of gain transition, there are switching noises that cause image artifacts. Accordingly, continuous-time gain compensation has been studied [57–60]. As shown in Fig. 8b, an open-loop amplifier with a diode-connected load that has linear-in-dB gain control by modifying the I_C1/I_C2 ratio is adopted [57–59]. Because all the transistors have to be in the saturation region, the linear-in-dB range is relatively narrow. As shown in Fig. 9c, the capacitive ladder is used as a feedback network of TIA to achieve linear-in-dB gain control [60]. To achieve continuous gain control, a current-steering circuit is adopted for gate control on the switches (M_P,n and M_N,n). Because it requires complex gate control, the external control signal is necessary.

Fig. 9.

a Discrete resistor [17, 55, 56], b diode-connected load variable g_m [57–59], and c capacitive ladder feedback TGC [60]

RX beamformer

Similar to the TX beamformer, by applying delay for each RX element output, signal power is accumulated at the focal point. Because the RX beamformer combines all the sub-array elements output in a signal, it reduces interconnects at the expense of frame rate. Compared to the TX beamformer, the RX signal needs to deal with an analog signal. Consequently, a simple digital delay technique is not applicable. To apply a delay on the analog signal, a sample-and-hold (S/H) circuit can be used [17, 61, 62] (Fig. 10a). The delay of the S/H circuit is accurately controlled by the clock. However, to suppress the noise and leakage of the switch, storing capacitors have to be large enough, which increases both area and power consumption.

Fig. 10.

a Sample and hold [17, 61, 62] and b biquad current mirror all-pass filter delay cell [50]

As shown in Fig. 10b, an all-pass-filter-based analog delay circuit is proposed in [50]. By using a biquad current mirror which has a much wider bandwidth compared to the signal bandwidth, a fine group delay is achieved without signal distortion. This approach relies on the bandwidth of the current mirror which is process-dependent. On the other hand, RX beamforming can be applied after digitization. In [51], eight time-interleaved SAR ADCs are used. Because of the nature of time-interleaving, the delay on the signal is applied before the digitization.

Quadrature sampler

The B-mode scan requires three factors: delay, amplitude, and phase. That information does not require the raw signal, but I/Q modulated signals are sufficient. Accordingly, quadrature sampling is often used to reduce the required bandwidth [16, 56, 63]. The quadrature sampling requires direct down-conversion. Because of its complexity, the sampling usually happens at the back-end. However, some applications benefit from the reduced bandwidth over design complexity.

A passive mixer is commonly used as a quadrature sampler because of its high linearity. Since the signal is already pre-amplified from TIA or LNA, the noise contribution is not a big concern. Because the down-conversion mixer generates harmonic signals, a low pass filter has to be followed. To achieve flat bandwidth and sharp roll-off, 2nd biquad TIA shown in Fig. 11 is following the switches [16].

Fig. 11.

Quadrature sampler [16]

Output driver

The catheter or guidewire-based miniaturized US has a long interconnect, and driving the long wire is challenging. The simplest and most straightforward way to send the data is using a wide-band unity gain buffer [15, 16, 34, 37, 57]. If the system needs to drive a long wire, impedance matching is necessary, and the output impedance of the buffer should be 50 or 75 Ω. Thus, the power consumption of the buffer is not negligible.

To avoid using an analog buffer, output signals are often digitized before being transferred to the external back-end system. The digitized output reduces the impact of noise coupled on the interconnection wire. In addition, by using low voltage differential signaling (LVDS) techniques, the power consumption for data transferring and the noise on the wire can be minimized at the expense of one more interconnect [19]. US system has relatively low data throughput but is power sensitive. Accordingly, the successive-approximation-register (SAR) ADC shown in Fig. 12a is commonly used [17, 20, 42, 46]. The ratio between parasitic capacitance and DAC capacitance is an important factor in SAR ADC performance. Therefore, the metal–insulator–metal (MIM) capacitor is preferred, but it is expensive.

Fig. 12.

a SAR ADC [17, 20, 42] and b IR-PWM [47]

Miniaturized US systems have strict limits on power consumption and area. However, the external back-end system may not have the limits. In [40], a pulse-width-modulator (PWM) shown in Fig. 12b is proposed as an alternative to the ADC. It transfers the analog signal as pulse width, and the external back-end decodes the PWM signal to digital signal by using a time-to-digital converter (TDC). Because the PWM requires only one OTA and two capacitors, it can be implemented in a small area. The impulse radio (IR) ultra-wideband (UWB) TX generates and transmits two impulses at the rising and falling edge of the PWM signal. Because it sends only two impulses per sample, the power consumption of wireless TX is relatively small [40] (Fig. 12b).

Conclusion

This paper reviewed the system architecture of US ASIC and introduced state-of-the-art circuit techniques for each block. As a part of US TX, many different types of pulsers are reviewed with gate driver circuits. Challenges to TRX switch design are discussed, and prior works about it is addressed. Methods of generating delay for the accurate TX beamforming which increases SNR are shown. Multiple power management circuits to reduce the number of supplies are reviewed.

As part of US RX design methodology, equivalent models of the transducers are presented following with the pre-amplifying stage (LNA and TIA) design consideration. The purpose of the TGC is introduced, and various circuits to achieve linear-in-dB gain control are also presented. The delay generation techniques of RX beamformer similar to TX beamformer are studied. The Quadrature sampling and its mixer design are discussed in Sect. 4.5 that is followed by Sect. 4.6 where the output drivers and digitization circuits are shown.

Funding

This work was supported by the Research Fund of Hanyang University (HY-202200000001515).

Declarations

Conflict of interest

Jaemyung Lim declares that he/she has no conflict of interest.

Ethical approval

This article does not contain any studies with human participants or animals performed by any of the authors.