0.5 V Versatile Voltage- and Transconductance-Mode Analog Filter Using Differential Difference Transconductance Amplifier

Abstract

In this work, a new versatile voltage- and transconductance-mode analog filter is proposed. The filter, without requiring resistors, employs three differential-difference transconductance amplifiers (DDTAs) and two grounded capacitors, which is suitable for integrated circuit implementation. Unlike previous works, the proposed filter topology provides: (1) high-input and low-output impedances for a voltage-mode (VM) analog filter, that is desirable in a cascade method of realizing higher order filters, and (2) high-input and high-output impedances for a transconductance-mode (TM) analog filter without any circuit modification. Moreover, a quadrature oscillator is obtained by simply adding a feedback connection. Both VM and TM filters provide five standard filtering responses such as low-pass, high-pass, band-pass, band-stop and all-pass responses into single topology. The natural frequency and the condition of oscillation can be electronically controlled. The circuit operates with 0.5 V supply voltage. It was designed and simulated in the Cadence program using 0.18 µm CMOS technology from TSMC.

1. Introduction

The differential difference amplifiers (DDA) are versatile analog building blocks that offer two differential input ports, high-input impedance, and low-output impedance [1,2,3]. If an ideal DDA (infinite open-loop gain) operates in negative feedback configuration, it can work as summing and subtracting amplifier with unity gain. This ability has been used to increase the performance of new devices such as a differential difference current conveyor (DDCC) [4], differential difference current conveyor transconductance amplifier (DDCCTA) [5], or differential difference transconductance amplifier (DDTA) [6]. The properties of DDCC are similar to those of the conventional second-generation current conveyor (CCII) [7] except the input port that offers arithmetic operation. Thus, DDCC-based filters require resistors and its natural frequency cannot be tuned electronically, for example, see [8,9,10,11,12]. To obtain electronic tuning ability, the DDTA has been presented. The DDTA is a cascade connection of DDA and a transconductance amplifier (TA), as shown in Figure 1a, and its electrical symbol is shown in Figure 1b. Compared with DDCCTA, DDTA is more compact. The DDTA provides addition and subtraction of the voltages V_y1, V_y2, V_y3 at the w-terminal, namely, V_w = V_y1 − V_y2 + V_y3. This terminal usually provides low-impedance level (results from negative feedback of DDA), which is suitable for output terminals of voltage-mode circuits. The o-terminal provides output current which is the product of the differential voltage V_w-V_y4 and the transconductance g_m, i.e., I_o = g_m(V_w-V_y4). Thus, an electronic tuning ability of DDTA can be obtained by tuning $g_m$. The ideal characteristics of DDTA in Figure 1a can be described by

$$V_w=V_{y1}-V_{y2}+V_{y3}$$ (1)

$$I_o=g_m\left(V_w-V_{y4}\right)$$ (2)

Figure 1.

DDTA, (a) possible realization of DDTA, (b) electrical symbol.

There are many applications of DDTA in the open literature, such as analog filters [13,14,15,16,17,18]. The universal filter in [13] uses DDTA with ±2 V supply and 1.66 mW power consumption. The analog wave filter in [14] uses DDTA with ±1.8 V supply and 21.59 μW power consumption. The mixed-mode universal filter in [15] uses DDTA with 1.2 V supply and 66 μW power consumption. The sub-volt universal filters in [16,17] use DDTAs with 0.5 V supply and 205.5 nW [16] and 277 nW [17] power consumption. Finally, the sub-voltage universal filter in [18] use DDTA with a 0.3 V supply and 357.4 nW power consumption.

Universal analog filters can be applied in telecommunication, electronic, and control systems, performing such functions as rejection of out-of-band noise, attenuation of the unwanted frequency components from the applied signal, realization of the active crossover network, or reduction of noise in a process measurement signal [19,20,21]. Moreover, they can be used to realize high-order filters [22]. In most applications of universal analog filters, voltage-mode analog filters with high-input and low-output impedances are required to avoid additional buffers or loading effects. There are universal analog filters with high-input and low-output impedances available in literature, using alternative active elements such as DDCCs [11,23], fully differential second-generation current conveyors (FDCCII) [24], current-feedback amplifiers (CFA) [25,26,27], universal voltage conveyors (UVC) [28], voltage differencing differential difference amplifier (VDDDA) [29]. However, analog filters based on these active devices in [11,23,24,25,26,27,28] require passive resistors and do not offer electronic tuning ability. The analog filters based on VDDDAs [29] provide an electronic tuning ability, but only voltage-mode filters and seven transfer functions are proposed.

This work proposes a versatile analog filter based on low-voltage differential difference transconductance amplifiers with enhanced performance. The proposed filter topology offers high-input and low-output impedances which is convenient for voltage-mode circuits, as well as many transfer functions of low-pass (LP), high-pass (HP), band-pass (BP), band-stop (BS) and all-pass (AP) filters into same topology. In addition, using the same versatile topology, transconductance-mode filters and a quadrature oscillator can be obtained. TM version provides LP, HP, BP, BS, and AP characteristics with high-input and high-output impedance, that is required of TM circuits. The natural frequency of the filters and the condition of oscillation for oscillator can be electronically controlled. The proposed DDTA and its applications operate with 0.5 V supply and are designed and simulated in the Cadence program using the 0.18 µm CMOS process from TSMC.

2. Proposed Circuit

2.1. 0.5 V DDTA

The CMOS structure of the proposed DDTA is shown in Figure 2. It consists of two main blocks, a differential-difference current conveyor realized with DDA operating in a negative-feedback configuration and TA [16]. The differential-difference amplifier is realized using a non-tailed differential pair M₁-M₂ [30], which is well suited for low-voltage circuits. However, the input transistors of this pair were replaced by multiple-input bulk-driven transistors (BD MI-MOST), shown in Figure 3. The multiple-input bulk-driven transistors are realized with an additional capacitive voltage divider, consisting of the capacitors C_B, shunted by anti-parallel connections of the transistors M_L. Note, that M_L operate with V_GS = 0, thus realizing a very large resistance R_LARGE. Their purpose is to provide proper biasing of the input terminals for DC. For frequencies much larger than 1/R_LARGEC_B, the resulting impedance of the R_LERGEC_B connections is dominated by capacitors, and the AC voltage at the bulk terminals of the multiple input transistors can be expressed as:

$$V_{bi}={{\displaystyle \sum }}_{i=1}^n{\beta }_i{V}_i,$$ (3)

where, neglecting the impact of the MOS transistors, seen from their bulk terminals, the voltage gain of the input capacitive divider, from i-th input βi, in general case can be expressed as:

$${\beta }_i=\frac{C_{Bi}}{{{\displaystyle \sum }}_{i=1}^n{C}_{Bi}}$$ (4)

where n is the number of inputs. In the proposed design n = 2 and all capacitors C_B are equal to each other, then β_i = 1/2, for i = 1,2. Denoting the non-inverting and inverting input voltages of the input differential pair as V_i+ and V_i-, respectively, the differential voltage at the bulk terminals of the input non-tailed pair M_1A and M_1B can be expressed as:

$$V_{bi}={{\displaystyle \sum }}_{i=1}^n{\beta }_i\left(V_{+i}-V_{-i}\right),$$ (5)

Figure 2.

The CMOS structure of the 0.5 V DDTA.

Figure 3.

The symbol of bulk-driven MI-MOST (a) and the CMOS realization (b).

Thus, the AC differential voltage of the “internal” differential pair is a sum of the input differential voltages applied to the capacitive inputs. In such a way, a differential-difference amplifier is realized, using only one transistor structure of the input pair, thus saving the dissipation power and decreasing complexity of the input stage.

Overall, the DDA used in the first block of the proposed DDTA can be seen as a two-stage amplifier, where the first stage can be considered as a current mirror OTA, based on the multiple-input pair, while the second stage, M₁₃-M₁₆, is a typical class-A common source amplifier. The capacitor C_C is used for frequency compensation. The two-stage architecture allows increasing the open-loop voltage gain and consequently the accuracy of the realized circuit function. The voltage gain is further increased thanks to the partial-positive feedback (PPF) circuit, realized using two sub-circuits M₇-M₈ and M₉-M₁₀. Each of the cross-coupled pairs of transistors generates negative resistances, thus partially increasing the resulting resistances at the gate/drain nodes of the transistors M_2A,B and M_5,6 respectively, and consequently increasing the voltage gain of the DDA. However, PPF leads to increased sensitivity of the circuit to transistor mismatch, that can lead to stability problems. This sensitivity, like the voltage gain, increases with the amount of positive feedback, i.e., when the ratio of transconductances g_m7,8/g_m2A,B (g_m9,10/g_m5,6) increases towards unity. Therefore, there is a tradeoff between the achieved improvement of the voltage gain and the circuit sensitivity to transistor mismatch. As it was shown in [16], applying two PPF circuits with weaker positive feedback, leads to the same improvement of the voltage gain, with less sensitivity, than applying one PPF circuit providing the same improvement of the gain. Therefore, in the circuit of Figure 2 two PPF circuits have been applied, one connected directly to the input transistors and the second, applied to the load of the input pair.

The open-loop low-frequency voltage gain of the DDA, from one differential input, with the second input grounded for AC signals, can be expressed as [16]:

$$A_{vo}=\frac{\beta A_o}{\left(1-m_1\right)\left(1-m_2\right)}$$ (6)

where A_o is the DC open-loop voltage gain of the DDA without PPF circuits, calculated from the bulk terminals of M₁, and given as:

$$2g_{mb1}(r_{ds15}||r_{ds12})g_{m16}(r_{ds16}||r_{ds13})$$ (7)

The coefficients m₁ and m₂ can be expressed as:

$$m_1=\frac{g_{m9,10}}{g_{m5,6}+g_{ds2}+g_{ds3,4}+g_{ds7,8}}\cong \frac{g_{m9,10}}{g_{m5,6}}$$ (8)

$$m_2=\frac{g_{m7,8}}{g_{m2}+g_{ds1}+g_{ds5,6}+g_{ds9,10}}\cong \frac{g_{m7,8}}{g_{m2}}$$ (9)

The coefficients m₁ and m₂ can be considered as the ratios of negative to positive conductances in “bottom” and “upper” PPF. In general case, the coefficients can range from zero (lack of positive feedback) to unity (100% positive feedback). The overall voltage gain increases to infinity, as m₁ or m₂ tends to unity, i.e., as the amount of positive feedback increases. Thanks to the application of two PPFs in the proposed design with m₁ = m₂ = 0.5, a sufficient increase of the voltage gain (12 dB), with acceptable circuit sensitivity to transistor mismatch was achieved.

The second block of the DDTA in Figure 2 is a transconductance amplifier. In the proposed design, a BD source-degenerative (SD) differential pair, with triode region BD transistors M₁₁ and M₁₂ has been applied, which allows increasing the linear range of the TA by about 3 times, as compared with the conventional BD pair used in [16]. Even better linearity could be achieved using a non-tailed pair with a linear resistor [18,31], but such a solution is not very suitable for transconductors operating in nS range, since it would require very large resistors, not practical in silicon realizations.

For the TA in Figure 2, operating in a weak-inversion region, optimum linearity is achieved if the following condition is satisfied:

$$k=\frac{{\left(W/L\right)}_{11.12}}{{\left(W/L\right)}_{1,2}}=0.5$$ (10)

where W and L are the transistor channel width and length, respectively. Note, that the above condition is the same as for the gate-driven counterpart of the circuit [32]. For this optimum case, with unity-gain current mirrors, the circuit transconductance g_m can be expressed as:

$$g_m=\eta ·\frac{4k}{4k+1}·\frac{I_{set}}{n_p{U}_T}$$ (11)

where η = g_mb1,2/g_m1,2 is the bulk to gate transconductance ratio at the operating point for the input transistors M₁ and M₂, n_p is the subthreshold slope factor for p-channel MOS transistors and U_T is the thermal potential. As it can be concluded from (11), the circuit transconductance is proportional to the biasing current I_set, thus it can be easily regulated using this current.

2.2. Versatile Analog Filter

The proposed versatile analog filter is shown in Figure 4. The circuit employs only three DDTAs and two grounded capacitors. It should be noted that the output voltages V_o1, V_o2, and V_o3 are defined at the low-impedance w-terminals while the input voltages V_in1 to V_in7 are fed to the high-impedance y-terminals of the DDTA.

Figure 4.

Proposed voltage-mode analog filter.

Using (1), (2) and nodal analysis, the output voltages of the circuit in Figure 4 can be expressed by

$$V_{o1}=\frac{s^2{C}_1{C}_2\left(V_{in1}+V_{in6}-V_{in7}\right)+\left(s{C}_2{g}_{m1}+g_{m1}{g}_{m2}\right)V_{in2}+s{C}_1{g}_{m2}\left(V_{in3}+V_{in4}-V_{in5}\right)}{S^2{C}_1{C}_2+S{C}_2{g}_{m1}+g_{m1}{g}_{m2}},$$ (12)

$$V_{o2}=\frac{s{C}_2{g}_{m1}\left(-V_{in1}+V_{in2}-V_{in6}+V_{in7}\right)+\left(S^2{C}_1{C}_2+S{C}_2{g}_{m1}\right)\left(V_{in3+}{V}_{in4}\right)+g_{m1}{g}_{m2}{V}_{in5}}{S^2{C}_1{C}_2+S{C}_2{g}_{m1}+g_{m1}{g}_{m2}},$$ (13)

$$V_{o3}=\frac{s{C}_2{g}_{m1}\left(V_{in1}-V_{in2}\right)+g_{m1}{g}_{m2}\left(V_{in3}+V_{in4}-V_{in5}\right)+\left(s^2{C}_1{C}_2+g_{m1}{g}_{m2}\right)(V_{in7}-V_{in6})}{S^2{C}_1{C}_2+S{C}_2{g}_{m1}+g_{m1}{g}_{m2}},$$ (14)

The filtering responses can be obtained by appropriately applying the input signals and choosing the output voltages and the variant filtering responses are shown in Table 1. It should be noted that the VM analog filter provides 34 filtering responses of LP, HP, BP, BS, and AP filters, all of them in both, inverting and non-inverting versions.

Table 1.

Obtaining variant filtering function of voltage-mode analog filter.

Output	Input	Filtering Function	Transfer Functions
$V_{o1}$	$V_{in2}=V_{in5}=V_{in}$	Non-inverting LP	$g_{m1}{g}_{m2}/\mathrm{D}\left(\mathrm{s}\right)$
	$V_{in3}=V_{in}$	Non-inverting BP	$\mathrm{s}{C}_1{g}_{m2}/\mathrm{D}\left(\mathrm{s}\right)$
	$V_{in4}=V_{in}$	Non-inverting BP	$\mathrm{s}{C}_1{g}_{m2}/\mathrm{D}\left(\mathrm{s}\right)$
	$V_{in5}=V_{in}$	Inverting BP	$-\mathrm{s}{C}_1{g}_{m2}/\mathrm{D}\left(\mathrm{s}\right)$
	$V_{in1}=V_{in}$	Non-inverting HP	$s^2{C}_1{C}_2/\mathrm{D}\left(\mathrm{s}\right)$
	$V_{in6}=V_{in}$	Non-inverting HP	$s^2{C}_1{C}_2/\mathrm{D}\left(\mathrm{s}\right)$
	$V_{in7}=V_{in}$	Inverting HP	$-s^2{C}_1{C}_2/\mathrm{D}\left(\mathrm{s}\right)$
	$V_{in1}=V_{in2}=V_{in5}=V_{in}$	Non-inverting BS	$s^2{C}_1{C}_2+g_{m1}{g}_{m2}$
	$V_{in2}=V_{in5}=V_{in6}=V_{in}$	Non-inverting BS	$s^2{C}_1{C}_2+g_{m1}{g}_{m2}$
$V_{o2}$	$V_{in5}=V_{in}$	Non-Inverting LP	$g_{m1}{g}_{m2}/\mathrm{D}\left(\mathrm{s}\right)$
	$V_{in1}=V_{in}$	Inverting BP	$-\mathrm{s}{C}_2{g}_{m1}/\mathrm{D}\left(\mathrm{s}\right)$
	$V_{in2}=V_{in}$	Non-inverting BP	$\mathrm{s}{C}_2{g}_{m1}/\mathrm{D}\left(\mathrm{s}\right)$
	$V_{in6}=V_{in}$	Inverting BP	$-\mathrm{s}{C}_2{g}_{m1}/\mathrm{D}\left(\mathrm{s}\right)$
	$V_{in7}=V_{in}$	Non-inverting BP	$\mathrm{s}{C}_2{g}_{m1}/\mathrm{D}\left(\mathrm{s}\right)$
	$V_{in1}=V_{in3}=V_{in}$	Non-inverting HP	$s^2{C}_1{C}_2/\mathrm{D}\left(\mathrm{s}\right)$
	$V_{in1}=V_{in4}=V_{in}$	Non-inverting HP	$s^2{C}_1{C}_2/\mathrm{D}\left(\mathrm{s}\right)$
	$V_{in3}=V_{in6}=V_{in}$	Non-inverting HP	$s^2{C}_1{C}_2/\mathrm{D}\left(\mathrm{s}\right)$
	$V_{in4}=V_{in6}=V_{in}$	Non-inverting HP	$s^2{C}_1{C}_2/\mathrm{D}\left(\mathrm{s}\right)$
	$V_{in1}=V_{in3}=V_{in5}=V_{in}$	Non-inverting BS	$s^2{C}_1{C}_2+g_{m1}{g}_{m2}/\mathrm{D}\left(\mathrm{s}\right)$
	$V_{in1}=V_{in4}=V_{in5}=V_{in}$	Non-inverting BS	$s^2{C}_1{C}_2+g_{m1}{g}_{m2}/\mathrm{D}\left(\mathrm{s}\right)$
	$V_{in3}=V_{in5}=V_{in6}=V_{in}$	Non-inverting BS	$s^2{C}_1{C}_2+g_{m1}{g}_{m2}/\mathrm{D}\left(\mathrm{s}\right)$
	$V_{in4}=V_{in5}=V_{in6}=V_{in}$	Non-inverting BS	$s^2{C}_1{C}_2+g_{m1}{g}_{m2}/\mathrm{D}\left(\mathrm{s}\right)$
	$V_{in3}=V_{in5}=V_{in1}=V_{in6}=V_{in}$	Non-inverting AP	$s^2{C}_1{C}_2-\mathrm{s}{C}_2{g}_{m1}+g_{m1}{g}_{m2}/\mathrm{D}\left(\mathrm{s}\right)$
$V_{o3}$	$V_{in3}=V_{in}$	Non-inverting LP	$g_{m1}{g}_{m2}/\mathrm{D}\left(\mathrm{s}\right)$
	$V_{in4}=V_{in}$	Non-inverting LP	$g_{m1}{g}_{m2}/\mathrm{D}\left(\mathrm{s}\right)$
	$V_{in5}=V_{in}$	Inverting LP	$-g_{m1}{g}_{m2}/\mathrm{D}\left(\mathrm{s}\right)$
	$V_{in1}=V_{in}$	Non-inverting BP	$\mathrm{s}{C}_2{g}_{m1}/\mathrm{D}\left(\mathrm{s}\right)$
	$V_{in2}=V_{in}$	Inverting BP	$-\mathrm{s}{C}_2{g}_{m1}/\mathrm{D}\left(\mathrm{s}\right)$
	$V_{in7}=V_{in5}=V_{in}$	Non-inverting HP	$s^2{C}_1{C}_2/\mathrm{D}\left(\mathrm{s}\right)$
	$V_{in3}=V_{in6}=V_{in}$	Inverting HP	-$s^2{C}_1{C}_2/\mathrm{D}\left(\mathrm{s}\right)$
	$V_{in7}=V_{in}$	Non-inverting BS	$s^2{C}_1{C}_2+g_{m1}{g}_{m2}/\mathrm{D}\left(\mathrm{s}\right)$
	$V_{in6}=V_{in}$	Inverting BS	$-\left(s^2{C}_1{C}_2+g_{m1}{g}_{m2}\right)/\mathrm{D}\left(\mathrm{s}\right)$
	$V_{in2}=V_{in7}=V_{in}$	Non-inverting AP	$s^2{C}_1{C}_2-\mathrm{s}{C}_2{g}_{m1}+g_{m1}{g}_{m2}/\mathrm{D}\left(\mathrm{s}\right)$
	$V_{in1}=V_{in6}=V_{in}$	Inverting AP	$-\left(s^2{C}_1{C}_2-s{C}_2{g}_{m1}+g_{m1}{g}_{m2}\right)/\mathrm{D}\left(\mathrm{s}\right)$

where $D\left(s\right)=s^2{C}_1{C}_2+\mathrm{s}{C}_2{g}_{m1}+g_{m1}{g}_{m2}$.

Considering denominator of (12)–(14), the natural frequency (ω_o) and the quality factor (Q) are given by

$${\mathsf{\omega }}_o=\sqrt{\frac{g_{m1}{g}_{m2}}{C_1{C}_2}},$$ (15)

$$\mathrm{Q}=\sqrt{\frac{g_{m2}{C}_1}{g_{m1}{C}_2}}$$ (16)

The parameter ω_o can be controlled electronically by g_m1 = g_m2 and, in this case, the parameter Q is given by C₁/C₂.

The VM analog filter in Figure 4 can also operate as transconductance-mode (TM) analog filter, as shown in Figure 5. The output current of the TM filter is the output current of the o-terminal of DDTA₃ while the input voltages are same as for the VM filter. The output current of the TM filter is given by

$$I_{out}=\frac{\begin{array}{c}s{C}_2{g}_{m1}{g}_{m3}\left(V_{in1}-V_{in2}\right)+g_{m1}{g}_{m2}{g}_{m3}\left(V_{in3}+V_{in4}-V_{in5}\right)\\ +\left(s^2{C}_1{C}_2+g_{m1}{g}_{m2}\right)g_{m3}\left(V_{in7}-V_{in6}\right)\end{array}}{s^2{C}_1{C}_2+s{C}_2{g}_{m1}+g_{m1}{g}_{m2}}$$ (17)

Figure 5.

Modified transconductance-mode analog filter.

The filtering responses can be obtained by appropriately applying the input signals. The variant filtering responses are listed in Table 2. It should be noted that the TM filter provides 11 transfer functions of LP, HP, BP, BS, and AP filters and all filtering responses provide both inverting and non-inverting transfer functions.

Table 2.

Obtaining variant filtering function of transconductance-mode analog filter.

Output	Input	Filtering Function	Transfer Functions
$I_{out}$	$V_{in3}=V_{in}$	Non-inverting LP	$g_{m1}{g}_{m2}{g}_{m3}/\mathrm{D}\left(\mathrm{s}\right)$
	$V_{in4}=V_{in}$	Non-inverting LP	$g_{m1}{g}_{m2}{g}_{m3}/\mathrm{D}\left(\mathrm{s}\right)$
	$V_{in5}=V_{in}$	Inverting LP	$-g_{m1}{g}_{m2}{g}_{m3}/\mathrm{D}\left(\mathrm{s}\right)$
	$V_{in1}=V_{in}$	Non-inverting BP	$\mathrm{s}{C}_2{g}_{m1}{g}_{m3}/\mathrm{D}\left(\mathrm{s}\right)$
	$V_{in2}=V_{in}$	Inverting BP	$-\mathrm{s}{C}_2{g}_{m1}{g}_{m3}/\mathrm{D}\left(\mathrm{s}\right)$
	$V_{in7}=V_{in5}=V_{in}$	Non-inverting HP	$s^2{C}_1{C}_2/\mathrm{D}\left(\mathrm{s}\right)$
	$V_{in3}=V_{in6}=V_{in}$	Inverting HP	$s^2{C}_1{C}_2/\mathrm{D}\left(\mathrm{s}\right)$
	$V_{in6}=V_{in}$	Inverting BS	$\left\{\right(s{\}}^2{C}_1{C}_2+g_{m1}{g}_{m2})/\mathrm{D}\left(\mathrm{s}\right)$
	$V_{in7}=V_{in}$	Non-inverting BS	$-\left\{\right(s{\}}^2{C}_1{C}_2+g_{m1}{g}_{m2})g_{m3}/\mathrm{D}\left(\mathrm{s}\right)$
	$V_{in2}=V_{in7}=V_{in}$	Non-inverting AP	$\left\{\right(s{\}}^2{C}_1{C}_2-\mathrm{s}{C}_2{g}_{m1}+g_{m1}{g}_{m2})g_{m3}/\mathrm{D}\left(\mathrm{s}\right)$
	$V_{in1}=V_{in6}=V_{in}$	Inverting AP	$-\left\{\right(s{\}}^2{C}_1{C}_2+\mathrm{s}{C}_2{g}_{m1}+g_{m1}{g}_{m2})g_{m3}/\mathrm{D}\left(\mathrm{s}\right)$

where $D\left(s\right)=s^2{C}_1{C}_2+\mathrm{s}{C}_2{g}_{m1}+g_{m1}{g}_{m2}$.

The proposed VM analog filter can be modified to work as a quadrature oscillator as shown in Figure 6. The VM transfer function of a BP filter V_o1/V_in3 is used, with a gain given by

$$\frac{V_{o1}}{V_{in3}}=\frac{s{C}_1{g}_{m2}}{s^2{C}_1{C}_2+s{C}_2{g}_{m1}+g_{m1}{g}_{m2}}$$ (18)

Figure 6.

Modified quadrature oscillator.

Assuming V_o1/V_in3 = 1, the characteristic equation of the oscillator is

$$s^2{C}_1{C}_2+\mathrm{s}\left(C_2{g}_{m1}-C_1{g}_{m2}\right)+g_{m1}{g}_{m2}=0$$ (19)

assuming further g_m1 = g_m2, the condition of oscillation is given by

$$C_2-C_1=0$$ (20)

The frequency of oscillation is expressed as

$${\mathsf{\omega }}_o=\sqrt{\frac{g_{m1}{g}_{m2}}{C_1{C}_2}}$$ (21)

Note, that the frequency of oscillation ω_o can be electronically controlled via g_m1 and g_m2.

Considering nodes V_o1 and V_o2 in Figure 6, we see, that DDTA₂ and C₂ form a lossless integrator with a transfer function given by

$$\frac{V_{o2}}{V_{o1}}=\frac{g_{m2}}{s{C}_2}$$ (22)

At ω = ω_o, the phase and magnitude are given respectively by ∅ = π/2 and |g_m2/C₂|.

Non-idealities analysis

In non-ideal case, the main equations describing the characteristics of DDTA can be expressed as:

$$V_w={\beta }_{k1}{V}_{y1}-{\beta }_{k2}{V}_{y2}+{\beta }_{k3}{V}_{y3}$$ (23)

$$I_o=g_{mnk}\left(V_w-V_{y4}\right)$$ (24)

where β_k1, β_k2, β_k3 denote the non-ideal voltage gains from y₁, y₂ and y₃ terminals, respectively, to the w-terminal of the k-th DDTA (β_k1 = β_k2 = β_k3 = 1 in ideal case), g_mnk is the frequency-dependent transconductance of the k-th DDTA. At the frequency near the cut-off frequency, g_mnk can be approximated by [33]

$$g_{mnk}=g_{mk}\left(1-{\mu }_k\mathrm{s}\right),$$ (25)

where μ_k = 1⁄ω_gk, and ω_gk denotes the first pole of the k-th DDTA.

Using (23), the output voltages V_o1, V_o2, and V_o3 of the VM analog filter can be rewritten as

$$V_{o1}=\frac{\begin{array}{c}\left\{s^2{C}_1{C}_2\left({\beta }_{32}{V}_{in1}+{\beta }_{12}{\beta }_{33}{V}_{in6}-{\beta }_{12}{\beta }_{31}{V}_{in7}\right)+\left(s{C}_2{g}_{mn1}{\beta }_{12}{\beta }_{31}+g_{mn1}{g}_{mn2}{\beta }_{11}{\beta }_{22}\right)V_{in2}\right.\\ \left.+s{C}_1{g}_{mn2}\left({\beta }_{11}{\beta }_{21}{V}_{in3}+{\beta }_{11}{\beta }_{23}{V}_{in4}-{\beta }_{12}{V}_{in5}\right)\right\}\end{array}}{s^2{C}_1{C}_2+s{C}_2{g}_{mn1}{\beta }_{12}{\beta }_{31}+g_{mn1}{g}_{mn2}{\beta }_{11}{\beta }_{22}},$$ (26)

$$V_{o2}=\frac{\begin{array}{c}\left\{s{C}_2{g}_{mn1}(-{\beta }_{13}{\beta }_{22}{V}_{in1}+{\beta }_{22}{V}_{in2}-{\beta }_{12}{\beta }_{22}{\beta }_{32}{V}_{in6}+{\beta }_{12}{\beta }_{22}{\beta }_{33}{V}_{in7})\right.\\ \left.+\left(s^2{C}_1{C}_2+s{C}_2{g}_{mn1}{\beta }_{12}{\beta }_{31}\right)\left({\beta }_{21}{V}_{in3+}{\beta }_{23}{V}_{in4}\right)+g_{mn1}{g}_{mn2}{\beta }_{11}{\beta }_{22}{V}_{in5}\right\}\end{array}}{s^2{C}_1{C}_2+s{C}_2{g}_{mn1}{\beta }_{12}{\beta }_{31}+g_{mn1}{g}_{mn2}{\beta }_{11}{\beta }_{22}},$$ (27)

$$V_{o3}=\frac{\begin{array}{c}s{C}_2{g}_{mn1}\left\{\left({\beta }_{13}{\beta }_{31}{V}_{in1}-{\beta }_{31}{V}_{in2}\right)+g_{mn1}{g}_{mn2}\left({\beta }_{11}{\beta }_{21}{\beta }_{31}{V}_{in3}+{\beta }_{11}{\beta }_{23}{\beta }_{31}{V}_{in4}-{\beta }_{11}{\beta }_{31}{V}_{in5}\right)\right.\\ \left.+\left(s^2{C}_1{C}_2+g_{mn1}{g}_{mn2}{\beta }_{11}{\beta }_{22}\right)\left({\beta }_{32}{V}_{in7}-{\beta }_{33}{V}_{in6}\right)\right\}\end{array}}{s^2{C}_1{C}_2+s{C}_2{g}_{mn1}{\beta }_{12}{\beta }_{31}+g_{mn1}{g}_{mn2}{\beta }_{11}{\beta }_{22}},$$ (28)

Furthermore, the output current I_out of the TM analog filter can be rewritten as

$$I_{out}=\frac{\begin{array}{c}\left\{s{C}_2{g}_{mn1}{g}_{mn3}\left({\beta }_{13}{\beta }_{31}{V}_{in1}-{\beta }_{31}{V}_{in2}\right)+g_{mn1}{g}_{mn2}{g}_{mn3}\left({\beta }_{11}{\beta }_{21}{\beta }_{31}{V}_{in3}+{\beta }_{11}{\beta }_{23}{\beta }_{31}{V}_{in4}-{\beta }_{11}{\beta }_{31}{V}_{in5}\right)\right.\\ \left.+\left(s^2{C}_1{C}_2+g_{mn1}{g}_{mn2}{\beta }_{11}{\beta }_{22}\right)g_{mn3}\left({\beta }_{32}{V}_{in7}-{\beta }_{33}{V}_{in6}\right)\right\}\end{array}}{s^2{C}_1{C}_2+s{C}_2{g}_{mn1}{\beta }_{12}{\beta }_{31}+g_{mn1}{g}_{mn2}{\beta }_{11}{\beta }_{22}},$$ (29)

Using (25), the denominators of (26)–(29) can be expressed by

$$\begin{array}{c}{s}^2{C}_1{C}_2\left(1-\frac{C_2{g}_{m1}{\beta }_{12}{\beta }_{31}{\mu }_1-{\beta }_{11}{\beta }_{22}{\mu }_1{\mu }_2}{C_1{C}_2}\right)\\ +\mathrm{s}{C}_2{g}_{m1}{\beta }_{12}{\beta }_{31}\left(1-\frac{g_{m1}{g}_{m2}{\beta }_{11}{\beta }_{22}{\mu }_1+g_{m1}{g}_{m2}{\beta }_{11}{\beta }_{22}{\mu }_2}{C_2{g}_{m1}{\beta }_{12}{\beta }_{31}}\right)\\ +g_{m1}{g}_{m2}{\beta }_{11}{\beta }_{22}\end{array}$$ (30)

From (30), the parasitic effects from DDTA can be ignored if the following conditions are met

$$\frac{C_2{g}_{m1}{\beta }_{12}{\beta }_{31}{\mu }_1-{\beta }_{11}{\beta }_{22}{\mu }_1{\mu }_2}{C_1{C}_2}\ll 1,$$ (31)

$$\frac{g_{m1}{g}_{m2}{\beta }_{11}{\beta }_{22}{\mu }_1+g_{m1}{g}_{m2}{\beta }_{11}{\beta }_{22}{\mu }_2}{C_2{g}_{m1}{\beta }_{12}{\beta }_{31}}\ll 1$$ (32)

The non-ideal parameters ω_o and Q can be expressed as

$${\omega }_o=\sqrt{\frac{g_{m1}{g}_{m2}{\beta }_{11}{\beta }_{22}}{C_1{C}_2}},$$ (33)

$$Q=\sqrt{\frac{g_{m2}{C}_1{\beta }_{11}{\beta }_{22}}{g_{m1}{C}_2{\beta }_{12}{\beta }_{31}}}$$ (34)

From the BP function (26), with V_o1/V_in3 = 1, the non-ideal characteristic equation of the oscillator can be expressed by

$$s^2{C}_1{C}_2+\mathrm{s}\left(C_2{g}_{mn1}{\beta }_{12}{\beta }_{31}-C_1{g}_{mn2}{\beta }_{11}{\beta }_{21}\right)+g_{mn1}{g}_{mn2}{\beta }_{11}{\beta }_{22}=0$$ (35)

The condition of oscillations and the frequency of oscillations are:

$$C_2{g}_{mn1}{\beta }_{12}{\beta }_{31}-C_1{g}_{mn2}{\beta }_{11}{\beta }_{21}=0,$$ (36)

$${\omega }_o=\sqrt{\frac{g_{mn1}{g}_{mn2}{\beta }_{11}{\beta }_{22}}{C_1{C}_2}}$$ (37)

3. Simulation Results

The circuit was designed and simulated in the Cadence environment using the 0.18 µm CMOS technology form TSMC. The transistors aspect ratios are in Table 3. The voltage supply V_DD = 0.5 V and the bias voltage V_B1 = −60 mV. For I_set = 5 nA, the total power consumption of the DDTA was 215.5 nW (DDA = 203 nW and TA = 12.5 nW). It is worth mentioning that the DC level on the bulk terminal of the differential pair depends on the DC level of the input signals and on the shunt resistors M_L that form a resistor voltage divider [34]. The simulated current of the bulk terminal of the differential pair is less than 0.8% of the input currents in the wholly input range, and hence the current of the bulk terminal could be neglected compared to the inputs one [34]. The value of this input capacitor C_B was optimized, based on previous post-layout simulation, to be 0.5 pF, in order to reduce the impact of the parasitic capacitance of the MOS transistor on the circuit performance from one side and to avoid extra increase in chip area from the other side [34,35]. The performance of the MI-MOST was confirmed experimentally in [34,35].

Table 3.

Transistor aspect ratio of the DDTA.

DDA	W/L (µm/µm)	TA	W/L (µm/µm)
M1A, M2A, M1B, M2B M14, M15	16/3	M1, M2	5 × 15/1
M3-M8, M11-M12, MB	8/3	M3-M6	2 × 10/1
M9, M10	4/3	M3c-M6c	10/1
M16	6 × 16/3	M8, M9, MB1, M11, M12	2 × 15/1
M13	6 × 8/3	M8c, M9c, MB1c	15/1
ML	4/5	M7	2 × 30/1
MIM capacitor: CB = 0.5 pF, Cc = 6 pF		M7c	30/1

Figure 7 shows the transconductance characteristics versus input voltage of the TA with the proposed SD and without SD that was presented in [16] for I_set = 5 nA. While the transconductance varies by about 10% over the nominal value for the input voltage range of ±40 mV for TA without SD, it is up to ±160 mV for the proposed TA with the SD. Note the improved linearity, obtained thanks to the SD technique.

Figure 7.

The transconductance characteristics of the TA with and without SD technique.

The frequency characteristics for the proposed VM filter from Figure 4 are shown in Figure 8. The value of the capacitors were C₁ = C₂ = 20 pF and the setting current I_set = 5 nA. The −3 dB cut-off frequency for the LP filter was 323.3 Hz.

Figure 8.

The frequency characteristics of the VM filter.

The tuning capability for the selected LP and BP filters are shown in Figure 9. With I_set = 2.5 nA, 5 nA, 10 nA, 20 nA the −3 dB frequency of the LPF was 162 Hz, 323.3 Hz, 650.2 Hz and 1.333 kHz, respectively. This, for example, covers a wide spectrum of biosignal filtering applications.

Figure 9.

The simulated frequency characteristics showing the tuning capability of the LP (a) and BP filters (b).

The simulated frequency characteristic of the LP (a) and BP (b) filters with process, voltage, and temperature (PVT) corners are shown in Figure 10. The process corners were fast–fast, fast–slow, slow–fast and slow–slow, the temperature corners were −10 °C and 70 °C, and the voltage supply corners were ±10%V_DD. The variation of these characteristics is in acceptable range.

Figure 10.

The simulated frequency characteristic of the LP (a) and BP (b) filters with PVT corners.

The histograms of the −3 dB cut-off frequency and low frequency gain of the LP filter with Monte Carlo (MC) process and mismatch analysis are shown in Figure 11a and Figure 11b, respectively. For the −3 dB cut-off frequency, the mean value was 323.86 Hz and the standard deviation 17.95 Hz, while the mean value of the gain was 432 mdB with a standard deviation of 150.5 mdB. Note that, thanks to the electronic tuning ability of the DDTA, any possible deviation of the filter parameters could be readjusted by the setting current I_set.

Figure 11.

The histogram of the −3 dB cut-off frequency (a) and low frequency gain (b) of the LPF with 200 MC runs.

The transient response of the LP filter with applied input sine wave signal 100 mV_pp @ 10 Hz is shown in Figure 12. The total harmonic distortion (THD) was 0.8%. The output noise of the LPF is shown in Figure 13. The integrated noise value was 108 µV, that results in a dynamic range of 53.2 dB for 1% THD.

Figure 12.

The transient response of the LP filter.

Figure 13.

The output noise the LP filter.

The frequency characteristics for the TM filter from Figure 5 are shown in Figure 14 for same condition as for the VM filter i.e., C₁ = C₂ = 20 pF and I_set = 5 nA. The low frequency current gain of the LP filter was −150 dB, which corresponds to a transconductance 31.6 nS, and the −3 dB for the LPF was 323.3 Hz.

Figure 14.

The frequency characteristics of the TM filter.

The quadrature oscillator in Figure 6 was also simulated with I_set = 5 nA and capacitor values C₁ = C₂ = 20 pF. Figure 15 shows the starting oscillation (a) and the steady state (b), respectively. The frequency is 253 Hz and the THD was around 1%.

Figure 15.

The starting oscillation (a) and the steady state (b).

Finally, Table 4 provides the performance comparison of this work with others recently published works [11,15,16,18]. This universal filter offers high-input and low-output impedances of VM filter and high-input and high-output impedances of TM filter. Compared with [11,15,16,18], the proposed filters offer 34 transfer functions of VM filter and 11 transfer functions of TIM filters. Compared with [11], the proposed filter provides electronic tuning ability of natural frequency and low-power consumption. Compared with the DDTA-based analog filters in [15,16,17,18], the proposed filter offers the advantages such as low-output impedances which is required for VM circuits, both non-inverting and inverting transfer functions of LP, HP, BP, BS, and AP filters, and maximum VM transfer functions.

Table 4.

Performance comparison of this work with those of recently published.

Factor	[11]	[15]	[16]	[18]	Proposed
Number of active devices	3 DDCC	5-DDTA	3 DDTA	2 DDTA	3 DDTA
Realization	130 nm	180 nm	130 nm	130 nm	180 nm
Number of passive devices	2 R, 2 C	2 C	2 C	2 C	2 C
Type of filter	MISO	MIMO	MIMO	MIMO	MIMO
Operation mode	VM	VM/CM/TAM/TIM	VM	VM	VM/TIM
Number of offered responses	5 (VM)	36 (VM/CM/TAM/TIM)	23 (VM)	22 (VM)	34 (VM) 11 (TIM)
Active device offers electronic control	No	Yes	Yes	Yes	Yes
High-input and low-output impedance of VM	Yes	No	No	No	Yes
High-input and high-output impedance of TM	-	Yes	-	-	Yes
Orthogonal control of ${\omega }_o$ and $Q$	Yes	Yes	Yes	Yes	Yes
Electronic control of ${\omega }_o$	No	Yes	Yes	Yes	Yes
Offer modified into oscillator	No	No	No	Yes	Yes
Orthogonal control of CO and FO	-	-	-	Yes	Yes
Natural frequency (kHz)	6370	1.04	0.254	0.08147	0.323
Simulated power supply (V)	$\pm$0.75	1.2	0.5	0.3	0.5
Power dissipation ($\mu W$)	3650	330	0.616	0.715	0.646
THD (%)	3 @120 m Vpp	1.09@650 mVpp	0.62 @100 m Vpp	0.5 @100 m Vpp	0.8@100 mVpp
Dynamic range (dB)	-	-	49.7	-	53.2
Verification of result	Sim/Exp	Sim/Exp	Sim	Sim	Sim

4. Conclusions

This paper presents a voltage-, transconductance-mode analog filter and quadrature oscillator based on low-voltage low-power DDTA. These applications require three DDTAs and two grounded capacitors, which is suitable for integrated circuit implementation. Both VM and TM filters provide five standard filtering responses, namely, low-pass, high-pass, band-pass, band-stop and all-pass responses into single topology. The natural frequency of these filter responses and the condition of oscillation can be electronically controlled. The provided simulation including Monte Carlo and PVT corners confirm the advantages and stability of the proposed applications.

Author Contributions

Conceptualization, T.K., F.K. and M.K.; methodology, F.K.; software, F.K. and D.A.; validation, F.K. and T.K. and D.A.; formal analysis, T.K., M.K. and F.K., investigation, F.K. and M.K.; resources, F.K. and M.K.; writing—original draft preparation, F.K., T.K. and M.K.; writing—review and editing, F.K. and T.K.; visualization, F.K., T.K. and M.K.; supervision, F.K.; project administration, F.K.; funding acquisition, F.K. and D.A. All authors have read and agreed to the published version of the manuscript.

Conflicts of Interest

The authors declare no conflict of interest.

Funding Statement

This work was supported by the University of Defence within the Organization Development Project VAROPS and by the Slovak Research and Development Agency under APVV-19-0392 contract, and also by VEGA 1/0760/21 grant.